implementation of reversable logic based design using submicron technology
TRANSCRIPT
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Implementation of Reversable Logic Based
Design using Submicron Technology.
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VLSI Design Methodology
Current Problem and Proposed solution.
Motivation towards Reversible Gate
Reversible Logic
Garbage Bit
Fredkin Gate and TSG gate(schematic and
layout) and simulation
Advantages, Applications and future scope.
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Customer Specification
Semi -Custom
ASIC
Gate Array
ASIC
FPGAASIC
Fab-Less
Design House
Full Custom
ASIC
Logic Design/
Front End
Physical Design/
Back End
Gate Level
Net List
Physical
layout/Masks
Foundry/
Processing
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- In every design adders place an important role. In
many computers and other kinds of processors, adders
are used for not only in the arithmetic logic unit(s), but
also in other parts of the processor, where they are used
to calculate addresses, table indices, and similar
operations.
-Although adders can be constructed for many
numerical representations, such as binary-coded decimal
or excess-3. In existing technology AND,OR,EXOR are
not reversible gates that means those are irreversible.
And the propagation delay of the circuit is very high.
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-The proposed circuit provides less
propagation delay compared to the
previous designs of adders. This is done
because of the proposed circuit is used
design with the TSG and Fredkin gates
called as reversible gates.
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It has been proved ( by Bennett and Landauer) that,
“losing information in a circuit causes losing power.
Information lost when the input vector cannot be
uniquely recovered from the output vector of a
combinational circuit”.
The gate/ circuit does not loose information is called
reversible.
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The gate/circuit that does not loose information is called reversible.
Input Vector
Iv=( Ii,j , Ii+1,j , Ii+2,j , … , Ik-1,j, Ik,j )
Output Vector
Ov=( Oi,j , Oi+1,j , Oi+2,j , … , Ok-1,j, Ok,j )
For each particular vector j
IvOv
Defn 1: A Reversible circuit has the facility to generate a unique output vector from each input vector, and vice versa .
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Defn 2: Reversible are circuits in which the number of inputs is equal to the number of outputs and there is one-to-one mapping between vectors of inputs and outputs.
Reversible
Gate
i
i
i
i
i
1
2
3
K-1
K
O
O
O
O
O
1
2
3
K
K-1
A gate with k inputs and k outputs is called k*k gate.
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Truth Table For Irreversible EXOR Logic
Inputs Output
A B C = A B
0 0 0
0 1 1
1 0 1
1 1 0
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Truth Table For Reversible EXOR Logic (Feynman Gate)
Inputs Output
A B P=A Q = A B
0 0 0 0
0 1 0 1
1 0 1 1
1 1 1 0
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Every gate output that is not used as input to other gate or
as a primary output is called garbage. The unutilized
outputs from a gate are called “garbage”.
A
B
P = A *
Q = A B
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Single block of Schematic
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• Electric Tool for todesign the schematicand the layout level ofthe project
• LT-Spice Tool is usedto simulate the SPICEdeck which isproduced form thedesigns.
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• Can be used in quantum computing
• Optical computing
• Carry Skip adder with less delay
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Sum=A B Cin
Cout= AB + BCin +
CinA
Carryskip adder contains 7 TSG
gates and 1 Fredkin gate.
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Low power dissipation
Propagation delay is less compared to the
previous one.
Speed is high that means faster than ripple carry
adder and simple.
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The current development of Combinational Adder
circuit synthesis at Gate level can be even
improved for sequential circuits using the
reversible logic synthesis design criteria for it.
Also these reversible logic circuits are used in
many applications like in the areas of digital
image processing and communications for
enabling the storage and hence to retrieve back
the same information that is being stored.
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