Informational ADAS as software upgrade to today’s infotainment systems

Matthew WatsonProduct Line Manager, Automotive Infotainment Processors

Brad BallardBusiness Development Manager, Automotive Infotainment Processors

Texas Instruments

Informational ADAS as Software Upgrade to Today’s Infotainment Systems 2 October 2014

DRA75x “Jacinto 6 Ex/EP” Processors merge Infotainment and Informational ADAS

The automotive cockpit is in the midst of an overhaul to modernize the information and entertainment options available to drivers and passengers. This journey started in earnest in 2011 with the high-volume deployment of larger color display systems, better representing what was available in smartphones and evolving towards tablets. This will continue for several more years at which time the gap ideally closes to only the automotive cycle time as the delta to deliver consumer features to the car.

Fast on the heels of this evolution in improving the

user interface and providing modern mechanisms to

incorporate driver’s digital life in the car was a strong

up-tick in the amount of advanced safety capability

(often called ADAS, Advanced Driver Assistance

Systems) driven through improvements in the

cost and performance of sensors and analytical

processing (Figure 1 shows a recent ADAS

semiconductor forecast). One good example of

the importance of ADAS systems is with Toyota’s

announcement that it will “make active safety

technology – including anti-collision systems –

available throughout its entire U.S. lineup by 2017.”

Infotainment and ADAS systems are largely distinct

from one another: driven by exclusivity of features

and the functional safety requirement for ADAS.

However, OEMs have an opportunity to enhance the

driver’s experience and safety further by leveraging

some of the components required in the ADAS

subsystem to deliver additional information to the

driver. For example, cameras already installed in

the vehicle, combined with processing capabilities

in the infotainment processor, can deliver

applications including 360-degree park assist,

augmented reality head’s-up displays and driver

monitoring and identification. Such systems can

be considered as “informational ADAS” given that

they don’t take an active role in the control of the

car. These applications have the ability to integrate

with modern infotainment solutions to enhance

the driver’s experience and offer manufacturers an

affordable methodology to merge these innovative

features.

Texas Instruments’ new DRA75x “Jacinto 6 Ex”

processor, a member of the “Jacinto” family of

infotainment processors, provides a software-

compatible platform

to augment existing

infotainment products with

such informational ADAS

features without changing

hardware, other than upgrades to the system to

route external cameras to the processor.

The DRA75x “Jacinto 6 Ex” processor is an

extension of and pin compatible with the “Jacinto

6” infotainment processor family. These two devices

share common foundational processing subsystems

including dual-ARM® Cortex®-A15 CPUs, auxiliary

Pin compatibility with ARM® Cortex®-A15 devices

2010

0

500

Millio

ns o

f U

S D

olla

rs

1,000

2,000

2,500

1,500

2011 2012

Source: IHS Technology, April 2014

Global Semiconductor Revenue Forecast

for Advanced Driver Assistance Systems

2013 2014 2015 2016 2017

Figure 1. ADAS semiconductor growth forecast

Informational ADAS as Software Upgrade to Today’s Infotainment Systems 3 October 2014

dual-ARM Cortex-M4 CPUs for support of real-time,

interrupt-intensive tasks, 3D graphics using

Imagination Technologies’ POWERVR™ SGX544-

MP2 dual-core graphics cores and 2D graphics

from Vivante Corporation’s GC320 core. The

“Jacinto 6” device family also includes a Texas

Instruments TMS320C66x VLIW floating-point digital

signal processor (DSP) that supports a variety of

different functionalities including software-defined

radio, enhanced audio and speech-processing

algorithms. The display subsystem offers concurrent

support for up to three 1080p displays and the IVA-

HD hardware accelerator supports 1080p60 decode

as well as 1080p30 concurrent video encode and

decode operations.

For the enablement of informational ADAS, the

DRA75x “Jacinto 6 Ex” processor adds a second

C66x DSP enabling 1.4 GHz of DSP performance

equivalent to 22 GFLOPS / 60 GMACS. This DSP

performance can be leveraged for additional radio/

audio/speech processing, as well as for image

manipulation for camera inputs such as required for

warping output of fisheye-lens cameras, stitching

multiple camera views together, pre-warping for

HUD and more. The “Jacinto 6 Ex” also includes

two embedded vision engines (EVEs) which are

purpose-built ADAS vision accelerators comprised

of an optimized vector coprocessor and a 32-bit

programmable RISC core. The EVEs are capable

of running many common ADAS algorithms faster,

and with greater power efficiency than ever before

and offer simultaneous analytic processing and

infotainment functionalities without performance

compromises to either subsystem.

Innovate beyond infotainment within the DRA “Jacinto 6” processor family

The DRA75x “Jacinto 6 Ex” processors were

designed to allow Tier 1s and car manufacturers

to easily extend their investments in infotainment

to new levels, adding innovative new use cases to

enhance the driver’s awareness

of the conditions both inside and

outside the car. The enhanced

co-processors are designed

in such a way to augment the

capabilities of the DRA74x

“Jacinto 6” while allowing for

seamless software and hardware

compatibility of their existing

infotainment systems.

Additional Digital Signal

Processor (DSP): The TI DSP

in the “Jacinto” family has been

used for several generations to

support software-defined radio

for HD Radio™ and DAB/DMB

audio standards. Additionally,

the DSP can support advanced Figure 2. TI’s “Jacinto 6 Ex” processor diagram

High-Speed Interconnect

ARM A15

ARM A15

ARM M4ARM M4

ARM M4ARM M4

System Services

Security Timers, PLLs, GPIO PWM/CAP/QEP

McASP

Shared RAMw/ ECC

McSPI

MOST150/MLB

2× 32bDDR2/3

QSPI

DualUSB 2.0

DMM

UART

SATA

CAN

MMC/SD

USB 3.0

I C2Gig EMAC

AVB

NAND/NOR/Async

PCIeGen 2

Connectivity and I/O

Graphics ProcessorDual SGX544

Video In PortseDMA

SDMAMMU VPE DEI

Radio Co-Processors

2D BitBLT (GC320)

IVA HD 1080p VideoCo-Processors

Display Subsystem

“Jacinto 6 EX”additions

Vision AccelerationPacincluding two

Embedded VisionEngines (EVEs)*

C66x DSP

<<

+

–*

C66x DSP

<<

+

–*

Informational ADAS as Software Upgrade to Today’s Infotainment Systems 4 October 2014

speech-processing algorithms, active noise

cancellation, and advanced multi-zone and multi-

rate audio-processing algorithms. The C66x DSP

core also allows for value-added features such as

rear or surround-view stitched video from high-

definition cameras mounted to the vehicle. Further,

the second C66x DSP on the DRA75x “Jacinto

6 Ex” makes it possible to concurrently perform

both radio/audio signal processing and image

manipulation processing, with headroom to spare.

1,400

1,200

1,000

800

600

400

200

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HD Radio MRC (dual antenna) DAB–DAB linking + ANC + audio

post processing

Esti

ma

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TM

S20C

66x U

tiliza

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MH

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Use-case estimation

Available to augment

IVI features including

surround view

Embedded Vision Engines (EVEs): The addition

of EVEs to the DRA75x “Jacinto 6 Ex” allows for

high-performance image manipulation/analytic

kernels to run both in parallel with other major

processing blocks on the device, and with greater

power efficiency than other solutions using general-

purpose processors (see performance comparison

in Figure 4 below). The EVEs are powerful vector

processors that allow offloads of fixed-point array

processing tasks from the DSP and can work in-

tandem for vision-type algorithms such as object,

traffic sign and pedestrian detection; augmented

reality navigation, driver monitoring, and driver

identification.

Figure 3. Example DSP partitioning on “Jacinto 6 Ex” combining radio/audio features with headroom for informational ADAS

9

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6

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4

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tt

Compute performance for same

power budget

>8×

Cortex -A15 (with Neon )® ®

Vision AccelerationPac

Figure 4. Vision AccelerationPac: >8× compute performance for same power budget with respect to Cortex-A15

Informational ADAS as Software Upgrade to Today’s Infotainment Systems 5 October 2014

Concurrency of infotainment and informational ADAS

The two accelerators, DSP and EVE, combined

with the existing “Jacinto 6” capabilities (high-

performance ARM Cortex-A15 CPU and auxiliary

ARM Cortex-M4 CPU cores, GPU, multimedia,

etc.) allow for concurrencies of head-unit features

and emerging analytics/image manipulation not

previously possible on a single device. Figure

5 below illustrates the DRA75x “Jacinto 6 Ex”

capability to combine the I/O and processing

behind multiple camera inputs together with

infotainment features, as well as cluster and rear-

seat functionality.

GatewayECU

ExternalAmplifier

Central

Infotainment

Display

5

R F L R

Rest of

Vehicle

AVB

Headrest Displays

Virtual Gaming & Education

UI / Navigation

Audio & Speech

360° Cameras

I

Interior

Camera

HD Virtual Dashboards

Face Tracking

Next-Gen Head’s-Up Displays

Vision Systems

Augumented Nav

Head’s Up

Display

Cluster

Display

Traditional infotainment

driven by high-performance

ARMs, GPUs, multimedia

accelerators

User Interface / Navigation /

Multimedia

Informational

ADAS

Digital

cluster

Rear seat

LDC

Surround view /

Multi-tuner

digital radio

Audio

processing

Speech

processing

Active noise

cancellation

DRA75x

Telematics

ECU

AM/

FM

DSP, EVEs for enhanced

driving experience in the

center stack, programmable

cluster and HUD systems

Figure 5. DRA75x “Jacinto 6 Ex” integrated capabilities including informational ADAS

Scale your investment

With the introduction of the DRA75x “Jacinto 6 Ex”

processor, combined with the DRA72x “Jacinto 6

Eco” and DRA74x “Jacinto 6” processors, TI now

further extends the automotive industry’s widest

range of infotainment processors offering a blend

of general-purpose, graphics and multimedia

performance alongside BOM-saving automotive co-

processors and vehicle-interfacing peripherals.

Informational ADAS as Software Upgrade to Today’s Infotainment Systems 6 October 2014

Figure 6. “Jacinto 6” family scalability

As shown in Figure 6, the DRA75x “Jacinto 6 Ex”

processor offers a superset of feature/functionality

of the “Jacinto 6” family of processors. Most

importantly, this enables car manufacturers and Tier

1s who must balance new feature introduction with

rapidly increasing R&D costs the ability to augment

existing solutions with such image manipulation

technologies without any modification to existing

infotainment software. The result is lower R&D costs

and faster time-to-market with innovative new features

that can help make driving safer and more fun.

Summary

With the increasing deployment of cameras and

sensors in the vehicle, car manufacturers have more

tools than ever at their disposal to make the driving

experience safer and more informative to drivers.

TI’s DRA75x “Jacinto 6 Ex” processor enables

manufacturers for the first time to leverage cameras

both inside and outside the vehicle together with

existing infotainment platforms without sacrificing

performance of either subsystem. Additionally, since

DRA75x “Jacinto 6 Ex” is based on the powerful

DRA “Jacinto 6” family of infotainment processors,

developers have the ability to reuse significant

software investment while adding innovative

informational ADAS features to the platform.

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