innovative chemical solutions for mems and microelectronics electrodeposited photoresists for wafer...

Innovative Chemical Solutionsfor MEMS and Microelectronics

Electrodeposited Photoresists for Wafer Applications

© 2011 MicroChem Corp

Nature of ED ResistsNature of ED Resists

• ED stands for electrodeposited

• ED paint used by Ford since 1960

• Emulsion of photoresist “Micelles” in water

-- 50 – 150 microns50 – 150 microns

-- Micelles contain the Micelles contain the resist componentsresist components

-- Micelles have a Micelles have a + or - charge + or - charge

Photoresist MicellePhotoresist Micelle

PolymerPolymer

Photo Active CompoundPhoto Active Compound

Solvents DyeSolvents Dye


Conformation on 3-D StructuresConformation on 3-D Structures

Deposits on all conductive surfaces

Intervia 3D-P over thick plated copper


Dow Electronic Materials ED ResistsDow Electronic Materials ED Resists

Intervia 3D-N•Negative tone image / cathodic wafer

(wafer has negative charge)

Intervia 3D-P•Positive-tone image / anodic wafer (wafer has positive charge)


Intervia 3D-N Coating ProcessIntervia 3D-N Coating ProcessC

ondu

ctiv

e W

afer

(C

atho

de)

Inert Anode

NR3+ -

NR3+

NR3+

NR3+

NR3+

NR3+

H2O

H2 O2

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

RCO2-

RCO2-

RCO2-

RCO2-

RCO2-

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

RCO2-

Micelles migrate to cathodic substrate


Self Limiting BehaviorSelf Limiting Behavior

resist


Deposition Current ProfileDeposition Current Profile

30s

Self Limiting Behavior

Near Zero Current

Deposition Current vs. Time

Time

Dep

ositi

on C

urre

nt


Intervia 3D-P Application Process Intervia 3D-P Application Process

• Resist Coating - Coating Cycle

. 100 - 300 V DC

. 10 ASF peak

. Potential applied for 10 - 20 seconds- Thickness Control

. Temperature

. Solvent

• Exposure 365 - 405 nm


Thickness vs. TemperatureThickness vs. Temperature

Thickness vs. Temperature

Temperature (ºC)

Thi

ckne

ss (

mic

rons

)


Deposit UniformityDeposit Uniformity

Thickness Uniformity

4

5

6

7

8

9

10

Edge

Cente

r

Edge

Position

Th

ick

ne

ss

(m

icro

ns

)

Thickness Uniformity

Position

Thi

ckne

ss (

mic

rons

)


ED Resist ComparisonED Resist Comparison

• Intervia 3D-NIntervia 3D-N– Negative working – 6 – 100 µm final thickness– 200-300 mJ/cm2 @365nm – Organic acid develop / strip– Acid and alkaline etches– Resistant to many plating

chemistries


ED Resist ComparisonED Resist Comparison

• Intervia 3D-N– Negative working – 6 - 100 µm final thickness– 200-300 mJ/cm2 @365nm – Organic acid develop / strip– Acid and alkaline etches– Resistant to many plating

chemistries

• Intervia 3D-P– Positive working– 6 µm target final

thickness– 250-400 mJ/cm2

@405nm– -CO3,

-OH or TMAH develop

– Plating and acid etching– Hydroxide or organic

solvents


ToolsTools

Semitool ED Cell

ED Resist Coater for R&D and Low Volume Production


Problems with Spin-on ResistsProblems with Spin-on Resists

100µm feature spin coated with 6.0 µm of photoresist.

•Little or no coverage on outside corners

•Very thick coverage in inside corners and at bottom of the feature

Image of 25µm lines patterned over the top of 45µm wide features


Coated Wafer StructuresCoated Wafer Structures

Source: Semitool

SEM image of 6µm of electrophoretic photoresist deposited over a series of 92µm tall features.

SEM image showing 5µm of electrophoretic photoresist deposited over a 300µm deep trench.

© 2011 MicroChem Corp 16

Examples of Wafer Processes Using Intervia ED Resists


source: Meco

Basic 3-D Test StructuresBasic 3-D Test Structures

Sketch of proposed technology for wafer-through hole interconnects

Set of 10, 20, 30 & 40 µm wide test slits reproduced at 150µm deep cavity

SEM Source: Meco


Ni Plated Structures on PolyimideNi Plated Structures on Polyimide

Source: Dow Electronic Materials

SEM photomicrographics of conformally electroplated Ni lines across polyimide grooves using Intervia 3D-P electrodeposition


Dow ED Products

•Negative ED photoresist

•Developer

•Remover

ShellCase ProcessShellCase Process

ShellOP for Image Sensors and Light Detection Devices


Etching Conductive Vias with ED ResistsEtching Conductive Vias with ED Resists

a) Photolithography on thick resist

b) Through-wafer etching (HDLP RIE)

c) Thermal oxidation and polysilicon deposition (LPCVD)

d) CVD metallization (W or Cu) and electro-plating (Cu only)

e) Electrodeposited resist deposition

f) Resist patterning by photo lithography

g) Metal and polysilicon etching

h) Photoresist removal

Source: Quate Group, Stanford University

a)

b)

c)

d)

e)

f)

g)

h)


Backside ContactsBackside Contacts

Source: Lindedre, Baltes, Gnaednger

SEM micrograph of final through-wafer vias


Backside ContactsBackside Contacts

Source: Lindedre, Baltes, Gnaednger

through-hole sidewall

SEM micrograph showing metallization on {111} sidewalls for elimination of uncontrolled light reflections.


Philips Thru Via ImagingPhilips Thru Via Imaging


Philips Thru Via ImagingPhilips Thru Via Imaging

Quadruple leads in a single through-wafer hole and a toroid structure


Exposure Using Phase Gratings Exposure Using Phase Gratings

Schematic view of 3-D exposure using phase gratings

Source: Philips

UV light

photomask

side viewsubstrate

phase grating

crosssection

top view


Plated CoilsPlated Coils


Infineon ELASTecInfineon ELASTec®® Wafer Level Bumping Wafer Level Bumping

Finished Bump

Intervia 3D-P Resist


ELASTecELASTec®® Process Steps Process Steps

3

• Resist Strip• Seedlayer Etch

2

• Reroute Plating (Cu, Ni, Au)

1

• Bump Print & Cure• Seedlayer Sputter (Ti/Cu)


ElasticElastic®®


Silicon Optical BenchSilicon Optical Bench

Source: Banerjee, Drayton

2-D Diagram of SiOB-I. Number 1, 2 & 3 indicate the regions where cross sections are taken for the fabrication diagrams.

Design II Interconnect: Partially shielded microstrip. (All dimensions are in microns)

2. Vias


Impact of Resist Tone on Printed DefectsImpact of Resist Tone on Printed Defects


Intervia 3D-N Typical Application Process


• Chemical Clean – Preposit Cleaner 742

• Sulfuric acid based soak cleaner• Removes fingerprints & soils• 50 - 55 degrees C• 2 - 3 minutes

Intervia 3D-N Application ProcessIntervia 3D-N Application Process


• Chemical Clean – Preposit Etch 748

• Monopersulfate etchant• Micro roughens copper (0.5 - 1.0 µm)• 30°C • 2 - 3 minutes



• Resist Coating – Resist is sparged upon entry to fully wet the part– Vibration of parts may be used in some applications to

release air bubbles– Part to be coated is the cathode – Stainless steel anodes



Con

duct

ive

Waf

er (

Cat

hode

)Inert A

node

NR3+ -

NR3+

NR3+

NR3+

NR3+

NR3+

H2O

H2 O2

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

RCO2-

RCO2-

RCO2-

RCO2-

RCO2-

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

NR3+

RCO2-

Intervia 3D-N Coating CycleIntervia 3D-N Coating Cycle


Intervia 3D-N Coating CellIntervia 3D-N Coating Cell

SS Anode

Part to be Coated

Spargers

Vibrator


Intervia 3D-N Application Process Intervia 3D-N Application Process

• Resist Coating – Coating Cycle

• 100 - 300 V DC• 10 ASF peak• Potential applied for 10 - 20 seconds

– Thickness Control• Temperature• Coating Time• Voltage


Typical Tmin Curve for Intervia 3D-NTypical Tmin Curve for Intervia 3D-N



• Conservation Rinse – Reclaims resist drag-out– Conservation resist is ultrafiltered to reclaim solids

• D.I. Final Rinse


Intervia 3D-N TopcoatIntervia 3D-N Topcoat

• Contains cellulose-based material in water– Reduces tack of coating– Reduces edge recession– Dissolves quickly during development step



• Air knives– Remove bulk moisture– Promotes uniform drying

• Convection Dry– 105°C– 10 minutes


• Exposure– 300 mJ/cm2 required at 5 micron resist thickness– 365 nm peak– Intensity affects required dose

• Subject to Low Intensity Reciprocity Law Failure (LIRLF)• 10 mW/cm2 minimum recommended



• Development– Intervia 3D-N Developer– 38 - 42°C– Clear time 30 - 120 seconds– 50% breakpoint




• Plating– Cupronal BP (copper)– Auronal BP (gold)– Solderon BP ( tin lead, lead free, low alpha lead)– Nikal BP (nickel)

• Etching – Cupric Chloride – Ferric Chloride


• Stripping– Intervia 3D-N Remover

– 50 - 65°C



Microfabrication CapabilitiesMicrofabrication Capabilities

• Etched features with 0.2 um tolerances

• Deep (through-wafer) etching

• Contoured plated features (photoresists and metals)

• Submicron multilayer feature-to-feature alignment

• Submicron die bonding

• Conformal AR coatings


MicroChem would like to thank Dow Electronic Materials for providing these materials…

…and thank you for your time and attention.

innovative chemical solutions for mems and microelectronics electrodeposited photoresists for wafer...

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