innovative technologies for rf & power applications · •immersion in inert environment...
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1 | Copyright © 2017 Veeco Instruments Inc.
Innovative
Technologies for
RF & Power
Applications
> Munich
> Nov 14, 2017
2 | Copyright © 2017 Veeco Instruments Inc.
Veeco Market Focus
34%34%
14%18%
Advanced Packaging,
MEMS & RF
Scientific & IndustrialFront-End
Semiconductor
Lighting, Display &
Power Electronics
Lithography
Single Wafer Wet Etch and Clean
Ion Beam Etch
MOCVD
Lithography
Single Wafer Wet Etch and Clean
Ion Beam Etch & Deposition
MBE
ALD
Diamond-Like Carbon
Laser Spike Anneal
3D Inspection
Ion Beam Etch
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3 | Copyright © 2017 Veeco Instruments Inc.
MOCVD and Metal Lift off steps in RF/Power devices
Power StackRF/Power Amplifier
MOCVD
Metal Lift-Off
4 | Copyright © 2017 Veeco Instruments Inc.
RF & Power Electronics Solutions
Single Wafer Metal lift off, PR Strip,
Clean, and Etch processes for RF and
Power Electronics Applications
WaferStorm/WaferEtch
Key Veeco Technology
Single-wafer reactor technology enables
efficient,
GaN-based power devices
Propel
5 | Copyright © 2017 Veeco Instruments Inc.
MOCVD: Propel
Single Wafer
Technology
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PowerSi (6”, 8”)
RFSiC (4”, 6”)
Si (8”)
Laser Diode
GaN: (2”)
Fine PitchSaph. (6”, 8”)
Si (8”)
UV-LEDSi nanowires
Propel Single Wafer Technology: Multiple Proven HVM Use Cases
7 | Copyright © 2017 Veeco Instruments Inc.
Propel Single Wafer MOCVD Extendible to New Applications
GaN Power: Competitiveness over Si
• Lowest HVM epi costs with 8” wafers
• Tighter device parametrics distribution (Yield)
• Enable GaN integrated circuits
• Best in class 8” performance• Extendible to 300 mm wafers
GaN RF: GaN on Si & SiC for 5G Platforms
• Low loss buffer on SiC and high resistivity Si
• Low sheet resistance (< 200 W/sq)
• 10 GHz – 100 GHz capable power amplifiers
300 mm Extendibility: New Applications
• GaN on Si for RF MMICs
• GaN on Si for Blue/Green Fine Pitch LEDs
• GaAs on Si for lower cost VCSELs
• InP / InGaAs on Si for integrated RF modules
1st Semi style single wafer cluster tool for MOCVD
8 | Copyright © 2017 Veeco Instruments Inc.
Propel: RF &
Power
9 | Copyright © 2017 Veeco Instruments Inc.
What does GaN Epi have to deliver?
• Low Rsh (< 250 Ω/)
• High saturation velocity
• High 2DEG (> 2x1013 /cm2 )
• Low charge trapping
Epi Requirements for GaN-SiC/Si
Device Requirements
• Low loss buffer
• Crystal quality (< 400 arc sec)
Additional Epi Requirements for GaN-Si
• Hi efficiency @ hi voltage
• Low harmonic distortion
• Low transmission loss
• Reliability
• Compact form factor
• Low cost
10 | Copyright © 2017 Veeco Instruments Inc.
InAlN Helps Reduce Rsh for RF devices
Thickness Control:Max- Min: < 1% on 8”
Rsh 210 Ω/; < 2% 1σ
Good structural quality with well
defined layer peak & fringes
% In Control:Max- Min: <0 .8% on 8”
Extremely uniform temperature control helps achieve high uniform InAlN
11 | Copyright © 2017 Veeco Instruments Inc.
Propel Provides Sharp Interfaces & No Memory Effects
Sharp InAlN/GaN interface, <100ppm Ga carry-over
Established Protocol to Avoid Fe Carryover
Dopant profile control for Mg in pGaN is critical for Power devices & LEDS
Rapid turn-on / turn-off for Fe
12 | Copyright © 2017 Veeco Instruments Inc.
Full stack uniformity 0.88%, 1 (C-doped 8% AlGaN)
Epi challenges for high voltage Power devices
8” Si (111)
AlN layer
C doped blocking layer
Super Lattice Buffer
layers
GaN Channel
AlGaN Barrier
Propel Single Wafer provides :
• Wider process window
• Fast transition between steps
• Hot transfer & Turbo ramp
• Wafer edge stress management
High breakdown voltage & low leakages
requires thicker stacks that result in:
• Long process times => Cost
• Wafer Stress => Edge artifacts
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2
2,5
3
3,5
4
4,5
5
5,5
8hr Recipe 4.5hr Recipe 4hr Recipe
Single Wafer Technology Improves Power Devices
CoO
Batch
BV @150C: 550V 660V 610V
CoO improvement with faster recipes Wafer stress reduction for 725um Si
Propel Epi helps GaN become cost competitive to Si super junction at device level
14 | Copyright © 2017 Veeco Instruments Inc.
CoO Building Blocks
Single Wafer MOCVD Lowers Epi Costs for ≥ 200 mm Wafers
1X
0.5X
1X
0.6X
Thin Stacks (< 2µm)200V Power Devices & RF
Thick Stacks (> 4.5µm)> 650V Power Devices
• Cluster: Capital & Footprint Efficiency• Low Parts & Gas Consumption
• High Productivity: >30 WPD (650V) • High Uptime: >95%
15 | Copyright © 2017 Veeco Instruments Inc.
Precision Surface
Processing (PSP)
16 | Copyright © 2017 Veeco Instruments Inc.
Material Lift off (MLO) for RF & Power Applications
MLO Layers:
Emitter metal – Ti/Pt
Base metal – Pt/Ti
Collector Metal – Au/Ge/Ni
Thin Film Resistor – NiCr
Metal0 – Ti/Pt/Au
MIM metal – Ti/Pt/Au
Key Challenges
• Effective removal of difficult
to etch material
• Material removal without
damaging substrateElectrostatic discharge
Substrate scratches
• Reduce cost (capital cost and
chemistry usage)
17 | Copyright © 2017 Veeco Instruments Inc.
• Solvent penetrates underlying photo
resist
• Photo resist swells, breaks up and
dissolves
PR
• Flow of solvent will remove residual
PR and “lift” metal off surface
• Clean metal pattern remains
* Force required to completely remove PR influenced by Solubility of PR, Thickness of PR and Metal, Lift-Off structure angle
ImmJET™ Metal Lift-Off Process Sequence
Lift-Off Polymer
with negative
angle
Metal DepositedIMMERSION
STEP
HIGH PRESSURE
SPRAY STEP
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• Immersion in Inert Environment
• Heated, Re-Circulated Solvents
• Single Wafer Soak Processing
• Precision control of time, agitation, other required steps
• Solvent Wet Wafer Transfers
• Maintain Solvent Film with 4-Blade Robot
• Solvent High Pressure Spray
• Heated, Re-circulated with Flow Rate Control
ImmJET™ for Material Lift-Off with NMP or DMSO
Combination Batch
Immersion and Single
Wafer Spray
ImmJET 6 Chamber Tool
Wafer
Input
HPC 1
HPC 2
SRD 1
SRD 2
Immersion
1
Immersion
2
19 | Copyright © 2017 Veeco Instruments Inc.
Material Lift off (MLO) for RF & Power Applications
Metal Lift Off:
• 2x throughput versus competitor single
wafer technology
• 5x lower chemistry usage vs wet bench
• Industry leader in removing difficult to “lift
off” materials
• Over 500 systems installed at major power
electronics and RF manufacturers
Pre Post
Single Wafer Metal lift off,
PR Strip & Clean
WaferStorm
Successful Lift off in
< 1um L/S features
20 | Copyright © 2017 Veeco Instruments Inc.
Summary
Propel Single Wafer Reactor leverages semi standard design to deliver:
> Best Film properties across broad application portfolio with Run to run stability
1. WiW uniformity with run to run stability and longest campaigns
2. Enabling technologies like InAlN with Minimal memory effects
> Lowest Epi Cost due to
1. Highest productivity with lowest recipe times
2. Lowest consumables
WaferStorm Single Wafer system leverages ImmJet TM
technology to
deliver
> Best material removal performance without causing surface damage
> Lowest Cost of Ownership
1. 5x lower chemistry usage than batch systems
2. 2x higher throughput versus other single wafer systems
21 | Copyright © 2017 Veeco Instruments Inc.
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