instruction manual motor protection … 6 f 2 t 0 1 7 4 safety precautions before using this...

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INSTRUCTION MANUAL

MOTOR PROTECTION RELAY

GRE120

TOSHIBA Corporation 2010 All Rights Reserved.

( Ver. 3.0)

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Safety Precautions Before using this product, please read this chapter carefully.

This chapter describes the safety precautions recommended when using the GRE120. Before installing and using the equipment, this chapter must be thoroughly read and understood.

Explanation of symbols used Signal words such as DANGER, WARNING, and two kinds of CAUTION, will be followed by important safety information that must be carefully reviewed.

Indicates an imminently hazardous situation which will result in death or serious injury if you do not follow the instructions.

Indicates a potentially hazardous situation which could result in death or serious injury if you do not follow the instructions.

CAUTION Indicates a potentially hazardous situation which if not avoided, may result in minor injury or moderate injury.

CAUTION Indicates a potentially hazardous situation which if not avoided, may result in property damage.

DANGER

WARNING

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Current transformer circuit Never allow the current transformer (CT) secondary circuit connected to this equipment to be opened while the primary system is live. Opening the CT circuit will produce a dangerously high voltage.

Exposed terminals Do not touch the terminals of this equipment while the power is on, as the high voltage generated is dangerous.

Residual voltage Hazardous voltage can be present in the circuit just after switching off the power supply. It takes approximately 30 seconds for the voltage to discharge.

CAUTION

Earth The earthing terminal of the equipment must be securely earthed.

CAUTION

Operating environment The equipment must only used within the range of ambient temperature, humidity and dust detailed in the specification and in an environment free of abnormal vibration.

Ratings Before applying AC voltage and current or the power supply to the equipment, check that they conform to the equipment ratings.

Printed circuit board Do not attach and remove printed circuit boards when the DC power to the equipment is on, as this may cause the equipment to malfunction.

External circuit When connecting the output contacts of the equipment to an external circuit, carefully check the supply voltage used in order to prevent the connected circuit from overheating.

Connection cable Carefully handle the connection cable without applying excessive force.

Power supply If power has not been supplied to the relay for two days or more, then all fault records, event records and disturbance records and internal clock may be cleared soon after restoring the power. This is because the back-up RAM may have discharged and may contain uncertain data.

Modification Do not modify this equipment, as this may cause the equipment to malfunction.

Disposal When disposing of this equipment, do so in a safe manner according to local regulations.

DANGER

WARNING

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Contents Safety Precautions 1

1. Introduction 7

2. Application Notes 9 2.0 Motor status monitoring 9 2.1 Overcurrent Protection according to motor status 10

2.1.1 Instantaneous and definite time Overcurrent Protection during motor start-up 10

Scheme Logic 11 Settings 12 2.1.2 Inverse Time and Definite time Overcurrent Protection during

motor running 12 2.1.3 Inverse Time Overcurrent Protection 13 2.1.4 Definite Time Overcurrent Protection 15 Scheme Logic 16 Settings 18

2.2 Residual Earth Fault Overcurrent Protection 19 2.2.1 Inverse Time Earth Fault Protection 19 2.2.2 Instantaneous and definite time Earth Fault Protection 19 Scheme Logic 19 Settings 21 2.2.3 CT Wiring and Setting of earth fault detection 23

2.3 Sensitive Earth Fault Protection 23 2.4 Phase Undercurrent Protection 28 2.5 Thermal Overload Protection 30 2.6 Negative Phase Sequence Overcurrent Protection 33 2.7 Broken Conductor Protection 35 2.8 Breaker Failure Protection 38 2.9 Countermeasures for Magnetising Inrush 41

2.9.1 Inrush Current Detector 41 2.9.2 Cold Load Protection 42

2.10 Motor Protection functions 44 2.10.1 Start Protection 44 2.10.2 Stalled motor Protection 45 2.10.3 Locked Rotor Protection 46 2.10.4 Restart Inhibit 49 2.10.5 Emergency Start 51

2.11 Trip Signal Output 52 2.12.1 Phase Fault and Earth Fault Protection 54 2.12.2 Minimum Knee Point Voltage 54

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2.12.3 Sensitive Earth Fault Protection 55 2.12.4 Restricted Earth Fault Protection 55

3. Technical Description 56 3.1 Hardware Description 56

3.1.1 Outline of Front Panel 56 3.2 Input and Output Signals 58

3.2.1 AC Input Signals 58 3.2.2 Binary Input Signals 58 3.2.3 Binary Output Signals 61

3.3 Automatic Supervision 62 3.3.1 Basic Concept of Supervision 62 3.3.2 Relay Monitoring 63 3.3.3 Trip Circuit Supervision 64 3.3.4 Circuit Breaker Monitoring 65 3.3.5 Rotor Locked Monitoring 66 3.3.6 Restart Inhibit Monitoring 67 3.3.7 Failure Alarms 67 3.3.8 Trip Blocking 68 3.3.9 Setting 68

3.4 Recording Function 69 3.4.1 Fault Recording 69 3.4.2 Event Recording 70 3.4.3 Disturbance Recording 70

3.5 Metering Function 72

4. User Interface 73 4.1 Outline of User Interface 73

4.1.1 Front Panel 73 4.1.2 Communication Ports 75

4.2 Operation of the User Interface 76 4.2.1 LCD and LED Displays 76 4.2.2 Relay Menu 79 4.2.3 Displaying Records 83 4.2.4 Displaying the Status 90 4.2.5 Viewing the Settings 97 4.2.6 Changing the Settings 99 4.2.7 Control 138 4.2.8 Testing 140

4.3 Personal Computer Interface 143 4.4 MODBUS Interface 143 4.5 Clock Function 143 4.6 Special Mode 144

5. Installation 146

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5.1 Receipt of Relays 146 5.2 Relay Mounting 146

5.2.1 Flush Mounting 146 5.3 Electrostatic Discharge 148 5.4 Handling Precautions 148 5.5 External Connections 148

6. Commissioning and Maintenance 149 6.1 Outline of Commissioning Tests 149 6.2 Cautions 149

6.2.1 Safety Precautions 149 6.2.2 Cautions on Tests 150

6.3 Preparations 151 6.4 Hardware Tests 152

6.4.1 User Interfaces 152 6.4.2 Binary Input Circuit 152 6.4.3 Binary Output Circuit 153 6.4.4 AC Input Circuits 154

6.5 Function Test 155 6.5.1 Measuring Element 155 6.5.2 Protection Scheme 165 6.5.3 Metering and Recording 165

6.6 Conjunctive Tests 167 6.6.1 On Load Test 167 6.6.2 Tripping Circuit Test 167

6.7 Maintenance 167 6.7.1 Regular Testing 167 6.7.2 Failure Tracing and Repair 167 6.7.3 Replacing Failed Relay 167 6.7.4 Resumption of Service 167 6.7.5 Storage 167

7. Putting Relay into Service 167

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Appendix A 174 Programmable Reset Characteristics and Implementation of Thermal Model

to IEC60255-8

Appendix B 178 Signal List

Appendix C 186 Event Record Items

Appendix D 191 Binary Output Default Setting List

Appendix E 193 Relay Menu Tree

Appendix F 204 Case Outline

Appendix G 206 Typical External Connections

Appendix H 211 Relay Setting Sheet

Appendix I 226 Commissioning Test Sheet (sample)

Appendix J 230 Return Repair Form

Appendix K 236 Technical Data

Appendix L 243 Symbols Used in Scheme Logic

Appendix M 247 Modbus: Interoperability

Appendix N 274 Inverse Time Characteristics

Appendix O 280 Ordering

The data given in this manual are subject to change without notice. (Ver.1.0)

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1. Introduction GRE120 series relays provide motor protection for Medium Voltage class networks.

Note: GRE120 series relays are non-directional, and are applicable to systems where fault current flows in a fixed direction, or flows in both directions but there is a significant difference in magnitude. In systems where a fault current flows in both directions and there is not a significant difference in the magnitude of the fault current, then a directional relay should be applied.

The GRE120 series has four models and provides the following protection schemes in all models.

Overcurrent protection for phase and earth faults with definite time or inverse time characteristics

Instantaneous overcurrent protection for phase and earth faults

Thermal overload protection

Locked rotor protection and restart inhibit

The GRE120 series provides sensitive earth fault protection dependent upon which model has been chosen.

The GRE120 series provides the following functions for all models.

Two settings groups

Configurable binary inputs and outputs

Circuit breaker control and condition monitoring

Trip circuit supervision

Automatic self-supervision

Menu-based HMI system

Configurable LED indication

Metering and recording functions

Front mounted USB port for local PC communications

Rear mounted RS485 serial ports for remote PC communications and Optional Connection

Table 1.1.1 shows the members of the GRE120 series and identifies the functions to be provided by each member.

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Table 1.1.1 Series Members and Functions Model Number GRE120 -

400 401 420 421

Current input 3P + E 3P + E 3P + E(*) + SE 3P + E + SE

Binary Input port 2 6 2 6

IDMT O/C (ROC1, ROC2)

DT O/C (ROC1 2, SOC, ALOC)

Instantaneous O/C (ROC1 2, SOC, ALOC)

IDMT O/C (EF1, EF2)

DT O/C (EF1 4)

Instantaneous O/C (EF1 4)

SEF protection

Phase U/C

Thermal O/L

NPS O/C

Broken conductor protection

CBF protection

Locked rotor protection

Start protection

Stalled motor protection

Restart inhibit

Inrush current detector

Cold load protection

Trip circuit supervision

Self supervision

CB state monitoring

Trip counter alarm

Iy alarm

CB operate time alarm

Multiple settings groups

Metering

Motor status monitoring

Fault records

Event records

Disturbance records

Communication

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E: current from residual circuit SE: current from core balance CT 3P: three-phase current E(*): current (Io) calculated from three-phase current in relay internal DT: definite time

IDMT: inverse definite minimum time O/C: overcurrent protection U/C: undercurrent protection OC : phase overcurrent element O/L: overload protection NPS: negative phase sequence EF : earth fault element SEF: sensitive earth fault CBF: circuit breaker failure

Model 400 provides three phase and earth fault overcurrent protection.

Model 420 provides three phase, earth fault and sensitive earth fault protection.

2. Application Notes 2.0 Motor status monitoring

GRE120 provides a motor status monitoring function by detection of motor current. In general, a large current flows in a motor during start-up, while less than the motor rated current (IMOTFull load current) flows in the running state. The motor status is determined from the ratio of measured current to motor rated current.

The motor status transitions are shown in Figure 2.0.1.

Figure 2.0.1 Motor status transition diagram

Stop state ; When the motor current is less than 5% of motor rated current (IMOT) *

* If 5% of motor rated current is smaller than 0.1A, then current of less than 0.1A will be in stop state.

Star t-up state ; From the time when the motor current exceeds 5% of motor rated current as it leaves the stop state until the motor current falls below 150% of the motor rated current, in cases where the motor start-up current exceed 150% of the motor rated current, or; the start-up time setting (TMTST) expires in cases where the motor start-up current doesnt exceed 150% of the motor rated current.

Running state ; Not during the start-up state, when the motor current is higher than 5% of motor rated current.

Over load state ; Not during the start-up state, when the motor current exceeds the operating value for the thermal overload (THM;49) function.

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Element Range Step Default Remarks

IMOT 0.20 10.00 A 0.01 A 1.00 A Motor rated current setting

TMTST 0.1 300.0 s 0.1 s 60.0 s Motor start-up time setting

The motor status is indicated by the motor status LED as follows:

Off ; Stop state Flashing ; Start-up state lit ; Running state

User configurable LED (setting signal No.303 ) ; Overload

GRE120 can detect following the motor parameters.

- Peak current during motor start-up

- Number of starts (Hot starts , Cold starts and Total starts)

- Last motor start-up time

- Accumulated Running time

2.1 Overcurrent Protection according to motor status

GRE120 provides protection for motor feeders with phase fault overcurrent elements ROC1, ROC2, SOC and ALOC. The OC protection characteristics are modified depending on the motor status Start-up, Running. ROC1 and ROC2 are applied in the motor running state, SOC is activated during motor start-up, and ALOC operates as an alarm NOT dependent on motor status.

2.1.1 Instantaneous and definite time Overcurrent Protection during motor start-up

The SOC elements provide instantaneous and definite time overcurrent protection in the motor start-up state.

During the motor starting period, several times motor rated current flow as motor start-up current. The instantaneous overcurrent setting during the motor starting period should be higher than the motor start-up current.

The SOC element is effective only during the start-up state. Therefore, the SOC setting and the motor start-up period setting of TMTST are set from the characteristics of motor start-up current and motor start-up period.

Figure 2.1.1 illustrates operating times for the SOC instantaneous and definite overcurrent protection during the motor start-up period for a typical motor start-up current characteristic.

Where:

Ir ; motor rated current,

Ist ; motor start-up current,

Isoc ; SOC setting current,

TMTST ; setting of motor start-up period,

Tst ; motor start-up period

Tsoc ; setting of SOC operating (delay) time.

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Current (amps)

Time (s) Motor current characteristic

SOC

ROC*

Ist Ir Isoc

Tsoc

Tst

TMTST

1.5xIr

Figure 2.1.1 Instantaneous Overcurrent Setting during motor start-up period

The setting of SOC operating time should be set according to the motor inrush current.

Scheme Logic

As shown in Figure 2.1.2, the SOC element for overcurrent protection in the motor start-up state has independent scheme logics. SOC gives trip signals SOC TRIP through delayed pick-up timer TSOC. The trip can be blocked by incorporated scheme switches [SOCEN] and binary input signals SOC BLOCK. ICD is an inrush current detector, which will detects second harmonic inrush current during transformer energisation etc. , and can be applied to block the SOC element by the scheme switch [SOC-2F]. See Section 2.9.

C

B

A

SOC

0.00 - 300.00s

&

&

TSOC t 0

t 0

t 0 &

SOC TRIP

SOC-A TRIP

SOC-B TRIP

SOC-C TRIP

1

SOC BLOCK 1

"ON"

[SOCEN] + &

110

111

112

57

58

59

109 + &

[SOC-2F]

ICD Block

Figure 2.1.2 Overcurrent Protection in motor start-up state SOC

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Settings

The table shows the setting elements necessary for overcurrent protection in the motor start-up state and their setting ranges.


SOC 0.10 150.0 A 0.01 A 10.00 A SOC threshold setting

TSOC 0.00 300.00 s 0.01 s 0.00 s SOC definite time setting.

[SOCEN] Off / On Off SOC Enable

[SOC-2F] NA / Block NA SOC 2f Block Enable


2.1.2 Inverse Time and Definite time Overcurrent Protection during motor running

The ROC1 and ROC2 elements provide overcurrent protection during the running state, and prevent motor damage due to the motor current exceeding the allowable heating limit, as defined by the motors running thermal damage curve and acceleration thermal damage curve for hot load or cold load conditions. ROC1 provides inverse definite minimum time (IDMT) or definite time overcurrent protection. ROC2 provides definite time overcurrent protection.

Figure 2.1.3 shows operating times for the ROC1 inverse time overcurrent protection and the ROC2 definite time overcurrent protection, compared with example motor thermal damage curves during the motor running period.

Current (amps)

Time (s)

Running thermal damage curve

ROC2

ROC1

TROC2 Acceleration thermal damage curve (Hot / Cold load)

Current (amps)

Time (s) Running thermal damage curve

ROC2

ROC1

TROC2

Acceleration thermal damage curve (Hot / Cold load)

Figure 2.1.3 Inverse time and definite time Overcurrent Setting during motor running period

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2.1.3 Inverse Time Overcurrent Protection

The ROC1 element has IDMT characteristics defined by equation (1) in accordance with IEC 60255-151:

c

IsI

kTMSt1

where:

t = operating time for constant current I (seconds),

I = energising current (amps),

Is = overcurrent setting (amps),

TMS = time multiplier setting,

k, , c = constants defining curve.

Nine curve types are available as defined in Table 2.1.1. They are illustrated in Figure 2.1.4.

In addition to the above nine curve types, ROC1 can provide user configurable IDMT curves. If required, set the scheme switch [MROC1] to C and set the curve defining constants k, and c. The following table shows the setting ranges of the curve defining constants.

IEC/UK Inverse Curves(Time Multiplier = 1)

0.1

1

10

100

1000

1 10 100

Current (Multiple of Setting)

Ope

ratin

g Ti

me

(s)

LTI

NI

VI

EI

IEEE/US Inverse Curves(Time Multipl ier = 1)

0.1

1

10

100

1 10 100

Curren t (Multiple of Set ting)

Ope

ratin

g Ti

me

(s)

MI

VI

CO2

CO8

EI

Figure 2.1.4 IDMT Characteristics

(1)

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Programmable Reset Characteristics ROC1 has a programmable reset feature: instantaneous, definite time delayed, or dependent time delayed reset. (Refer to Appendix A for a more detailed description.)

Instantaneous resetting is normally applied in multi-shot auto-reclosing schemes, to ensure correct grading between relays at various points in the scheme.

The inverse reset characteristic is particularly useful for providing correct coordination with an upstream induction disc type overcurrent relay.

The definite time delayed reset characteristic may be used to provide faster clearance of intermittent (pecking or flashing) fault conditions.

Definite time reset The definite time resetting characteristic is applied to the IEC/IEEE/US operating characteristics.

If definite time resetting is selected, and the delay period is set to instantaneous, then no intentional delay is added. As soon as the energising current falls below the reset threshold, the element returns to its reset condition.

If the delay period is set to some value in seconds, then an intentional delay is added to the reset period. If the energising current exceeds the setting for a transient period without causing tripping, then resetting is delayed for a user-definable period. When the energising current falls below the reset threshold, the integral state (the point towards operation that it has travelled) of the timing function (IDMT) is held for that period.

This does not apply following a trip operation, in which case resetting is always instantaneous.

Dependent time reset The dependent time resetting characteristic is applied only to the IEEE/US operate characteristics, and is defined by the following equation:

SII

krRTMSt1

(2)

where:

t = time required for the element to reset fully after complete operation (seconds),

I = energising current (amps),

Is = overcurrent setting (amps),

kr = time required to reset fully after complete operation when the energising current is zero (see Table 2.1.1),

RTMS = reset time multiplier setting.

k, , c = constants defining curve.

Figure 2.1.5 illustrates the dependent time reset characteristics.

The dependent time reset characteristic also can provide user configurable IDMT curve. If required, set the scheme switch [MROC1] to C and set the curve defining constants kr and . Table 2.1.1 shows the setting ranges of the curve defining constants.

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Table 2.1.1 Specification of IDMT Curves

Curve Description IEC ref. k c kr

IEC Normal Inverse A 0.14 0.02 0 - -

IEC Very Inverse B 13.5 1 0 - -

IEC Extremely Inverse C 80 2 0 - -

UK Long Time Inverse - 120 1 0 - -

IEEE Moderately Inverse D 0.0515 0.02 0.114 4.85 2

IEEE Very Inverse E 19.61 2 0.491 21.6 2

IEEE Extremely Inverse F 28.2 2 0.1217 29.1 2

US CO8 Inverse - 5.95 2 0.18 5.95 2

US CO2 Short Time Inverse - 0.02394 0.02 0.01694 2.261 2

User configurable curve - 0.00 300.00

0.00 5.00

0.000 5.000

0.00 300.00

0.00 5.00

Note: kr and are used to define the reset characteristic. Refer to equation (2).

IEEE Reset Curves(Time Multipl ier = 1)

1.00

10.00

100.00

1000.00

0.1 1Cur rent (Mult iple of Setting)

Tim

e (s

)

MI

VI

EI

CO2

CO8

Figure 2.1.5 Dependent Time Reset Characteristics

2.1.4 Definite Time Overcurrent Protection

The definite time overcurrent protection consists of instantaneous overcurrent measuring element ROC1 (set the scheme switch [MROC1] to D ) , ROC2 and ALOC with delayed pick-up timers started by the elements, and provides selective protection with graded setting of the delayed pick-up timers.

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Scheme Logic

Figure 2.1.6 shows the scheme logic of the ROC1 phase fault protection for the motor running state with selective definite time or inverse time characteristic.

The definite time protection is selected by setting [MROC1] to D. Definite time overcurrent element ROC1-D is enabled for phase fault protection, and trip signal ROC1 TRIP is given through the delayed pick-up timer TROC1.

The inverse time protection is selected by setting [MROC1] to either IEC, IEEE or US according to the IDMT characteristic to be employed. Inverse time overcurrent element ROC1-I is enabled for phase fault protection respectively, and trip signal ROC1 TRIP is given.

Figure 2.1.7 and Figure 2.1.8 show the scheme logic of the ROC2 and ALOC with definite time characteristic. Definite time overcurrent elements ROC2-D and ALOC-D are enabled for phase fault protection, and trip signal ROC2 TRIP and alarm signal ALOC ALARM are given through the delayed pick-up timer TROC2 and TALOC.

ICD is the inrush current detector, which will detect second harmonic inrush current during transformer energisation etc. , and can be used to block the ROC1-D element using the scheme switch [ROC1-2F]. See Section 2.9.

The ROC1 HS are the high speed pick-up outputs of the phase overcurrent protection.

These protections can be disabled by the scheme switches [ROC1EN], [ROC2EN] and [ALOCEN] or binary input signal ROC1 BLOCK, ROC2 BLOCK and ALOC BLOCK.

1

ROC1 TRIP

ROC1 BLOCK 1

0.00 - 300.00s

&

TROC1 t 0

"IEC"

"IEEE"

+

"ON"

[ROC1EN]

+

C

B

A ROC1-D

& t 0 1

& t 0 1

&

C

B

A

&

&

"US"

"C"

1

1

1

&

1

102 ROC1-A TRIP

103

104

101

ROC1-B TRIP

ROC1-C TRIP

51 ROC1-A

52

53

ROC1-B

ROC1-C "D"

ROC1-I

& [MROC1]

+

[ROC1-2F]

ICD Block

C

B

A ROC1

HS

ROC1-A HS 88

ROC1-B HS 89

ROC1-C HS 90

Figure 2.1.6 Phase Fault Overcurrent Protection ROC1

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1

ROC2 TRIP

ROC2 BLOCK 1

0.00 - 300.00s

&

TROC2 t 0

"IEC"

"IEEE"

+

"ON"

[ROC2EN] +

C

B

A ROC2-D

& t 0 1

& t 0 1

&

C

B

A

&

&

"US"

"C"

1

1

1

&

1

106 ROC2-A TRIP

107

108

105

ROC2-B TRIP

ROC2-C TRIP

54 ROC2-A

55

56

ROC2-B

ROC2-C "D"

ROC2-I

&

[MROC2] +

[ROC2-2F]

ICD Block

Figure 2.1.7 Phase Overcurrent Protection ROC2

C

B

A

ALOC

0.00 - 300.00s

&

&

TALOC t 0

t 0

t 0 &

ALOC ALARM

ALOC-A ALARM

ALOC-B ALARM

ALOC-C ALARM

1

ALOC BLOCK 1

"ON"

[ALOCEN] + &

114

115

116

60

61

62

113 + &

[ALOC-2F]

ICD Block

Figure 2.1.8 Phase Overcurrent Protection ALOC

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Settings

The table shows the setting elements necessary for the phase overcurrent protection and their setting ranges.


ROC1 0.10 25.00 A 0.01 A 1.00 A ROC1 threshold setting

0.010 1.500 0.001 1.000 ROC1 time multiplier setting. Required if [MROC1] = IEC, IEEE, US or C.

TROC1

0.00 300.00 s 0.01 s 1.00 s ROC1 definite time setting. Required if [MROC1] = DT.

TROC1R 0.0 300.0 s 0.1 s 0.0 s ROC1 definite time delayed reset. Required if [MROC1] = IEC or if [ROC1R] = DEF.

TROC1RM 0.010 1.500 0.001 1.000 ROC1 dependent time delayed reset time multiplier. Required if [ROC1R] = DEP.

ROC2 0.10 25.00 A 0.01 A 5.00 A ROC2 threshold setting

0.00 300.00 s 0.01 s 0.00 s ROC2 definite time setting. TROC2

ALOC 0.10 150.0 A 0.01 A 20.00 A ALOC threshold setting

TALOC 0.00 300.00 s 0.01 s 0.00 s ALOC definite time setting.

[ROC1EN] Off / On On ROC1 Enable

[MROC1] D / IEC / IEEE / US / C D ROC1 characteristic

[MROC1C] MROC1C-IEC MROC1C-IEEE MROC1C-US

NI / VI / EI / LTI MI / VI / EI CO2 / CO8

NI MI CO2

ROC1 inverse curve type. Required if [MROC1] = IEC. Required if [MROC1] = IEEE. Required if [MROC1] = US.

[ROC1R] DEF / DEP DEF ROC1 reset characteristic. Required if [MROC1] = IEEE or US.

[ROC1-2F] NA / Block NA ROC1 2f Block Enable

[ROC2EN] Off / On Off ROC2 Enable

[ROC2-2F] NA / Block NA ROC2 2f Block Enable

[ALOCEN] Off / On Off ALOC Enable

[ALOC-2F] NA / Block NA ALOC 2f Block Enable

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2.2 Residual Earth Fault Overcurrent Protection

GRE120 provides protection for motor feeders with residual earth fault overcurrent elements EF1 to EF4. EF1 and EF2 have selective inverse time and definite time characteristics. The protection of the local terminal is coordinated through the current setting, the time setting, or both.

*The earth fault current input may be connected either in the residual circuit of the phase CTs, or alternatively a dedicated earth fault CT may be used. In the case of connection in the residual circuit of the phase CTs, the settings of the phase CT ratio OCCT and the earth fault CT ratio EFCT should be equal. On the other hand, where a dedicated earth fault CT is applied, then the settings of OCCT and EFCT should NOT be equal, and in this case the measuring range of earth fault current is limited to 20A maximum (see section 2.2.3).

2.2.1 Inverse Time Earth Fault Protection

Inverse definite minimum time (IDMT) earth fault overcurrent protection is commonly applied in direct- and resistance-grounded systems, in which the earth fault current varies with the location of the fault.

EF1 and EF2 are intended to operate only on the zero-sequence current present in earth faults. In practice, current may flow through the residual circuit because of the unequal outputs of the phase CTs. This may be due to unequal burdens on the CTs, the difference in CT characteristics or CT saturation caused by high motor start-up currents. Because these unbalanced currents are present, it often becomes necessary to use the IDMT characteristics so that undesired tripping does not occur with sensitive current setting.

The EF1 and EF2 elements have IDMT characteristics identical to the ROC1 element. See section 2.1.3.

Reset Characteristics EF1 and EF2 have a programmable reset feature: instantaneous, definite time delayed, or dependent time delayed reset identical to the ROC1 element. See section 2.1.3

2.2.2 Instantaneous and definite time Earth Fault Protection

In a system in which the earth fault current does not vary a great deal in relation to the location of the fault, instantaneous and definite time overcurrent protection can be applied using elements EF1 to EF4.

In the application of instantaneous and definite time earth fault protection, care must be taken to avoid incorrect tripping due to the false residual that may occur during motor start-up, or from feedback for an external fault. Where a large earth fault current can be expected, this presents no problem; however, where high-impedance grounding is used, these elements may be more difficult to apply.

The instantaneous and definite time earth fault protection consists of instantaneous overcurrent measuring elements EF1 , EF2 (set the [MEF]), EF3 and EF4, delayed pick-up timers started by the elements, and provides selective protection with graded setting of the delayed pick-up timers.

Scheme Logic

Figure 2.2.1 and Figure 2.2.2 show the scheme logic of the earth fault protection with selective definite time or inverse time characteristics.

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The definite time protection is selected by setting [MEF1] and [MEF2] to D. Definite time overcurrent elements EF1-D and EF2-D are enabled for earth fault protection respectively, and trip signal EF1 TRIP and EF2 TRIP are given through the delayed pick-up timer TEF1 and TEF2.

The inverse time protection is selected by setting [MEF1] and [MEF2] to either IEC, IEEE or US according to the IDMT characteristic to be employed. Inverse time overcurrent elements EF1-I and EF2-I are enabled for earth fault protection respectively, and trip signal EF1 TRIP and EF2 TRIP are given.

Figure 2.2.3 and Figure 2.2.4 show the scheme logic of the EF3 and EF4 with definite time characteristic. Definite time overcurrent elements EF3-D and EF4-D are enabled for earth fault protection, and trip signal EF3 TRIP and alarm signal EF4 ALARM are given through the delayed pick-up timer TEF3 and TEF4.

ICD is the inrush current detector, which will detect second harmonic inrush current during transformer energisation etc. , and can be used to block the EF*-D element using the scheme switch [EF*-2F] respectively. See Section 2.9.

The signal EF1 HS is the high speed pick-up output of the earth fault protection element.

These protections can be disabled by the scheme switches [EF1EN] to [EF4EN] or binary input signals EF1 BLOCK to EF4 BLOCK.

EF1-D

1 EF1 TRIP &

0.00 - 300.00s

TEF1 t 0

EF1-I

EF1 BLOCK 1

"ON"

[EF1EN] + &

"D"

[MEF1]

"IEC"

"IEEE"

+

"US"

"C" &

1

117

63 EF1 & ICD

Block + [EF1-2F]

EF1HS EF1 HS 91

Figure 2.2.1 Earth Fault overcurrent Protection EF1

21

6 F 2 T 0 1 7 4

EF2-D

1 EF2 TRIP &

0.00 - 300.00s

TEF2 t 0

EF2-I

EF2 BLOCK 1

"ON"

[EF2EN] + &

"D"

[MEF2]

"IEC"

"IEEE"

+

"US"

"C" &

1

118

64 EF1 & ICD

Block + [EF2-2F]

Figure 2.2.2 Earth fault Protection EF2

EF3 EF3 TRIP

0.00 - 300.00s

&

TEF3 t 0

EF3 BLOCK 1

"ON"

[EF3EN] + &

119 65

+ &

[EF3-2F]

ICD Block


EF4 EF4 ALARM

0.00 - 300.00s

&

TEF4 t 0

EF4 BLOCK 1

"ON"

[EF4EN] +

&

120 66

+ &

[EF4-2F]

ICD Block


Settings

The table shows the setting elements necessary for the earth fault protection and their setting ranges.

22

6 F 2 T 0 1 7 4

Element Range Step Default Remarks EF1 0.05 25.00 A 0.01 A 0.30 A EF1 threshold setting

0.010 1.500 0.001 1.000 EF1 time multiplier setting. Required if [MEF1] = IEC, IEEE, US or C.

TEF1

0.00 300.00 s 0.01 s 1.00 s EF1 definite time setting. Required if [MEF1] =DT.

TEF1R 0.0 300.0 s 0.1 s 0.0 s EF1 definite time delayed reset. Required if [MEF1] = IEC or if [EF1R] = DEF.

TEF1RM 0.010 1.500 0.001 1.000 EF1 dependent time delayed reset time multiplier. Required if [EF1R] = DEP.

EF2 0.05 25.00 A 0.01 A 3.00 A EF2 threshold setting

TEF2 0.010 1.500 0.001 1.000 EF2 time multiplier setting. Required if [MEF2] = IEC, IEEE, US or C.

0.00 300.00 s 0.01 s 0.00 s EF2 definite time setting.

TEF2R 0.0 300.0 s 0.1 s 0.0 s EF2 definite time delayed reset. Required if [MEF2] = IEC or if [EF2R] = DEF.

TEF2RM 0.010 1.500 0.001 1.000 EF2 dependent time delayed reset time multiplier. Required if [EF2R] = DEP.


TEF3 0.00 300.00 s 0.01 s 0.00 s EF3 definite time setting.


TEF4 0.00 300.00 s 0.01 s 0.00 s EF4 definite time setting.

[EF1EN] Off / On On EF1 Enable

[MEF1] D / IEC / IEEE / US / C D EF1 characteristic

[MEF1C] MEF1C-IEC MEF1C-IEEE MEF1C-US


NI MI CO2

EF1 inverse curve type. Required if [MEF1] = IEC. Required if [MEF1] = IEEE. Required if [MEF1] = US.

[EF1R] DEF / DEP DEF EF1 reset characteristic. Required if [MEF1] = IEEE or US.

[EF1-2F] NA / Block NA EF1 2f Block Enable

[EF2EN] Off / On Off EF2 Enable

[MEF2] D / IEC / IEEE / US / C D EF2 characteristic

[MEF2C] MEF2C-IEC MEF2C-IEEE MEF2C-US


NI MI CO2

EF2 inverse curve type. Required if [MEF2] = IEC. Required if [MEF2] = IEEE. Required if [MEF2] = US.

[EF2R] DEF / DEP DEF OC2 reset characteristic. Required if [MEF2] = IEEE or US.






23

6 F 2 T 0 1 7 4

2.2.3 CT Wiring and Setting of earth fault detection

The earth fault current input may be connected either in the residual circuit of the phase CTs, or alternatively a dedicated earth fault CT may be used. In the case of connection in the residual circuit of the phase CTs, the settings of the phase CT ratio OCCT and the earth fault CT ratio EFCT should be equal. On the other hand, where a dedicated earth fault CT is applied, then the settings of OCCT and EFCT should NOT be equal. The two connection methods are illustrated in figure 2.2.5.

The maximum setting value of the earth fault protection is 25.00A in case of elements EF1 and EF2, and 100.00A for EF3 and EF4. However, it should be noted that, in the case that a dedicated earth fault CT connection is used, the measuring range of earth fault current is limited to 20A maximum.

Figure 2.2.5 Earth fault current detection wiring

2.3 Sensitive Earth Fault Protection

The sensitive earth fault (SEF) protection is applied within distribution systems that are earthed through a high impedance, where very low levels of fault current are expected for earth faults. Furthermore, the SEF elements of GRE120 are can also be applied to provide standby earth fault protection and the high impedance restricted earth fault protection for transformers.

The SEF elements provide setting ranges that are more sensitive (10 mA to 5 A) compared to those used for regular earth fault protection.

Since very low levels of current setting may be applied, there is a danger of mal-operation due to harmonics of the power system frequency, which can appear as residual current. Therefore the SEF elements operate only on the fundamental component, rejecting all higher harmonics.

The SEF protection is provided in Models 420 and 421 which have a dedicated earth fault input circuit.

The element SEF1 provides inverse time or definite time selective two-stage earth fault protection. Stage 2 of the two-stage earth fault protection is used only for the standby earth fault protection. SEF2 provides inverse time or definite time selective earth fault protection. SEF3 and SEF4 provide definite time earth fault protection.

24

6 F 2 T 0 1 7 4

When SEF employs IEEE, US or C (Configurable) inverse time characteristics, two reset modes are available: definite time or dependent time resetting. If the IEC inverse time characteristic is employed, definite time resetting is provided. For other characteristics, refer to Section 2.1.1.

In applications of SEF protection, it must be ensured that any erroneous zero-phase current is sufficiently low compared to the fault current, so that a highly sensitive setting is available.

The erroneous current may be caused with load current due to unbalanced configuration of the distribution lines, or mutual coupling from adjacent lines. The value of the erroneous current during normal conditions can be acquired on the metering screen of the relay front panel.

The earth fault current for SEF may be fed from a core balance CT, but if it is derived from three phase CTs, the erroneous current may be caused also by the CT error in phase faults. Transient false functioning may be prevented by a relatively long time delay.

Standby earth fault protection The SEF is energised from a CT connected in the power transformer low voltage neutral, and the standby earth fault protection trips the transformer to backup the low voltage feeder protection, and ensures that the neutral earthing resistor is not loaded beyond its rating. Stage 1 trips the transformer low voltage circuit breaker, then stage 2 trips the high voltage circuit breaker(s) with a time delay after stage 1 operates.

The time graded tripping is valid for transformers connected to a ring bus, banked transformers and feeder transformers.

Scheme Logic Figure 2.3.1 to Figure 2.3.4 show the scheme logic of inverse time or definite time selective earth fault protection and definite time earth fault protection.

In Figures 2.3.1 and 2.3.2, the definite time protection is selected by setting [MSE1] and [MSE2] to D. The element SEF1 is enabled for sensitive earth fault protection and stage 1 trip signal SEF1-S1 TRIP is given through the delayed pick-up timer TSE1. The element SEF2 is enabled and trip signal SEF2 TRIP is given through the delayed pick-up timer TSE2.

The inverse time protection is selected by setting [MSE1] and [MSE2] to either IEC, IEEE, US or C according to the inverse time characteristic to employ. The element SEF1 is enabled and stage 1 trip signal SEF1-S1 TRIP is given. The element SEF2 is enabled and trip signal SEF2 TRIP is given.

The SEF1 protection provide stage 2 trip signal SEF1-S2 through a delayed pick-up timer TSE1 S2.

When the standby earth fault protection is applied by introducing earth current from the transformer low voltage neutral circuit, stage 1 trip signals are used to trip the transformer low voltage circuit breaker. If SEF1-D or SEF1-I continues operating after stage 1 has operated, the stage 2 trip signal can be used to trip the transformer high voltage circuit breaker(s).

The signal SEF1 HS is used for blocked overcurrent protection and blocked busbar protection (refer to Section 2.9)

SEF protection can be disabled using scheme switch [SE1EN] and [SE2EN] or binary input signal SEF1 BLOCK and SEF2 BLOCK. The standby earth fault protection Stage 2 trip can be disabled using scheme switch [SE1S2].

ICD is the inrush current detector, which will detect second harmonic inrush current during transformer energisation, and can be used to block the SEF*-D element using scheme switch

25

6 F 2 T 0 1 7 4

[SE*-2F]. See Section 2.9

In Figures 2.3.4 and 2.3.5, SEF3 and SEF4 protections are programmable for instantaneous or definite time delayed operations with setting of delayed pick-up timers TSE3 and TSE4 and give trip signals SEF3 TRIP and SEF4 ALARM.

SEF1-D

1 SEF1 TRIP &

0.00 - 300.00s

TSE1 t 0

SEF1HS SEF1 HS SEF1-I

SEF1 BLOCK 1

"ON"

[SE1EN] + &

"D"

[MSE1]

"IEC"

"IEEE"

+

"US"

"C" &

1

121

67

92

SEF1

SEF1-S2 TRIP 0.00 - 300.00s

&

TSE1S2 t 0

+ "ON"

[SE1S2] 122

+ &

[SE1-2F]

ICD Block

Figure 2.3.1 Inverse Time or Definite Time SEF Protection SEF1

SEF2-D

1 SEF2 TRIP &

0.00 - 300.00s

TSE2 t 0

SEF2-I

SEF2 BLOCK 1

"ON"

[SE2EN] + &

"D"

[MSE2]

"IEC"

"IEEE"

+

"US"

"C" &

1

123

68 SEF2 + &

[SE2-2F]

ICD Block

Figure 2.3.2 Inverse Time or Definite Time SEF Protection SEF2

26

6 F 2 T 0 1 7 4

SEF3 SEF3 TRIP

0.00 - 300.00s

&

TSE3 t 0

SEF3 BLOCK 1

"ON"

[SE3EN] + &

124 69

&

[SE3-2F] Block +

ICD

Figure 2.3.3 Definite Time SEF Protection SEF3

SEF4 SEF4

ALARM 0.00 - 300.00s

&

TSE4 t 0

SEF4 BLOCK 1

"ON"

[SE4EN] + &

125 70

&

[SE4-2F] Block +

ICD

Figure 2.3.4 Definite Time SEF Scheme Logic

Setting The table below shows the setting elements necessary for the sensitive earth fault protection and their setting ranges.


SE1 0.025 5.00 A 0.001 A 0.100 A SEF1 threshold setting

0.010 1.500 0.001 1.000 SEF1 inverse time multiplier setting TSE1

0.00 300.00 s (*1) 0.01 s 1.00 s SEF1 definite time setting. Required if [MSE1] =DT.

TSE1R 0.0 300.0 s 0.1 s 0.0 s SEF1 definite time delayed reset. Required if [MSE1] =IEC or if [SE1R] = DEF.

TSE1RM 0.010 1.500 0.001 1.000 SEF1 dependent time delayed reset time multiplier. Required if [SE1R] = DEP.

TSE1S2 0.00 300.00 s (*1) 0.01 s 0.00 s SEF1 stage 2 definite time setting


TSE2 0.010 1.500 0.001 1.000 SEF2 inverse time multiplier setting

27

6 F 2 T 0 1 7 4

0.00 300.00 s (*2) 0.01 s 0.00 s SEF2 definite time setting.

TSE2R 0.0 300.0 s 0.1 s 0.0 s SEF2 definite time delayed reset. Required if [MSE2] =IEC or if [SE2R] = DEF.

TSE2RM 0.010 1.500 0.001 1.000 SEF2 dependent time delayed reset time multiplier. Required if [SE2R] = DEP.


TSE3 0.00 300.00 s (*1) 0.01 s 0.00 s SEF3 definite time setting.


TSE4 0.00 300.00 s (*1) 0.01 s 0.00 s SEF4 definite time setting.

[SE1EN] Off / On On SEF1 Enable

[MSE1] DT / IEC / IEEE / US / C D SEF1 characteristic

[MSE1C]

MSE1C-IEC MSE1C-IEEE MSE1C-US


NI MI CO2

SEF1 inverse curve type.

Required if [MSE1] = IEC. Required if [MSE1] = IEEE. Required if [MSE1] = US.

[SE1R] DEF / DEP DEF SEF1 reset characteristic. Required if [MSE1] = IEEE or US.

[SE1S2] Off / On Off SEF1 stage 2 timer enable

[SE1-2F] NA / Block NA SEF1 2f Block Enable

[SE2EN] Off / On Off SEF2 Enable

[MSE2] DT / IEC / IEEE / US / C D SEF2 characteristic

[MSE2C]

MSE2C-IEC MSE2C-IEEE MSE2C-US


NI MI CO2

SEF2 inverse curve type.

Required if [MSE2] = IEC. Required if [MSE2] = IEEE. Required if [MSE2] = US.

[SE2R] DEF / DEP DEF SEF2 reset characteristic. Required if [MSE2] = IEEE or US.





[SE4-2F] NA / Block NA SEF4 2f Block Enable (*1) Time setting of TSE1 TSE4 should be set in consideration of the SEF drop-off time

80-100ms.

SEF SEF is set smaller than the available earth fault current and larger than the erroneous zero-phase current. The erroneous zero-phase current exists under normal conditions due to the unbalanced feeder configuration. The zero-phase current is normally fed from a core balance CT on the feeder, but if it is derived from three phase CTs, the erroneous current may be caused also by the CT error in phase faults.

The erroneous steady state zero-phase current can be acquired on the metering screen of the relay front panel.

28

6 F 2 T 0 1 7 4

2.4 Phase Undercurrent Protection

The phase undercurrent protection is used to detect a decrease in current caused by a loss of load, typically motor load.

The undercurrent element operates for current falling through the threshold level. However, operation is blocked when the current falls below 4 % of CT secondary rating to discriminate the loss of load from the feeder tripping by other protection.

Each phase has two independent undercurrent elements for tripping and alarming. The elements are programmable for instantaneous or definite time delayed operation.

The undercurrent element operates on per phase basis, although tripping and alarming is three- phase only.

The tripping and alarming outputs can be blocked by scheme switches or a binary input signal.

Scheme Logic Figure 2.4.1 shows the scheme logic of the phase undercurrent protection.

Two undercurrent elements UC1 and UC2 output trip and alarm signals UC1 TRIP and UC2 ALARM through delayed pick-up timers TUC1 and TUC2.

Those protections can be disabled by the scheme switches [UC1EN] and [UC2EN] or binary input signal UC BLOCK.

C

B

A

UC1

+ "ON"

[UC1EN] 0.00 - 300.00s

&

&

&

TUC1 t 0

t 0

t 0

UC1 TRIP

UC1-A TRIP

UC1-B TRIP

UC1-C TRIP

1

UC BLOCK 1

C

B

A

UC2

+ "ON"

[UC2EN] 0.00 - 300.00s

&

&

&

TUC2 t 0

t 0

t 0

UC2 ALARM

UC2-A ALARM

UC2-B ALARM

UC2-C ALARM

1

71

72

73

74

75

76

126

127

128

129

130

131

132

133

Figure 2.4.1 Undercurrent Protection Scheme Logic

29

6 F 2 T 0 1 7 4

Settings The table below shows the setting elements necessary for the undercurrent protection and their setting ranges.


UC1 0.10 10.0 A 0.01 A 0.40 A UC1 threshold setting

TUC1 0.00 300.00 s 0.01 s 0.00 s UC1 definite time setting

UC2 0.10 10.0 A 0.01 A 0.20 A UC2 threshold setting

TUC2 0.00 300.00 s 0.01 s 0.00 s UC2 definite time setting

[UC1EN] Off / On Off UC1 Enable

[UC2EN] Off / On Off UC2 Enable

30

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2.5 Thermal Overload Protection

The stator temperature of motor rises according to an I2t function and the thermal overload protection in GRE120 provides a good protection against stator damage caused by sustained overloading. The protection simulates the changing thermal state in the plant using a thermal model.

The thermal state of the stator can be shown by equation (1).

s = %1001 122 t

AOL

eII

(1)

where:

s = thermal state of the stator as a percentage of allowable thermal capacity,

I = applied load current,

IAOL = allowable overload current of the stator,

1 = thermal heating time constant of the stator.

The thermal state 0% represents the cold state and 100% represents the thermal limit, which is the point at which no further temperature rise can be safely tolerated and the system should be disconnected. The thermal limit for any given system is fixed by the thermal setting IAOL. The relay gives a trip output when s= 100%.

The thermal state of the stator s is displayed as THM1 in Digest screen and "Metering" screen.

The thermal overload protection measures the largest of the three phase currents and operates according to the characteristics defined in IEC 60255-8. (Refer to Appendix A for the implementation of the thermal model to IEC 60255-8.)

Time to trip depends not only on the level of overload, but also on the level of load current prior to the overload - that is, on whether the overload was applied from cold or from hot.

Independent thresholds for trip and alarm are available.

The characteristic of thermal overload element is defined by equation (2) and equation (3) for cold and hot. The cold curve is a special case for which the prior load current Ip is zero, catering to the situation where a cold system is switched on to an immediate overload.

t =1Ln I

I IAOL

2

2 2 (2)

t =1Ln I I

I IP

AOL

2 2

2 2 (3)

where:

t = time to trip for constant overload current I (seconds)

I = overload current (largest phase current) (amps)

IAOL = allowable overload current (amps)

IP = previous load current (amps)

1= thermal heating time constant (seconds)

Ln = natural logarithm

Figure 2.5.1 illustrates the IEC 60255-8 curves for a range of time constant settings. The left-hand

31

6 F 2 T 0 1 7 4

chart shows the cold condition where an overload has been switched onto a previously un-loaded system. The right-hand chart shows the hot condition where an overload is switched onto a system that has previously been loaded to 90% of its capacity.

Thermal Curves (Cold Curve - noprior load)

0.01

0.1

1

10

100

1000

1 10Overload Current (Mult ip le of IAOL)

Ope

rate

Tim

e (m

inut

es)

Thermal Curves (Hot Curve -90% prior load)

0.001

0.01

0.1

1

10

100

1000

1 10

Overload Cu rrent (Mult iple o f IAOL)

Ope

rate

Tim

e (m

inut

es)

Figure 2.5.1 Thermal Curves

When the motor status is in the stopped state, the thermal state of stator can be shown by equation (4).

s = %100(0) 2t

s e (4)

where:


s(0) = thermal state of the stator at the instant when the motor stops,

2 = thermal cooling time constant of the stator.

The thermal state of the stator rises exponentially during motor operation to a certain temperature that is determined by the current magnitude. When the motor is stopped, the stator temperature decreases to the ambient temperature.

GRE120 requires settings for the heating time constant and the cooling time constant, which are normally supplied as motor data. Typically, the cooling time constant is 3 times the heating time constant.

100

50

20

10

5

2

1

50

20

10 5 2 1

100

32

6 F 2 T 0 1 7 4

Scheme Logic Figure 2.5.2 shows the scheme logic of the thermal overload protection.

The thermal overload element THM has independent thresholds for alarm and trip, and outputs alarm signal THM ALARM and trip signal THM TRIP. The alarming threshold level is set as a percentage of the tripping threshold.

The alarming and tripping can be disabled by the scheme switches [THMAEN] and [THMTEN] respectively or binary input signal THM BLOCK.

T

A THM

& THM ALARM

THM BLOCK 1

+ "ON"

[THMAEN]

+ "ON"

[THMEN]

THM TRIP &

77

78

Figure 2.5.2 Thermal Overload Protection Scheme Logic

Settings The table below shows the setting elements necessary for the thermal overload protection and their setting ranges.


THM 0.50 10.0 A 0.01 A 1.00 A Thermal overload setting. (THM = IAOL: allowable overload current)

THMIP 0.0 5.0 A 0.01 A 0.00 A Prior load setting.

TTHM1 0.5 - 500.0 min 0.1 min 10.0 min Thermal heating time constant

TTHM2 0.5 - 500.0 min 0.1 min 30.0 min Thermal cooling time constant

THMA 50 99 % 1 % 80 % Thermal alarm setting. (Percentage of THM setting.)

[THMEN] Off / On Off Thermal OL enable

[THMAEN] Off / On Off Thermal alarm enable

Note: THMIP sets a minimum level of previous load current to be used by the thermal element, and is typically used when testing the element. For the majority of applications, THMIP should be set to its default value of zero, in which case the previous load current, Ip, is calculated internally by the thermal model, providing memory of conditions occurring before an overload.

33

6 F 2 T 0 1 7 4

2.6 Negative Phase Sequence Overcurrent Protection

The negative phase sequence overcurrent protection (NPS) is applied to protect the rotor of a rotating machine from over-heating by detecting a load unbalance. Unbalanced voltage supply to a rotating machine due to a phase loss can lead to increases in the negative sequence current and in the machine over-heating.

The NPS is also used to detect asymmetrical faults (phase-to-phase and phase-to-earth faults) with high sensitivity in conjunction with phase overcurrent protection and residual overcurrent protection. Phase overcurrent protection is forced to be set to lower sensitivity when the load current is large but NPS sensitivity is not affected by magnitude of the load current, except in the case of erroneous negative sequence current due to the unbalanced configuration of the distribution lines.

For some earth faults, only a limited amount of zero sequence current is fed while the negative sequence current is comparatively larger. This is probable when the fault occurs at the remote end with a small reverse zero sequence impedance and most of the zero sequence current flows to the remote end.

In these cases, NPS backs up the phase overcurrent and residual overcurrent protection.

Two independent negative sequence overcurrent elements are provided for tripping and alarming. The elements are programmable for instantaneous or definite time delayed operation.

The tripping and alarming outputs can be blocked by scheme switches or a binary input signal.

Scheme Logic Figure 2.6.1 shows the scheme logic of the NPS. Two negative phase sequence overcurrent elements NPS1 and NPS2 with independent thresholds output trip signal NPS1 TRIP and alarm signal NPS2 ALARM through delayed pick-up timers TNPS1 and TNPS2.

ICD is the inrush current detector, which can detect second harmonic inrush current during transformer energisation, and can be used to block the NPS1 and NPS2 elements using the scheme switches [NPS1-2F] and [NPS2-2F] respectively. See section 2.9.

NPS1 NPS1 TRIP

0.00 - 300.00s

TNPS1 t 0

+ "ON"

[NPS1EN]

&

"ON"

[NPS2EN] +

NPS BLOCK 1

NPS2 ALARM

0.00 - 300.00s

TNPS2 t 0 NPS2

80

79

137

136

&

[NPS2-2F]

Block + ICD

&

[NPS1-2F]

Block + ICD

&

Figure 2.6.1 Negative Phase Sequence Overcurrent Protection Scheme Logic

34

6 F 2 T 0 1 7 4

The tripping and alarming can be disabled using scheme switches [NPS1], [NPS2] or binary input signal NPS BLOCK.

Settings The table below shows the setting elements necessary for the NPS protection and their setting ranges.


NPS1 0.10 -10.0 A 0.01 A 0.40 A NPS1 threshold setting for tripping.

NPS2 0.10 -10.0 A 0.01 A 0.20 A NPS2 threshold setting for alarming.

TNPS1 0.00 300.00 s 0.01 s 0.00 s NPS1 definite time setting

TNPS2 0.00 300.00 s 0.01 s 0.00 s NPS2 definite time setting

[NPS1EN] Off / On Off NPS1 Enable

[NPS1-2F] NA / Block NA NPS1 2f Block Enable

[NPS2EN] Off / On Off NPS2 Enable

[NPS2-2F] NA / Block NA NPS2 2f Block Enable

Sensitive setting of NPS1 and NPS2 thresholds is restricted by the negative phase sequence current normally present on the system. The negative phase sequence current is measured in the relay continuously and displayed on the metering screen of the relay front panel along with the maximum value. It is recommended to check the display at the commissioning stage and to set NPS1 and NPS2 to 130 to 150% of the maximum value displayed.

The delay time setting TNPS1 and TNPS2 is added to the inherent delay of the measuring elements NPS1 and NPS2. The minimum operating time of the NPS elements is around 200ms.

35

6 F 2 T 0 1 7 4

2.7 Broken Conductor Protection

Series faults or open circuit faults which do not accompany any earth faults or phase faults are caused by broken conductors, breaker contact failure, operation of fuses, or false operation of single-phase switchgear.

Figure 2.7.1 shows the sequence network connection diagram in the case of a single-phase series fault assuming that the positive, negative and zero sequence impedance of the left and right side system of the fault location is in the ratio of k1 to (1 k1), k2 to (1 k2) and k0 to (1 k0).

Positive phase sequence

Single-phase series fault

Zero phase sequence

k2Z2 (1-k2)Z2

k0Z0 (1-k0)Z0

E1A E1B

I1F I1F

I2F I2F

I0F I0F Negative phase sequence

(1-k1)Z1 k1Z1

E1B E1A

k1 1 k1

E1A E1B

I1F I1F

(1-k1)Z1 k1Z1 k2Z2 (1-k2)Z2

K0Z0 (1-k0)Z0

E1A E1B

I1F

Z1 Z2

Z0

Figure 2.7.1 Equivalent Circuit for a Single-phase Series Fault

36

6 F 2 T 0 1 7 4

Positive phase sequence current I1F, negative phase sequence current I2F and zero phase sequence current I0F at the fault location in a single-phase series fault are given by:

I1F + I2F + I0F =0 (1)

Z2FI2F Z0FI0F = 0 (2)

E1A E1B = Z1FI1F Z2FI2F (3)

where,

E1A, E1B: power source voltage

Z1: positive sequence impedance

Z2: negative sequence impedance

Z0: zero sequence impedance

From the equations (1), (2) and (3), the following equations are derived.

I1F = Z2 + Z0

Z1Z2 + Z1Z0 + Z2Z0 (E1A E1B)

I2F = Z0

Z1Z2 + Z1Z0 + Z2Z0 (E1A E1B)

I0F = Z2

Z1Z2 + Z1Z0 + Z2Z0 (E1A E1B)

The magnitude of the fault current depends on the overall system impedance, difference in phase angle and magnitude between the power source voltages behind both ends.

Broken conductor protection element BCD detects series faults by measuring the ratio of negative to positive phase sequence currents (I2F / I1F). This ratio is given with negative and zero sequence impedance of the system:

I2FI1F =

|I2F||I1F| =

Z0Z2 + Z0

The ratio is higher than 0.5 in a system when the zero sequence impedance is larger than the negative sequence impedance. It will approach 1.0 in a high-impedance earthed or a one-end earthed system.

The characteristic of BCD element is shown in Figure 2.7.2 to obtain the stable operation.

Figure 2.7.2 BCD Element Characteristic

I1

I2

0

0.01

0.04

|I2|/|I1| BCD setting

|I1| 0.04

& BCD

|I2| 0.01

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Scheme Logic Figure 2.7.3 shows the scheme logic of the broken conductor protection. BCD element outputs trip signals BCD TRIP through a delayed pick-up timer TBCD.

The tripping can be disabled by the scheme switch [BCDEN], binary input signal BCD BLOCK. The broken conductor protection is enabled when three-phase current is introduced.

ICD is the inrush current detector ICD, which can detect second harmonic inrush current during transformer energisation, and can be used to block the BCD element using scheme switch [BCD-2F]. See Section 2.9.

BCD BCD TRIP

0.00 - 300.00s

&

TBCD t 0

"ON"

[BCDEN] +

BCD BLOCK 1

138 81

&

[BCD-2F] Block +

ICD

Figure 2.7.3 Broken Conductor Protection Scheme Logic

Settings The table below shows the setting elements necessary for the broken conductor protection and their setting ranges.


BCD 0.10 1.00 0.01 0.20 I2 / I1

TBCD 0.00 300.00s 0.01s 0.00 s BCD definite time setting

[BCDEN] Off / On Off BCD Enable

[BCD-2F] NA / Block NA BCD 2f Block Enable

Minimum setting of the BC threshold is restricted by the negative phase sequence current normally present on the system. The ratio I2 / I1 of the system is measured in the relay continuously and displayed on the metering screen of the relay front panel, along with the maximum value of the last 15 minutes I21 max. It is recommended to check the display at the commissioning stage. The BCD setting should be 130 to 150% of I2 / I1 displayed.

Note: It must be noted that I2 / I1 is displayed only when the positive phase sequence current (or load current ) in the secondary circuit is larger than 2 % of the rated secondary circuit current.

TBCD should be set to more than 1 cycle to prevent unwanted operation caused by a transient operation such as CB closing.

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2.8 Breaker Failure Protection

When fault clearance fails due to a breaker failure, the breaker failure protection (BFP) clears the fault by backtripping adjacent circuit breakers.

If the current continues to flow even after a trip command is output, the BFP judges it as a breaker failure. The existence of the current is detected by an overcurrent element provided for each phase. For high-speed operation of the BFP, a high-speed reset overcurrent element (less than 20ms) is used. The element resets when the current falls below 80% of the operating value.

In order to prevent the BFP from starting by accident during maintenance work and testing, and thus tripping adjacent breakers, the BFP has the optional function of retripping the original breaker. To make sure that the breaker has actually failed, a trip command is made to the original breaker again before tripping the adjacent breakers to prevent unnecessary tripping of the adjacent breakers following the erroneous start-up of the BFP. It is possible to choose not to use retripping at all, or use retripping with trip command plus delayed pick-up timer, or retripping with trip command plus overcurrent detection plus delayed pick-up timer.

An overcurrent element and delayed pick-up timer are provided for each phase which also operate correctly during the breaker failure routine in the event of an evolving fault.

Scheme logic The BFP is performed on per-phase basis. Figure 2.8.1 shows the scheme logic for the BFP. The BFP is started by per-phase base trip signals EXT TRIP-A to -C or three-phase base trip signal EXT TRIP3PH of the external line protection or an internal trip signal CBF INIT. These trip signals must continuously exist as long as the fault is present.

The backtripping signal to the adjacent breakers CBF TRIP is output if the overcurrent element CBF operates continuously for the setting time of the delayed pick-up timer TBTC after initiation. Tripping of adjacent breakers can be blocked with the scheme switch [BTC].

There are two kinds of modes of the retrip signal to the original breaker CBF RETRIP, the mode in which retrip is controlled by the overcurrent element CBF, and the direct trip mode in which retrip is not controlled. The retrip mode together with the trip block can be selected with the scheme switch [RTC]. In the scheme switch [RTC], DIR is the direct trip mode, and OC is the trip mode controlled by the overcurrent element CBF.

Figure 2.8.2 shows a sequence diagram for the BFP when a retrip and backup trip are used. If the circuit breaker trips normally, the CBF is reset before timer TRTC or TBTC is picked up and the BFP is reset. As TRTC and TBTC start at the same time, the setting value of TBTC should include that of TRTC.

If the CBF continues to operate, a retrip command is given to the original breaker after the setting time of TRTC. Unless the breaker fails, the CBF is reset by retrip. TBTC does not time-out and the BFP is reset. This sequence of events may happen if the BFP is initiated by mistake and unnecessary tripping of the original breaker is unavoidable.

If the original breaker fails, retrip has no effect and the CBF continues operating and the TBTC finally picks up. A trip command CBF TRIP is given to the adjacent breakers and the BFP is completed.

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EXT TRIP-APH

EXT TRIP-BPH

+ "ON"

[BTC]

"DIR"

C

B

A

CBF CBF TRIP 1

&

&

CBF RETRIP 1 1

1

1

0.00 - 300.00s

TBTC t 0

t 0

t 0

0.00 - 300.00s

TRTC t 0

t 0

t 0

EXT TRIP-CPH

EXT TRIP3PH

CBF INIT

+ "OC"

[RTC]

&

&

&

&

&

&

&

1

1

1

82

83

84

140

139

187

188

189

Figure 2.8.1 Breaker Failure Protection Scheme Logic

Fault

CBF TRIP

TBTC

CBF RETRIP

TRTC

OCBF

Original breakers

Adjacent breakers

TRIP

Retrip

Toc Toc

Tcb T cb

TRTC

TBTC

Normal trip

Open Closed

Start CBFP

Open Open Closed

Trip

Figure 2.8.2 Sequence Diagram

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Setting The setting elements necessary for the breaker failure protection and their setting ranges are as follows:


CBF 0.10 10.0 A 0.05 A 0.50 A Overcurrent setting

TRTC 0.00 300.00 s 0.01 s 0.50 s Retrip time setting

TBTC 0.00 300.00 s 0.01 s 1.00 s Back trip time setting

[RTC] Off / DIR / OC Off Retrip control

[BTC] Off / On Off Back trip control

The overcurrent element CBF checks that the circuit breaker has opened and that the current has disappeared. Therefore, since it is allowed to respond to load current, it can be set to 10 to 200% of the rated current.

The settings of TRTC and TBTC are determined by the opening time of the original circuit breaker (Tcb in Figure 2.8.2) and the reset time of the overcurrent element (Toc in Figure 2.8.2). The timer setting example when using retrip can be obtained as follows.

Setting of TRTC = Breaker opening time + CBF reset time + Margin

= 40ms + 10ms + 20ms

= 70ms

Setting of TBTC = TRTC + Output relay operating time + Breaker opening time +

CBF reset time + Margin

= 70ms + 10ms + 40ms + 10ms + 10ms

= 140ms

If retrip is not used, the setting of the TBTC can be the same as the setting of the TRTC.

The actual tripping time after BFP start will be added the time (approx. 15 to 20ms) consumed by motion of binary input and output to above timers settings. (Response time of binary inputs: less than 8ms, Operating time of binary outputs: less than 10ms)

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2.9 Countermeasures for Magnetising Inrush

GRE120 provides the following two schemes to prevent incorrect operation due to magnetising inrush current during transformer energisation.

- Protection block by inrush current detector

- Cold load protection

2.9.1 Inrush Current Detector

The Inrush Current Detector ICD will detect second harmonic inrush current during transformer energisation and can be used to block the following protections:

- ROC1,ROC2,SOC and ALOC - EF1 to EF4 - SEF1 to SEF4 - NPS1 and NPS2 - BCD

Blocking can be enabled or disabled by the setting of scheme switches [ROC -2F], [SOC-2F], [ALOC-2F], [EF -2F], [SEF -2F], [NPS -2F] and [BCD-2F].

The ICD scheme detects the ratio ICD-2f of the second harmonic current I2f to the fundamental current I1f for each phase current, and will operate if the ratio is larger than the setting value. Figure 2.9.1 shows the characteristic of the ICD element and Figure 2.9.2 shows the ICD blocking scheme. When the ICD element operates, the OC, EF, SEF, NPS and BCD elements can be blocked independently. The scheme logic of each element is shown in the previous sections.

I1f 0

I2f/I1f

ICD-2f(%)

ICDOC

|I2f|/|I1f| ICD-2f(%)

|I1f| ICDOC

& ICD

Figure 2.9.1 ICD Element Characteristic

ICD

ICD 1

A

B

C

261

262

263

Figure 2.9.2 ICD Block Scheme

Setting The setting elements necessary for the ICD and their setting ranges are as follows:

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ICD-2f 10 50% 1% 15% Second harmonic detection

ICDOC 0.5 25.0 A (0.10 - 5.00 A)(*)

0.1 A (0.01 A)

0.5 A (0.10 A)

ICD threshold setting

2.9.2 Cold Load Protection

The cold load function modifies the overcurrent protection settings for a period after energising the system. This feature is used to prevent unwanted protection operation when closing on to the type of load which takes a high level of current for a period after energisation.

In normal operation, the load current on the distribution line is smaller than the sum of the rated loads connected to the line. But it can amount to several times the maximum load current for a short period when all of the loads are energised at once after a long interruption, and will decreases to approximately 1.5 times normal peak load typically after three or four seconds.

To protect those lines using an overcurrent element, it is necessary to use settings to discriminate between the inrush current encountered during cold load restoration and the fault currents.

This function modifies the overcurrent protection settings for a period after closing on to the type of load that takes a high level of current on energisation. This is achieved using a Cold Load Settings Group, in which the user can use alternative settings for the measuring elements in another settings group. Normally the user will choose higher current settings and/or longer time delays and/or disable elements altogether within this group. The Cold Load Settings can be set in any of the four setting groups provided for protection and the group is specified by the scheme switch [CLSG] setting.

* GRE120 overcurrent characteristics change according to the motor status independently of the cold load protection.

2.9.2.1 Scheme Logic A state transition diagram and scheme logic are shown in Figure 2.9.3 and Figure 2.9.4 for the cold load protection. Note that the scheme requires the use of two binary inputs, one each for CB OPEN and CB CLOSED.

Under normal conditions, where the circuit breaker has been closed for some time, the scheme is in STATE 0, and the normal default settings group is applied to the overcurrent protection.

If the circuit breaker opens then the scheme moves to STATE 1 and runs the Cold Load Enable timer TCLE. If the breaker closes again while the timer is running, then STATE 0 is re-entered. Alternatively, if TCLE expires then the load is considered cold and the scheme moves to STATE 2, and stays there until the breaker closes, upon which it goes to STATE 3.

In STATE 2 and STATE 3, the Cold Load Settings Group is applied.

In STATE 3 the Cold Load Reset timer TCLR runs. If the circuit breaker re-opens while the timer is running then the scheme returns to STATE 2. Alternatively, if TCLR expires then it goes to STATE 0, the load is considered warm and normal settings can again be applied.

Accelerated reset of the cold load protection is also possible. In STATE 3, the phase currents are monitored by overcurrent element ICLDO and if all of the phase currents drop below the ICLDO threshold for longer than the cold load drop off time (TCLDO) then the scheme will automatically revert to STATE 0. The accelerated reset function can be enabled with the scheme switch [CLDOEN] setting.

Cold load protection can be disabled by setting [CLSG] to Off.

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STATE 0 CB status: Closed Settings: Normal Monitor CB status

STATE 1 CB status: Open Settings: Normal Run TCLE timer Monitor CB status

STATE 2 CB status: Open Settings: Cold Load Monitor CB status

STATE 3 CB status: Closed Settings: Cold Load Run TCLR timer Monitor CB status Monitor load current IL

CB opens CB closes within TCLE time

TCLE timer expires

CB closes

CB opens within CLR time

TCLR timer expires

IL

44

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Settings The setting elements necessary for the cold load protection and their setting ranges are as follows:


ICLDO 0.10 10.0 A 0.01 A 0.50 A Cold load drop-off threshold setting

TCLE 0-10000 s 1 s 100 s Cold load enable timer

TCLR 0-10000 s 1 s 100 s Cold load reset timer

TCLDO 0.00-100.00 s 0.01 s 0.00 s Cold load drop-off timer

[CLSG] Off / 1 / 2 Off Cold load setting group

[CLDOEN] Off / On Off Cold load drop-off enable These settings are required for all setting groups and the same settings must be entered for the setting elements above.

2.10 Motor Protection functions

GRE120 provides the following four protection elements specifically for motor protection.

- Start Protection

- Stalled motor protection

- Locked rotor protection

- Restart Inhibit

2.10.1 Start Protection

The start protection operates when the start-up time exceeds the setting of start protection time (TEXST). The start-up time is defined in section 2.0. The start protection element is shown in Figure 2.10.1.

The start protection timer pick up is the last time that the current exceeds 150% of motor rated current within the duration of the motor start-up time setting (TMTST). GRE120 determines that the motor is in the start-up state when the start protection time (TEXST) is running even though the start-up time (TMTST) has expired. The start protection timer pick up is shown Figure 2.10.2.

If the motor current does not exceed 150% of motor rated current during the motor start-up time (TMTST), then the start protection does not operate..

Figure 2.10.1 Start Protection Characteristic

45

6 F 2 T 0 1 7 4

Figure 2.10.2 Start Protection timer pick up

Scheme logic

EXST EXST TRIP &

"ON"

[EXSTEN] +

EXST BLOCK 1

307 306

Figure 2.10.3 Scheme Logic for Start Protection

Setting The setting elements necessary for the Start Protection and their setting ranges are as follows:


TEXST 0.1 300.0 s 0.1 s 60.0 s Start protection time setting

TMTST 0.1 300.0 s 0.1 s 60.0 s Motor Start-up time setting

[EXSTEN] Off / On On Start protection Enable

2.10.2 Stalled motor Protection

The stalled motor protection uses a binary input signal from a tachometer (Speed SW) to determine that the motor is in a stalled condition during start-up or running.

The speed switch should be connected such that when the speed falls (stall condition), the switch opens and disconnects an auxiliary voltage at the binary input terminal. Therefore, the binary input setting should be SPDSW with the sense of Inv setting.

Scheme logic The stalled motor protection operates when detecting an overcurrent condition coincident with a binary input signal from a tachometer (Speed SW) .

46

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STRT STRT TRIP

0.00 - 300.00s

&

TSTRT t 0

"ON"

[STRTEN] +

STRT BLOCK 1

309 308

SPDSW BI signal

Figure 2.10.4 Scheme Logic for Stalled motor Protection

Setting The setting elements necessary for the Stalled motor protection and their setting ranges are as follows:


STRT 0.10 50.00 A 5.00 A 5.00 A Stalled motor protection detective current setting

TSTRT 0.00 300.00 s 0.01 s 0.00 s Stalled motor protection time

[STRTEN] Off / On On Stalled motor protection Enable

SPEED SW Binary input setting of Speed SW

2.10.3 Locked Rotor Protection

The Locked Rotor protection is a function for protecting the rotor of the motor as opposed to the overload function which protects the stator of the motor.

GRE120 simulates the temperature rises of the stator and rotor independently because each has a different thermal characteristics.

For motor currents that are below about 2.5 times the motor rated current, the heat of the motor is produced mainly by the stator, while for higher motor currents, the rotor produces most of the heat.

For this reason, GRE120 performs temperature rise simulation for the rotor as follows,

When the motor current is less than 2.5 times the motor rated current (0 < I (t) < 2.5 x IMOT )

The thermal state of the rotor (r) is made to converge into the thermal state of the stator (s) by the heating time constant 1.

The thermal state of the rotor when the motor current is less than 2.5 times the motor rated current can be shown by equation (1).

r = 11st

e (1)

where:

47

6 F 2 T 0 1 7 4

r = thermal state of the rotor as a percentage,


1 = thermal heating time constant of the stator.

When the motor current is higher than 2.5 times the motor rated current ( I (t) > 2.5 x IMOT )

From the heating characteristic under locked rotor conditions that is determined by the motor start-up current (Ist ; LKRST) and the allowable locked rotor time (Tsc; TLKRT), the temperature rise of the rotor is simulated.

The thermal state of the rotor when the motor current is higher than 2.5 times the motor rated current can be shown by equation (2).

r = tT1

II(t)(0) rm

sc

2

st

(2)

where:

r = thermal state of the rotor as a percentage,

r(0) = thermal state of the stator as a percentage when the rotor is locked,

I(t) = motor current,

Ist = motor start-up current,

Tsc = allowable locking time in the cold state,

rm = percentage of allowable thermal capacity of rotor as a ratio ofs.

When ther =rm the Locked rotor protection operates.

The operation characteristic (operating time) in the locked state varies depending on the heated condition of the motor and the conducting current.

The thermal state of the rotor r is displayed as THM2 in Digest screen and "Metering" screen, when the motor current is higher than 2.5 times the motor rated current

When starting current is flowing in the locked state, the operating time will be as follows:

( I ) In cold condition (motor is cool)

In equation (2), sincer(0) = 0 and I(t) = Ist , the operating time is t = Tsc.

( II ) In hot condition (motor is running at the rated current(IMOT) for a long period)

In equation (2), sincer(0) =sn and I(t) = Ist , the operating time will be Tsh.

Tsh =

sc

rm

rm Tsn (3)

where:

Tsh = allowable locked rotor time in hot condition,

sn = thermal state of the stator at motor rated current ( IMOT/THM 100(%)).

(III) In operating condition

48

6 F 2 T 0 1 7 4

In reality, r(0) falls between 0 andsn. The operating time in this case will be given by equation (4).

Top =

sc

rm

rm T(0) (4)

where:

Top = operating time,

Figure 2.10.5 illustrates the IEC 60255-8 curves for a range of time constant settings for the Locked Rotor protection characteristic. This chart shows the hot condition where an overload is switched onto a system that has previously been loaded to 0% or 90% of its capacity and following setting.

motor rated current full load current

thermal heating time constant of the stator = 10 min.

motor start-up current ( Ist ) = 5 times motor rated current

allowable locked rotor time in the cold state ( Tsc ) = 10 sec.

percentage of allowable thermal capacity of rotor ( rm ) = 150%

Thermal Curves ( 0% or 90% prior load)

with Locked Rotor Protection

1

10

100

1000

10000

1 10

Over load Current (Multiple of k .IFLC)

Ope

rate

Tim

e (m

inut

es)

Figure 2.10.5 Thermal Curve with Locked Rotor Protection

0%

90%

49

6 F 2 T 0 1 7 4

Scheme logic

LKRT LKRT TRIP &

"ON"

[LKRTEN] +

LKRT BLOCK 1

311 310

Figure 2.10.6 Scheme Logic for Locked Rotor Protection

If the scheme switch of Thermal overload protection [THMEN] or [THMAEN] is disabled, the Locked Rotor protection is NOT available.

Setting The setting elements necessary for the Locked Rotor protection and their setting ranges are as follows:


RTTHM 50 500 % 1 % 200 % Rotor allowable thermal capacity

LKRTIS 0.10 100.00 A 0.01 A 7.50 A Motor start-up current

TLKRT 1 300 s 1 s 20 s Allowable locking time

[LKRTEN] Off / On On Locked rotor protection Enable

The rotor allowable thermal capacity setting rm (RTTHM) is set as a ratio of the thermal state of the stator allowable thermal capacitys (THM = IAOL: allowable overload current of stator).

For example,

Motor full load current is set to the allowable overload current of stator (THM) = 120A

Locked rotor current of motor is maximum current when the rotor is locked = 360A

Then the setting of allowable thermal capacity of rotorrm (RTTHM) is 360/120=300(%) .

2.10.4 Restart Inhibit

The Restart Inhibit function detects the start-up current and the start-up time to determine whether the thermal state of the rotor will exceed its allowable thermal capacity when the motor is started. If the allowable thermal state of rotor is exceeded, this protective function issues a lock signal to prevent the motor starting (CB close command).

The rotor heating caused by a single starting operation is expressed by the equation(5).

rmsc

st

2

st TT

II(t)

(5)

50

6 F 2 T 0 1 7 4

At start-up I(t) = Ist , then the expression becomes as equation(6),

rmsc

st

TT

(6)

where:

Tst = motor start-up time,

Tsc = allowable locking time in the cold state,

rm = percentage of allowable thermal capacity of rotor,

Ist = motor start-up current.

When there is no margin defined in equation (7) between the thermal state of rotor r and the allowable thermal capacity of rotorrm , then the output signal of motor starting (CB close) is blocked.

rmsc

strm T

T)( (7)

The characteristic of the Restart Inhibit function is shown Figure 2.10.7.

Figure 2.10.7 Restart Inhibit Characteristic

Scheme logic

RSIH RSIH ALARM &

"ON"

[RSIHEN] +

RSIH BLOCK 1

313 312

Figure 2.10.8 Scheme Logic for Restart Inhibit

If the scheme switch of Thermal overload protection [THMEN] or [THMAEN] is disabled, the Restart Inhibit function is NOT available.

Setting The setting elements necessary for the Restart Inhibit and their setting ranges are as follows:

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6 F 2 T 0 1 7 4



TLKRT 1 300 s 1 s 20 s Rotor restraint time

RTTHM 50 500 % 1 % 200 % Rotor permissible heat range

[RSIHEN] Off / On On Restart inhibit Enable

2.10.5 Emergency Start

The emergency start function allows motor start-up (CB close command) although the Restart Inhibit function operated. This function is activated by binary input signal of emergency start (EMRST). The emergency start is activated while the selected binary input is energized, and the Restart Inhibit function will be ignored.

CAUTION The emergency start function is used only in an emergency situation. Since the Restart Inhibit function is overridden, damage to the motor may result.

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2.11 Trip Signal Output

As shown in Figure 2.11.1, all the trip signals ar

instruction manual motor protection … 6 f 2 t 0 1 7 4 safety precautions before using this...

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