instruction set of 8086 microprocessor

22
Instruction set of 8086 Microprocessor (Classification of Instructions) Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions Program Execution Transfer Instructions String Instructions Processor Control Instructions 1.DATA TRANSFER INSTRUCTIONS These instructions are used to transfer data from source to destination. The operand can be a constant, memory location, register or I/O port address. Mnemonic Meaning Format Operation MOV Move Mov D,S (S) à (D) XCHG Exchange XCHG D,S (S) (D) LEA Load Effective Address LEA Reg16,EA EA à (Reg16) LDS Load Register And DS LDS Reg16,MEM32 (MEM32) à (Reg16) (Mem32+2) à (DS) VCET-EEE Dept created by C.GOKUL AP/EEE

Upload: velalar-college-of-engineering-and-technology

Post on 06-May-2015

3.048 views

Category:

Education


0 download

DESCRIPTION

8086 Instruction set

TRANSCRIPT

Page 1: Instruction set of 8086 Microprocessor

Instruction set of 8086 Microprocessor (Classification of Instructions)

Data Transfer Instructions

Arithmetic Instructions

Bit Manipulation Instructions

Program Execution Transfer Instructions

String Instructions

Processor Control Instructions

1. DATA TRANSFER INSTRUCTIONS

These instructions are used to transfer data from source to destination.

The operand can be a constant, memory location, register or I/O port address.

Mnemonic Meaning Format Operation

MOV Move Mov D,S (S) à (D)

XCHG Exchange XCHG D,S (S) (D)

LEA Load Effective Address

LEA Reg16,EA EA à (Reg16)

LDS Load Register And DS

LDS Reg16,MEM32 (MEM32) à (Reg16)

(Mem32+2) à (DS)

LES Load Register &ES

LES Reg16,MEM32 (MEM32) à (Reg16)(Mem32+2) à (DS)

i. MOV Des, Src

Src operand can be register, memory location or immediate operand.

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 2: Instruction set of 8086 Microprocessor

Des can be register or memory operand.

Both Src and Des cannot be memory location at the same time.

E.g.: MOV CX, 037A H , MOV AL, BL

ii. PUSH Operand

It pushes the operand into top of stack.

E.g.: PUSH BX

iii. POP Des

It pops the operand from top of stack to Des.

Des can be a general purpose register, segment register (except CS) or memory location.

E.g.: POP AX

iv. XCHG Des, Src

This instruction exchanges Src with Des.

It cannot exchange two memory locations directly.

E.g.: XCHG DX, AX

v. IN Accumulator, Port Address

It transfers the operand from specified port to accumulator register.

E.g.: IN AX, 0028 H

vi. OUT Port Address, Accumulator

It transfers the operand from accumulator to specified port.

E.g.: OUT 0028 H, AX

vii. LDS Des, Src

It loads 32-bit pointer from memory source to destination register and DS.

E.g: LDS BX, [0301 H]

viii. LES Des, Src

It loads 32-bit pointer from memory source to destination register and ES.

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 3: Instruction set of 8086 Microprocessor

ix LAHF

It copies the lower byte of flag register to AH.

x SAHF

It copies the contents of AH to lower byte of flag register.

xi PUSHF

Pushes flag register to top of stack.

xii POPF

Pops the stack top to flag register.

2. ARITHMETIC INSTRUCTIONS

Mnemonic Meaning Format Operation

SUB Subtract SUB D,S (D) - (S) à (D)

Borrow à (CF)

SBB Subtract with borrow

SBB D,S (D) - (S) - (CF) à (D)

DEC Decrement by one

DEC D (D) - 1 à (D)

NEG Negate NEG D

DAS Decimal adjust for subtraction

DAS Convert the result in AL to packed decimal format

AAS ASCII adjust for subtraction

AAS (AL) difference (AH) dec by 1 if borrow

ADD Addition ADD D,S (S)+(D) à (D)

carry à (CF)

ADC Add with carry ADC D,S (S)+(D)+(CF) à (D)

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 4: Instruction set of 8086 Microprocessor

carry à (CF)

INC Increment by one

INC D (D)+1 à (D)

AAA ASCII adjust for addition

AAA If the sum is >9, AH

is incremented by 1

DAA Decimal adjust for addition

DAA Adjust AL for decimal

Packed BCD

i. ADC Des, Src: It adds the two operands with CF.

It effects AF, CF, OF, PF, SF, ZF flags.

E.g ADC AL, 74H ADC DX, AX

ii. ADD Des, Src

It adds a byte to byte or a word to word.

It effects AF, CF, OF, PF, SF, ZF flags.

E.g ADD AL, 74H ADD DX, AX

iii. SUB Des, Src

It subtracts a byte from byte or a word from word.

It effects AF, CF, OF, PF, SF, ZF flags.

For subtraction, CF acts as borrow flag.

iv. SBB Des, Src

It subtracts the two operands and also the borrow from the result

Eg: SBB AL, 74H SBB DX, AX

v. INC Src

It increments the byte or word by one.

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 5: Instruction set of 8086 Microprocessor

It effects AF, OF, PF, SF, ZF flags. CF is not effected

vi. DEC Src

It decrements the byte or word by one. It effects AF, OF, PF, SF, ZF flags. CF is not effected

vii. AAA (ASCII Adjust after Addition)

The data entered from the terminal is in ASCII format

o AAS (ASCII Adjust after Subtraction)

o AAM (ASCII Adjust after Multiplication)

o AAD (ASCII Adjust Before Division)

viii. DAA (Decimal Adjust after Addition)

It is used to make sure that the result of adding two BCD numbers is adjusted to be a correct BCD number.

It only works on AL register

ix. DAS (Decimal Adjust after Subtraction)

It is used to make sure that the result of subtracting two BCD numbers is adjusted to be a correct BCD number.

It only works on AL register.

x. NEG Src

It creates 2’s complement of a given number.

That means, it changes the sign of a number.

xi. CMP Des, Src

It compares two specified bytes or words.

The Src and Des can be a constant, register or memory location.

Both operands cannot be a memory location at the same time.

The comparison is done simply by internally subtracting the source from destination.

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 6: Instruction set of 8086 Microprocessor

The value of source and destination does not change, but the flags are modified to indicate the result.

xii. MUL Src

It is an unsigned multiplication instruction.

It multiplies two bytes to produce a word or two words to produce a double word.

AX = AL * Src

DX : AX = AX * Src

This instruction assumes one of the operand in AL or AX.

Src can be a register or memory location.

xiii. IMUL Src :

It is a signed multiplication instruction

xiv. DIV Src :

It is an unsigned division instruction.

It divides word by byte or double word by word.

The operand is stored in AX, divisor is Src and the result is stored as:

AH = remainder AL = quotient

xv. IDIV Src :

It is a signed division instruction

xvi. CBW (Convert Byte to Word)

This instruction converts byte in AL to word in AX.

The conversion is done by extending the sign bit of AL throughout AH.

xvii. CWD (Convert Word to Double Word)

This instruction converts word in AX to double word in DX : AX

The conversion is done by extending the sign bit of AX throughout DX

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 7: Instruction set of 8086 Microprocessor

Multiplication and Division Examples

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 8: Instruction set of 8086 Microprocessor

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 9: Instruction set of 8086 Microprocessor

MULTIPLICATION AND DIVISION:

Multiplication

(MUL or IMUL)

Multiplicand Operand

(Multiplier)

Result

Byte*Byte AL Register or memory AX

Word*Word AX Register or memory DX :AX

Dword*Dword EAX Register or memory EAX :EDX

Division

(DIV or IDIV)

Dividend Operand

(Divisor)

Quotient: Remainder

Word/Byte AX Register or Memory AL : AH

Dword/Word DX:AX Register or Memory AX : DX

Qword/Dword EDX: EAX Register or Memory EAX : EDX

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 10: Instruction set of 8086 Microprocessor

3. Bit Manipulation Instructions

These instructions are used at the bit level.

These instructions can be used for:

Testing a zero bit

Set or reset a bit

Shift bits across registers

Mnemonic Meaning Format Operation

AND

OR

XOR

NOT

Logical AND

Logical Inclusive OR

Logical Exclusive OR

LOGICAL NOT

AND D,S

OR D,S

XOR D,S

NOT D

(S) · (D) → (D)

(S) + (D) → (D)

(S) (D) → (D)

(D) → (D)

i. AND

Especially used in clearing certain bits (masking)

xxxx xxxx AND 0000 1111 = 0000 xxxx

(clear the first four bits B7-B4)

–Examples: AND BL, 0FH

ii. OR

Used in setting certain bits

xxxx xxxx OR 0000 1111 = xxxx 1111

(Set the upper four bits B4-B0)

iii. XOR

Used in Inverting bits

xxxx xxxx XOR 0000 1111 = xxxx x’x’x’x’ (Invert the upper four bits B4-B0)

Example: Clear bits 0 and 1, set bits 6 and 7, invert bit 5 of register CL:

VCET-EEE Dept created by C.GOKUL AP/EEE

+

Page 11: Instruction set of 8086 Microprocessor

AND CL, FCH ; 1111 1100B

OR CL, C0H ; 1100 0000B

XOR CL, 20H ; 0010 0000B

iv. SHL

The SHL (shift left) instruction performs a logical left shift on the destination operand, filling the lowest bit with 0.

Example:

mov DL,4

shl DL,1 RESULT DL =10 ( 4 * 21 = 8 )

v. SHR

The SHR (shift right) instruction performs a logical right shift on the destination operand. The highest bit position is filled with a zero

Example:

mov DL,8

shr DL,1 RESULT DL =4 ( 8 / 21 = 4 )

vi. SAR

performs a right arithmetic shift on the destination operand

Example:

mov DL,-8

sar DL,2 RESULT DL = - 2 ( - 8 / 22 = - 2 )

vii. ROL

ROL (rotate) shifts each bit to the left

The highest bit is copied into both the Carry flag and into the lowest bit

No bits are lost

Example:

Example:

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 12: Instruction set of 8086 Microprocessor

viii. ROR

ROR (rotate right) shifts each bit to the right

The lowest bit is copied into both the Carry flag and into the highest bit

No bits are lost

ix. RCL

RCL (rotate carry left) shifts each bit to the left

Copies the Carry flag to the least significant bit

VCET-EEE Dept created by C.GOKUL AP/EEE

MOV Al,11110000bROL Al,1; AL = 11100001b

MOV Dl,3FhROL Dl,4; DL = F3h

MOV AL,11110000bROR AL,1; AL = 01111000b

MOV DL,3FhROR DL,4; DL = F3h

Page 13: Instruction set of 8086 Microprocessor

Copies the most significant bit to the Carry flag

x. ROR Instruction

ROR (rotate right) shifts each bit to the right

The lowest bit is copied into both the Carry flag and into the highest bit

No bits are lost

xi. RCR

RCR (rotate carry right) shifts each bit to the right

Copies the Carry flag to the most significant bit

Copies the least significant bit to the Carry flag

VCET-EEE Dept created by C.GOKUL AP/EEE

CLC; CF = 0MOV BL,88H; CF,BL = 0 10001000bRCL BL,1; CF,BL = 1 00010000bRCL BL,1; CF,BL = 0 00100001b

MOV AL,11110000bROR AL,1; AL = 01111000b

MOV DL,3FhROR DL,4; DL = F3h

Page 14: Instruction set of 8086 Microprocessor

4. PROGRAM EXECUTION TRANSFER INSTRUCTIONS

These instructions cause change in the sequence of the execution of instruction.

This change can be through a condition or sometimes unconditional.

The conditions are represented by flags.

i. CALL Des

This instruction is used to call a subroutine or function or procedure.

VCET-EEE Dept created by C.GOKUL AP/EEE

STC ; CF = 1MOV AH,10H ; CF,AH = 00010000 1RCR AH,1 ; CF,AH = 10001000 0

Page 15: Instruction set of 8086 Microprocessor

The address of next instruction after CALL is saved onto stack.

ii. RET

It returns the control from procedure to calling program.

Every CALL instruction should have a RET.

iii. JMP Des

This instruction is used for unconditional jump from one place to another

iv. Jxx Des

All the conditional jumps follow some conditional statements or any instruction that affects the flag

Mnemonic

meaning condition

JA Above CF=0 and ZF=0

JB Above or Equal CF=0

JB Below CF=1

JBE Below or Equal CF=1 or ZF=1

JC Carry CF=1

JCXZ CX register is Zero (CF or ZF)=0

JE Equal ZF=1

JG Greater ZF=0 and SF=OF

JGE Greater or Equal SF=OF

JL Less (SF XOR OF) = 1

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 16: Instruction set of 8086 Microprocessor

Mnemonic meaning condition

JLE Less or Equal ((SF XOR OF) or ZF) = 1

JNA Not Above CF =1 or Zf=1

JNAE Not Above nor Equal CF = 1

JNB Not Below CF = 0

JNBE Not Below nor Equal CF = 0 and ZF = 0

JNC Not Carry CF = 0

JNE Not Equal ZF = 0

JNG Not Greater ((SF XOR OF) or ZF)=1

JNGE Not Greater nor Equal (SF XOR OF) = 1

JNL Not Less SF = OF

Mnemonic

meaning format Operation

LOOP Loop Loop short-label

(CX) ß (CX) – 1

Jump to location given by short-label if CX ≠ 0

LOOPE/ LOOPZ

Loop while equal/ loop

LOOPE/LOOPZ short-label

(CX) ß (CX) – 1

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 17: Instruction set of 8086 Microprocessor

while zero Jump to location given by short-label if CX ≠ 0 and ZF=1

LOOPNE/ LOOPNZ

Loop while not equal/ loop while not zero

LOOPNE/LOOPNZ short-label

(CX) ß (CX) – 1

Jump to location given by short-label if CX ≠ 0 and ZF=0

v. Loop Des:

This is a looping instruction.

The number of times looping is required is placed in the CX register.

With each iteration, the contents of CX are decremented.

ZF is checked whether to loop again or not.

5. STRING INSTRUCTIONS

String in assembly language is just a sequentially stored bytes or words.

There are very strong set of string instructions in 8086.

By using these string instructions, the size of the program is considerably reduced.

CMPS Des, Src:

o It compares the string bytes or words.

SCAS String:

It scans a string.

It compares the String with byte in AL or with word in AX.

MOVS / MOVSB / MOVSW

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 18: Instruction set of 8086 Microprocessor

It causes moving of byte or word from one string to another.

In this instruction, the source string is in Data Segment and destination string is in Extra Segment.

SI and DI store the offset values for source and destination index.

REP (Repeat):

This is an instruction prefix.

It causes the repetition of the instruction until CX becomes zero.

E.g.: REP MOVSB STR1, STR2

a. It copies byte by byte contents.

b. REP repeats the operation MOVSB until CX becomes zero.

6. PROCESSOR CONTROL INSTRUCTIONS

These instructions control the processor itself.

8086 allows to control certain control flags that:

causes the processing in a certain direction

processor synchronization if more than one microprocessor attached.

STC:

o It sets the carry flag to 1.

CLC:

o It clears the carry flag to 0.

CMC:

o It complements the carry flag.

STD:

o It sets the direction flag to 1.

o If it is set, string bytes are accessed from higher memory address to

lower memory address.

CLD:

VCET-EEE Dept created by C.GOKUL AP/EEE

Page 19: Instruction set of 8086 Microprocessor

o It clears the direction flag to 0.

o If it is reset, the string bytes are accessed from lower memory address to

higher memory address.

HLT instruction – HALT processing

The HLT instruction will cause the 8086 to stop fetching and executing instructions.

NOP instruction

this instruction simply takes up three clock cycles and does no processing.

LOCK instruction

This is a prefix to an instruction. This prefix makes sure that during execution of the instruction, control of system bus is not taken by other microprocessor.

WAIT instruction

This instruction takes 8086 to an idle condition. The CPU will not do any processing during this.

ESC instruction

whenever this instruction executes, the microprocessor does NOP or access a data from memory for coprocessor. This instruction passes the information to 8087 math processor. Six bits of ESC instruction provide the opcode to coprocessor.

when 8086 fetches instruction bytes, co-processor also picks up these bytes and puts in its queue. The co-processor will treat normal 8086 instructions as NOP. Floating point instructions are executed by 8087 and during this 8086 will be in WAIT.

VCET-EEE Dept created by C.GOKUL AP/EEE