# integrated circuits laboratory

Post on 17-Nov-2014

133 views

Embed Size (px)

TRANSCRIPT

INTEGRATED CIRCUITS LABORATORY

SYLLABUS1

EC 1314 AIM:

INTEGRATED CIRCUITS LABORATORY

0 0 3

100

To study various digital & linear integrated circuits used in simple system configuration. LIST OF EXPERIMENTS: 1. Study of Basic Digital ICs. Verification of truth table for AND, OR, EXOR, NOT, NOR, NAND, JK FF, RS FF, D FF) 2. Implementation of Boolean Functions, Adder/ Subtractor circuits. 3.a). Code converters, Parity generator and parity checking, Excess 3, 2s Complement, Binary to gray code using suitable ICs . b) Encoders and Decoders: Decimal and Implementation of 4-bit shift registers in SISO,SIPO,PISO,PIPO modes using suitable ICs. 4. Counters: Design and implementation of 4-bit modulo counters as synchronous and asynchronous types using FF ICs and specific counter IC. 5. Shift Registers: Design and implementation of 4-bit shift registers in SISO, SIPO, PISO, PIPO modes using suitable ICs. 6. Multiplex/ De-multiplex : Study of 4:1; 8:1 multiplexer and Study of 1:4; 1:8 demultiplexer 7. Timer IC application. Study of NE/SE 555 timer in Astable, Monostable operation. 8. Application of Op-Amp-I Slew rate verifications, inverting and non-inverting amplifier, Adder, comparator, Integrator and Differentiator. 9. Study of Analog to Digital Converter and Digital to Analog Converter: Verification of A/D conversion using dedicated ICs. 10. Study of VCO and PLL ICs i. Voltage to frequency characteristics of NE/ SE 566 IC. ii. Frequency multiplication using NE/SE 565 PLL IC. P = 45 Total = 45

DETAILED SYLLABUS2

1.

Study of Basic Digital ICs. (Verification of truth table for AND, OR, EXOR, NOT, NOR, NAND, JK FF, RS FF, D FF) Aim To test of ICs by using verification of truth table of basic ICs. Exercise 1. Breadboard connection of ICs with truth table verification using LEDs.

2. Implementation of Boolean Functions, Adder/ Subtractor circuits. [Minimization using K-map and implementing the same in POS, SOP from Using basic gates] Aim Minimization of functions using K-map implementation and combination Circuit. Exercise 1. Realization of functions using SOP, POS, form. 2. Addition, Subtraction of at least 3 bit binary number using basic gate IC s. 3a) Code converters, Parity generator and parity checking, Excess 3, 2s Complement, Binary to gray code using suitable ICs . Aim Realizing code conversion of numbers of different bar. Exercise 1 2. 3b) Conversion Binary to Grey, Grey to Binary; 1s. 2s complement of numbers addition, subtraction, Parity checking of numbers using Gates and with dedicated ICs

Encoders and Decoders: Decimal and Implementation of 4-bit shift registers in SISO, SIPO, PISO, PIPO modes using suitable ICs. Exercise 1. Decimal to binary Conversion using dedicated ICs. 2. BCD 7 Segment display decoder using dedicated decoder IC& display. Counters: Design and implementation of 4-bit modulo counters as synchronous and asynchronous types using FF ICs and specific counter IC 3

4.

Aim Design and implementation of 4 bit modulo counters. Exercise 1. 2. 5. Using flip-flop for up-down count synchronous count. Realization of counter function using dedicated ICs.

Shift Registers Design and implementation of 4-bit shift registers in SISO, SIPO, PISO, PIPO modes using suitable ICs. Aim Design and implementation of shift register. Exercise 1. 2. Shift Register function realization of the above using dedicated ICs For SISO, SIPO, PISO, PIPO, modes of atleast 3 bit binary word. Realization of the above using dedicated ICs.

6.

Multiplex/ De-multiplex Study of 4:1; 8:1 multiplexer and Study of 1:4; 1:8 demultiplexer Aim To demonstrate the addressing way of data channel selection for multiplex De-multiplex operation. Exercise 1. 2. Realization of mux-demux functions using direct ICs. Realization of mux-demux using dedicated ICs for 4:1, 8:1, and vice versa.

7.

Timer IC application. Study of NE/SE 555 timer in Astable, Monostable operation. Aim To design a multi vibrator circuit for square wave and pulse generation. Exercise 1. Realization of Astable multivibrator & monostable multivibrator circuit 4

2. 8.

using Timer IC. Variation of R, C, to vary the frequency, duty cycle for signal generator.

Application of Op-Amp-I Slew rate verifications, inverting and non-inverting amplifier, Adder, comparator, Integrator and Differentiator. Aim Design and Realization of Op-Amp application. Exercise 1. 2. 3. Verification of Op-Amp IC characteristics. Op-Amp IC application for simple arithmetic circuit. Op-Amp IC application for voltage comparator wave generator and wave shifting circuits.

9.

Study of Analog to Digital Converter and Digital to Analog Converter: Verification of A/D conversion using dedicated ICs. Aim Realization of circuit for digital conversions. Exercise 1. 2. Design of circuit for analog to digital signal conversion using dedicated ICs. Realization of circuit using dedicated IC for digital analog conversion.

10.

Study of VCO and PLL ICs i). Voltage to frequency characteristics of NE/ SE 566 IC. ii). Frequency multiplication using NE/SE 565 PLL IC. Aim Demonstration of circuit for communication application Exercise 1. 2. To realize V/F conversion using dedicated ICs vary the frequency of the generated signal. To realize PLL IC based circuit for frequency multiplier, divider. .

5

CYCLE I

LIST OF EXPERIMENTS6

CYCLE I : Applications of Op-Amp - I. ( Inverting and Non Inverting Amplifier) Applications of Op-Amp II. ( Differentiator and Integrator) Timer IC Applications I. ( Astable Multivibrator) Timer IC Applications II. ( Monostable Multivibrator)

1.

2.

3.

4.

5. Study of basic Digital ICs. 6. Implementation of Boolean functions. 7. Implementation of Half Adder & Full Adder.

Expt. No.1

APPLICATIONS OF OP-AMP - I ( INVERTING AND NON INVERTING AMPLIFIER) 7

1. a. INVERTING AMPLIFIER AIM: To design an Inverting Amplifier for the given specifications using Op-Amp IC 741. APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. Name of the Apparatus Function Generator CRO Dual RPS Op-Amp Bread Board Resistors Connecting wires and probes Range 3 MHz 30 MHz 0 30 V IC 741 As required As required Quantity 1 1 1 1 1

THEORY: The input signal Vi is applied to the inverting input terminal through R1 and the noninverting input terminal of the op-amp is grounded. The output voltage Vo is fed back to the inverting input terminal through the R f - R1 network, where Rf is the feedback resistor. The output voltage is given as, Vo = - ACL Vi Here the negative sign indicates that the output voltage is 180 input signal. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC. 3. By adjusting the amplitude and frequency knobs of the function generator, appropriate input voltage is applied to the inverting input terminal of the OpAmp. 4. The output voltage is obtained in the CRO and the input and output voltage waveforms are plotted in a graph sheet.

0

out of phase with the

PIN DIAGRAM:

8

CIRCUIT DIAGRAM OF INVERTING AMPLIFIER:

DESIGN: We know for an inverting Amplifier ACL = RF / R1 Assume R1 ( approx. 10 K ) and find Rf Hence Vo = - ACL Vi OBSERVATIONS: S.No 1. 2. Amplitude ( No. of div x Volts per div ) Time period ( No. of div x Time per div ) 9 Input Output Practical Theoretical

MODEL GRAPH:

RESULT: The design and testing of the inverting amplifier is done and the input and output waveforms were drawn.

1. b. NON - INVERTING AMPLIFIER 10

AIM: To design a Non-Inverting Amplifier for the given specifications using Op-Amp IC 741. APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. Name of the Apparatus Function Generator CRO Dual RPS Op-Amp Bread Board Resistors Connecting wires and probes Range 3 MHz 30 MHz 0 30 V IC 741 As required As required Quantity 1 1 1 1 1

THEORY: The input signal Vi is applied to the non - inverting input terminal of the op-amp. This circuit amplifies the signal without inverting the input signal. It is also called negative feedback system since the output is feedback to the inverting input terminals. The differential voltage Vd at the inverting input terminal of the op-amp is zero ideally and the output voltage is given as, Vo = ACL Vi Here the output voltage is in phase with the input signal. PROCEDURE: 1. Connections are given as per the circuit diagram. 2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC. 3. By adjusting the amplitude and frequency knobs of the function generator, appropriate input voltage is applied to the non - inverting input terminal of the Op-Amp. 4. The output voltage is obtained in the CRO and the input and output voltage waveforms are plotted in a graph sheet.

PIN DIAGRAM: 11

CIRCUIT DIAGRAM OF NON INVERITNG AMPLIFIER:

DESIGN: We know for a Non-inverting Amplifier ACL = 1 + ( RF / R1) Assume R1 ( approx. 10 K ) and find Rf Hence Vo = ACL Vi OBSERVATIONS: S.No 1. 2. Amplitude ( No. of div x Volts per div ) Time period ( No. of div x Time per div ) 12 Input Output Practical Theoretical

MODEL GRAPH:

RESULT: The design and testing of the Non-inverting amplifier is done and the input and output waveforms were drawn.

Expt. No.2

APPLICATIONS OF OP-AMP - II 13

(DIFFERENTIATOR AND INTEGRATOR) 2. a. DIFFERENTIATOR AIM: To design a Differentiator circuit for the given specifications using Op-Amp IC 741. APPARATUS REQUIRED: S.No 1. 2. 3. 4. 5. 6. 7. 8. Name of the Apparatus Function Generator CRO Dual RPS Op-Amp Bread Board Resistors Capacitors Connecting wires and probes Range 3 MHz 30 MHz 0 30 V IC 741 Quantity 1 1 1 1 1