intelligent display buffer with dsi interface

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1 Copyright © 2010 MIPI Alliance. All rights reserved. Hiroshi Matsunaga Renesas Electronics Corporation Copyright © 2010 MIPI Alliance. All rights reserved. Intelligent Display Buffer with DSI Interface Member-to-Member Presentations March 9, 2011

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Page 1: Intelligent Display Buffer with DSI Interface

1

Copyright © 2010 MIPI Alliance. All rights reserved.

Hiroshi MatsunagaRenesas Electronics Corporation

Copyright © 2010 MIPI Alliance. All rights reserved.

Intelligent Display Buffer with DSI Interface

Member-to-Member PresentationsMarch 9, 2011

Page 2: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Legal Disclaimer

The material contained herein is not a license, either expressly or impliedly, to any IPR owned or controlled by any of the authors or developers of this material or MIPI. The material contained herein is provided on an “AS IS” basis and to the maximum extent permitted by applicable law, this material is provided AS IS AND WITH ALL FAULTS, and the authors and developers of this material and MIPI hereby disclaim all other warranties and conditions, either express, implied or statutory, including, but not limited to, any (if any) implied warranties, duties or conditions of merchantability, of fitness for a particular purpose, of accuracy or completeness of responses, of results, of workmanlike effort, of lack of viruses, and of lack of negligence. ALSO, THERE IS NO WARRANTY OR CONDITION OF TITLE, QUIET ENJOYMENT, QUIET POSSESSION, CORRESPONDENCE TO DESCRIPTION OR NON-INFRINGEMENT WITH REGARD TO THIS MATERIAL.

All materials contained herein are protected by copyright laws, and may not be reproduced, republished, distributed, transmitted, displayed, broadcast or otherwise exploited in any manner without the express prior written permission of MIPI Alliance. MIPI, MIPI Alliance and the dotted rainbow arch and all related trademarks, tradenames, and other intellectual property are the exclusive property of MIPI Alliance and cannot be used without its express prior written permission.

IN NO EVENT WILL ANY AUTHOR OR DEVELOPER OF THIS MATERIAL OR MIPI BE LIABLE TO ANY OTHER PARTY FOR THE COST OF PROCURING SUBSTITUTE GOODS OR SERVICES, LOST PROFITS, LOSS OF USE, LOSS OF DATA, OR ANY INCIDENTAL, CONSEQUENTIAL, DIRECT, INDIRECT, OR SPECIAL DAMAGES WHETHER UNDER CONTRACT, TORT, WARRANTY, OR OTHERWISE, ARISING IN ANY WAY OUT OF THIS OR ANY OTHER AGREEMENT RELATING TO THIS MATERIAL, WHETHER OR NOT SUCH PARTY HAD ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.

Page 3: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Table of Contents

・Concept of Intelligent Buffer IC (iBIC)

・Tremolo Low power solution

・UNH-IOL MIPI Interoperability

・Tremolo Product

Page 4: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Concept of Intelligent Mobile Display

Mobile Main System Platform Intelligent Mobile Display

IntelligentDisplay

Controller

Display Buffering

Back light Control

Intelligent Function

LessTraffic

Higher resolution & QualityLower power Display Intelligent Display functions

Longer battery life by saving powerLess load and easy access to display

Realize higher display quality & lower power for an y mobile platformIntelligent display reduces traffic, and saves powe r in the system

Renesas’ Intelligent Buffer IC

Page 5: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Power save

e-DRAM

Buffer ICDBBAppli Chip

DRAM

Active

Flexible Mobile I/F(MDDI,MIPI)

AA

ABWindow Access (PIP)

3D Display & AMOLED

Back Light Control

Rotation, Flip, etc..

Double Buffering.

Super Resolution

Total Solution for intelligent display with image q uality & lower power

What’s “Tremolo ” Solution

Page 6: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Display Frame Rate Control

Power save

e-DRAM

- No operation by DBB/Appli chipat power saving

- “Tremolo” keeps still image for display for lower power

Tremolo

Buffer ICDBBAppli Chip

DRAM

Active

30fps 60fps30fps

e-DRAM

Tremolo

Buffer IC60fps

DBBAppli Chip

- Display frame rate can be changed from 30fps to 60 fps

Display Power saving in still Image mode

Still Image on Display

“Tremolo” supports both Command mode and Video mode.

Active

Page 7: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

67%

33%

CPU+BB

39%39%39%39%

①①①① No Backlight Control②②②② Still Image w/o Frame Buffer

CPU

LCD Panel(LCD + Backlight)

①①①① AGCPS for Power Saving

②②②② Still Image w/ Frame Buffer

SystemSystemSystemSystemPowerPowerPowerPower

SystemSystemSystemSystemPowerPowerPowerPower

With Tremolo①①①① AGCPS for Power saving②②②② Still Image w/ Frame Buffer

Tablet 1366x768 10”

1.2W

2.4W

1.45W0.2W

Total Power Saving Concept

LCD Panel(LCD + Backlight)

Page 8: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Back Light ControlBack Light Control (AGCPS=Auto Gamma Control and Power Saving)B

ackl

ight

(LE

D)

Driver IC

ImageData

DBB/ AppliCPU

LEDDriver IC

Bac

klig

ht (

LED

)

Driver IC

adjustData

DBB/ AppliCPU

LEDDriver IC

ImageData

TremoloTremolo(AGCPS(AGCPS-II))

Backlight current

mA mA

Contribute Longer battery life !

Content-based Backlight Power Saving

Page 9: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Clear picture evenStrong light from outside

Down backlight forlow power

Low Power

Picture Quality

Ambient LightSensor+CPU

PictureQuality Control

BacklightControl

Get Level ofAmbient light

Backlight

Backlight

Backlight

Backlight

GammaContrast

Gamma + Contrast Auto Control

Back lightcontrol

RGB IndependentGamma control

Auto control for ambient light level (Backlight, Gamma, Contrast)

Ambient Light-based Backlight Power Saving

AGCPS-II

Tremolo

Page 10: Intelligent Display Buffer with DSI Interface

10

Copyright © 2010 MIPI Alliance. All rights reserved.

P ow er consum ption com parison

0

200

400

600

800

O F F O N O F F O N O F F O N O F F O N O F F O N

Power [m

W]

<M easurem ent C ondition>

LC D P anel : 4.1inch W V G A (260k color)

Fram e rate : 60H z

V oltage for LC D : 3.0V , V oltage for LED : 19.2V (6pcs x2)

- 4 2 %- 4 2 %- 4 2 %- 4 2 %

- 2 5 %- 2 5 %- 2 5 %- 2 5 % - 1 9 %- 1 9 %- 1 9 %- 1 9 % - 1 7 %- 1 7 %- 1 7 %- 1 7 % - 1 2 %- 1 2 %- 1 2 %- 1 2 %

B acklight LC D panel + driver IC

OFF : AGCPS OFFON : AGCPS ONWVGA LCD Panel

Image Content-Based Backlight Control

Source Image

Page 11: Intelligent Display Buffer with DSI Interface

11

Copyright © 2010 MIPI Alliance. All rights reserved.

W VG A LC D

0000

6 0 86 0 86 0 86 0 8

2 2 82 2 82 2 82 2 8

6 0 86 0 86 0 86 0 8

3 0 5 .93 0 5 .93 0 5 .93 0 5 .9

6 0 86 0 86 0 86 0 8

3 7 6 .23 7 6 .23 7 6 .23 7 6 .2

6 0 86 0 86 0 86 0 8

4 7 6 .94 7 6 .94 7 6 .94 7 6 .9

6 0 86 0 86 0 86 0 85 6 2 .45 6 2 .45 6 2 .45 6 2 .4

0.0

114.9

113.9

114.9

113.9

114.9

113.3

114.9

110.7

114.9

109.1

0

200

400

600

800

O FF O N O FF O N O FF O N O FF O N O FF O N

Power[mW]

LC D-DR IV ER

BackLight

-53%-53%-53%-53%

-42%-42%-42%-42% -32%-32%-32%-32%

-19%-19%-19%-19%

-7%-7%-7%-7%

Average BrightnessDark Bright

ON : AGCPS ONOFF : AGCPS OFF

<Measurement Condition>LCD Panel : WVGA (800x480) Frame rate : 3 0HzVoltage for LCD : 3.2V, Voltage for LED : 19V (Series connection)

Source Image

Image Content-Based Backlight Control

Power consumption comparison

WVGA LCD Panel

OFF : AGCPS OFFON : AGCPS ON

Page 12: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

UNH-IOL MIPI interoperability

MIPI Product Integrators ListDisplay Panels/Peripherals

[email protected] ,[email protected] ,[email protected]

FurtherInfo

01/04/20112 Data Lanes 1280x768

DISPLAYINTEROPWORKSHOP

DSI to RGBBridge withFrame Buffer

Tremolo-MµPD60801

RenesasElectronics

[email protected] ,[email protected] ,[email protected]

FurtherInfo

12/13/20102 Data Lanes 1024x600

DISPLAYINTEROP WORKSHOP

DSI to RGBBridge WithFrame Buffer

Tremolo-SµPD60800

RenesasElectronics

Contact InfoDataSheet

TestID

DateListed

FeatureDescription

Test Selection

DeviceType

ProductCompany

Further info: http://www2.renesas.com/ibic/en/ind ex.html

http://www.iol.unh.edu/services/testing/mipi/integr atorslist.php

Page 13: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

MIPI Interoperability Test Results

PASSTremolo-SMIPI DSICompany A

PASSTremolo-MMIPI DSIRenesas SH-Mobile

MIPI DSI

MIPI DSI

MIPI DSI

MIPI DSI

I/F

Tremolo-STremolo-M

Tremolo-M

Tremolo-STremolo-M

Tremolo-STremolo-M

Device

PASSCompany B Product 1Product 2

PASSCompany E

PASSCompany D

PASSCompany C

ResultsHost Device

Page 14: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Tremolo Product Series RoadmapCY2009 CY2010 CY2011

� AGCPS----IIDisplay Ctrl & Power saving

� Dual input IF

� MIPI DSI-RX

� Large Frame Buffer

Q3((((ES)))) Q1Tremolo-S Tremolo-M

WXGA+

Intelligent func.

Enhanced Display

DataCompress

Tremolo-S Tremolo-M

MDDI

WSVGA/qHD(VGA x 2 buffer)

Intelligent func.

MIPI-DSI

WXGA( qHDx 2 buffer)

Intelligent func.

Display Cont.

RGB RGBMIPI-DSI

MIPI-DSI

Tremolo-2

CY2012

LVDS

HD1080

Intelligent func.

Enhanced Display

DataCompress

MIPI-DSI

Tremolo-NextSensorControl

LVDS LVDS/miniLVDSeDP

� Pixel-data Codec� Large Display

� High resolution� Touch panel Cont.

MIPI-DSI MIPI-DSI

planning

Page 15: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.© 2011 Renesas Electronics America Inc. COMPANY CONFIDENTIAL. All rights reserved.15

Tremolo -M (uPD60801)

• Resolution: WXGA (Single buffer), up to WSVGA/qHD (Double buffer)

• Frame Buffer: 30Mb eDRAM (14.9Mb x2 e-DRAM configurat ion)

• Input Interface:

− MIPI DSI 2 data lane

− MDDI type 1

• Output Interface

− MIPI DPI (RGB 24bit Interface)

• Input Clock: 32.768kHz or 19.2MHz or 26MHz (selectabl e)

• AGCPS (Auto Gamma Control & Power Saving) for power saving of LCD backlight

• Rotate, Flip, Upside-down image, Window Access avai lable

• Tearing Effect pin to control host so as to handle a potential display tearing effect

• PKG: 144 pin CSP, 5.5mm x 5.5mm, 0.4mm BGA pitch

• Sample: Now

• Production: Now

MIPI-DSI RGB

30Mb Frame Buffer ( WXGA )

Feature

Schedule

MDDI

Page 16: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.© 2011 Renesas Electronics America Inc. COMPANY CONFIDENTIAL. All rights reserved.16

Tremolo -M Block Diagram

MIPI

DSI

Rx

MIPI

DSI

Rx

D0P

D0N

D1P

D1N

CLPCLN

MDDI

Client

MDDI

Client

DD0PDD0N

DD1P

DD1N

STPSTN

Engine

IF

Engine

IF

Frame

Buffer

14.8Mb

eDRAM

Frame

Buffer

14.8Mb

eDRAM

Frame

Buffer

14.8Mb

eDRAM

Frame

Buffer

14.8Mb

eDRAM

Memory ControlMemory Control

Engine

Control

Engine

ControlTiming

Control

Timing

ControlAGCPSAGCPS

MIPI-DPI

(24bit RGB)

PWM

(BL LED CTL)

DBI

TypeC

IF

DBI

TypeC

IF

GB

Reg

GB

Reg

CLKIN PLLPLLsystem clk

pixel clk

/RESET

TE

DBI TypeC

1.8V

Voltage

Regulator

Voltage

Regulator

1.8V

1.2V

SEL_IF

AGCPS: Auto Gamma Control and Power Saving, which includes both CABC (Content Adaptive Backlight Control) and

Ambient-light based Backlight Control

VSYNC. HSYNC

SLEEP

DE

PCLK

Page 17: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Tremolo -M Demo-Kit

RGB���� DSI bridge

Tremolo-M

AGCPS-II Content Base BL Power savingAGCPS-II Contrast increase under strong lightBasic Function: Frame Buffer, PiP, Rotation, Double Buffer

Page 18: Intelligent Display Buffer with DSI Interface

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Copyright © 2010 MIPI Alliance. All rights reserved.

Thank you!