interleaved buck converter aplied to high power hid lamp supplying desig modeling and control
TRANSCRIPT
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 1/7
age f 7
INTERLEVE BUK ONVERTER LIE TO HIGH OWER HI LULYING: EIGN OELING N ONTROL
Andrea C Schiler, Dougla Pai,Alexandre Camo, Marco A Dalla Coa
schittler@ieeeorg, douglaspappis@gmailcom,alex3075318@gmailcom, marcodc@gedreufsmbr
J Maco Alono
marcos@uniovies
Federal niversity of Santa Maria - FSM Electrical Engineer Post-Graduation Program - PPGEE
Electronic Ballast Research Group - GEDRE
niversidad de Oviedo DEECS Tecnologa Electrnica
Campus de Viesques sn, Edificio 3, 3304Gijn, Spain Av Roraima, n 1000 97 105-900 Santa Maria, RS, Brazil
b As the output current levels of power converters
increases, interleaved topologies become widely used. A wellknown topology is the interleaved buck converter (IBC), whichpresents as main characteristic a low ripple output currentsource behavior. Due to HID lamp voltage source characteristicsand their acoustic resonance issue, it is necessary to drive themwith nearly constant current with a square-wave shape.Therefore, a buck-interleaved converter can be advantageous for supplying high power HID lamps. The goal of this paper is aproposal of an electronic ballast based on a two-cell buckinterleaved converter for high power HID lamps, with currentcontrol loop, voltage sensing and constant power. A DC modelased on averaged state-space technique is derived for theballast, as well as an AC model based on sma-signaldisturbances. The results are veried experimentally andthrough simulation in Matlab/Simulink and PSIM sowares.
x Electronic ballast, high power HID lamps,interleaved buck converter, modeling, state-space averagingtechnique.
NTRDUCTIN
The use of power converters is increasing in several areas,
such as electric cars, portable electronic devices and
electronic ballasts [] As the output current levels increase in
these converters, a configuration with parallel converters or
cells of a same converter can be applied []
Commonly applied from medium to high power levels,
current sharing among converter cells or among converters
enables losses reduction in magnetic cores and
semicondctos, once the cet levels e lwe 3]
Another characteristic is the output current ripple reduction,
which consequently lowers the output capacitor of the
converter
Regarding to that, an interleaved topology can be applied
to high power high-intensity discharge (HD) lamp supplying
These lamps present a voltage source characteristic [4],
which requires the ballast to present an output stage as a
current source Mainly, the applied ballast might present an
output current nearly constant, with nominal current ripple of
5% maximum, because of the acoustic resonance phenomena
This work was partially co-sponsored by the Brazilian andSpanish govements under research grants CAPES/DGU/5267,CEEE-D and PHB2010-0145-PC.
[5] Moreover, the parallel output capacitor has to be below a
maximum value to assure converter stability, as presented in[6], due to the lamp negative incremental impedance
t is important to highlight that HD lamp electronic ballast
manufacturers present products up to a maximum power of
only 400 W (eg Philips, OSRAM, TridonicATCO), although
electromagnetic ballasts present disadvantages as low
eiciency, audible noise, icker and reduction of the lamp
lifetime [7] that are emphasized at the high power range
The simple substitution of electromagnetic by electronic
bllasts llows for impleentti of intelligent featres as
self-tests and insertion of communication networks (DAL,
wireless, etc), which have been becoming essential for actual
lighting consumers market
For designing such ballast, a single-cell converter might
present some issues, as high current levels at the
semiconductors and magnetic cores, increasing conducting
and switching losses Also, a relatively increased size output
capacitor may be applied to reduce output current ripple
Considering the presented characteristics, a buckinterleaved converter becomes suitable to be applied for high
power HD lamps supplying, not only for the simple design but also for its inherent output current source characteristic
Besides, the ballast should present PFC (power factor
correction) and PC (power and/or current control) stages, as it
is shown in Fig 1 PFC stage design will not be covered by
this proposal, being assumed as a constant DC voltagesource
Focusing on the lamp current, Fig shows a typical
configuration for HD lamps supplying [7] t presents two
main stages: power andor current control, represented by the
constant current source; and inversion stage, applied to avoid the lamp early aging by electrophoresis [8] For the sake of
_ _
-
H
P C _
L_
al
_
p
_
Fig. 1. HID ballast characteristics block diagram
97--444-9500-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 2/7
simplification, the starter circuit has not been shown in the
figure
-
t
Fig. 2. HI lamp supplying configuration with current control and inverter
From a control point of view, ballast reactive elements have a dynamic behavior and together with the lamp dynamics can bring the system to instability [8] Therefore, aclosed-loop system is required and based on an interleaved
topology a high power HD lamp electronic ballast can be proposed
The main goal of this paper is to present a two-cell BC
operating in continuous conduction mode (CCM) applied to
high power HD lamps supplying The converter operates
with two current loops, a voltage sensing and constant power
Converter design, modeling will be presented and confirmed
by experimental results and the control loop will be verified
through simulation
Sectin resents the BC details f oeration nd
modeling; section introduces the discharge lamp model
and frequency analysis Section V contains some
experimental results n section V, topics conceing the final
version of this paper are described Finally, some conclusions
are presented in section V
WCELL NTERLEAVED BU
A two-cell buck-interleaved converter is shown in Fig 3The time intervals, AC model and transfer functions are derived at the follow subsections
Fig. 3. Two-cell buck-iterleaved
, ,
A. Time intervals
Page 2 f 7
As started in [] , for the output current ripple
minimization, the gate signals delay angle 8 can be
calculated as shown in (1)
360=
nc Where: n number of cells
(1)
The time intervals are divided as they can be seen in Fig
4 There, each time interval can be observed, as so the
inductor currents (i e i2) and gate signals ( for S and 2
for S2)' n Fig 5 the equivalent circuits for each time interval
are shown
:
I ;
<h
I
V
T1 � T �
D� T �
Ts
Fig. 4. Inductors L1 and L2 currents theoretical waveforms; MSFETs S 1and S2 gate signals
• Time interval n this interval (Fig 5 (a)) the MOSFETs S e S are
tued on t can be observed that the load current is shared in
two circuits: SL-load e S-L-load, charging the two
inductors The diodes D and D are reversed biased
• Time interval 2Here (Fig 5 (b)), the switch S is still on and switch S is
tued off The diode D is directly biased and enables the
discharge of the energy stored at inductor L
•Time interval 3This interval is equal to interval , as it can be observed
based on ig 4 The switch is turned on and the switch S
is still on
'"D
J)
(a) (b) Fig. 5. Time intervals for the two-cell buck-interleaved: (a) T and T3; (b) T2; (c) T4
97--444-9500-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 3/7
age 3 f 7
• Time interval 4 At this interval (ig 5 (c)) the switch S is tued o and
the switch S remains turned on The diode D is directly
polarized and enables the discharge of the energy stored atinductor
B. AC model and Transfer function
Considering a system with the state matrix as x and theinput matrix as u, the statespace representation is given by() [14]
x=A+Buy=C +Eu
Where: A dynamic matrix;
B input matrix;
C output matrix;
E direct transfer matrix
()
Based on [9], the small-signal AC model can be derived
from the state-space DC model and the steady state
equilibrium point (X) The DC model can be calculated based
on the matrices derived from the time intervals of the
converter, in the way shown in (3) As the two-cell buck
interleaved presents four time intervals, the DC model will
present the sum of four terms, as it can be seen in (3)
2. 2 2
A=I Tk A k B =I Tk ·B k C=I Tk,C k (3)
kl kl kl
Where: A" B" Ck state-space matrices that identify each time interval operation;
Tk respective time for each stage of operation
The steady state operation point is calculated as (4) [9]
(4)
Where: input vector
The AC model is calculated based on the steady state
equilibrium point and on the addition of small disturbances
(small-signal) at the system input vector Equation (5) gives
the relationship between DC model, equilibrium vector, input
vector and AC model
A p=A
B � [B (� ( - ) mA ')X+ (� ( - ) 'H B ') u] (5)
C p =C
Where: Ap Bp Cp small-signal derived state-space
matrices
The two-cell buck-interleaved AC model including
inductor conducting resistance (RL' switches conducting
resistance (Rdsol and diodes drop voltage is presented in
(6) Converter modeling is based on state-space matrix
[i Ll i L2 v oVand input matrix [ vdf1 vdf2V
( RL + Rdso Dc) 11
01
( RL + Rdso Dc) 1A - 0 p 1 2
1 1 1Co Co Co (6)
1 11 1 0B - 1 1 p
2 20 0 0
The transfer function (T) can be obtained from (7) [9]
G ( s )=C p .s I-A pr1 .Bp (7)
A general T for the two-cell buck-interleaved converter
of inductor current by duty-cycle is shown in (8) The
following terms are compressed in the T for a better
visualization:
• a1= -Rdso ILl + Y - df;• a2 = -RdsoIL2 + Y - df;• = RL + Rdso Dc;• eq = parallel assocatn of the converter
interleaved inductors
C. Converter design
The converter design is based on a 400 W lamp, which the
model will be presented in section A
or a buck converter, the duty-cycle can be calculated as
shown in (9)
(9)
The inductors current ripple can be calculated as being
twice the required output current ripple Regarding to that,
the inductors can be calculated as shown in (10) Note that
the inductors and the respective current ripples are considered
equal
(8)
97--444-9500-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 4/7
. - ) = m D1
!i L · c ·
Where: T switching period;
iL inductor current ripple
STEM NALSIS
(10)
The discharge lamps model has been consolidated by
many authors [8], [10], [11], [1] n [8] the lamp is included
in the TF based on the principle that the converter can be
modeled as a constant current source dependent on the lamp
voltage and duty-cycle, once it is operating at the
discontinuous conduction mode (DCM)
n this paper, another approach is made, based on lamp
and ballast dynamics isolation, considering the control loop
faster than any load variation t means that each dynamic can
be considered independent from the otherA. am Mode!
As presented in [10] , the discharge lamps present a
different response at steady-state and at a small-signal
disturbance The steady-state model can be approximated by
a resistance and the dynamic model is presented at (11)
(s - z)ZL p( S ) = k s + p
(11)
he lamp dynamic mode proposed in [10] has beenadapted for simulation by [11] and it is based on theequivalent circuit shown in Fig 6
p ModeFig. 6. im
ti
n
; ;ei
d p
t
e
d fr�
i
]
n this paper, the lamp model was obtained by analyzing the lamp response against an input voltage step This methodwas proposed in [8] Lamp response and model obtained from
that are shown in Fig 7 and the derived parameters are shownn he be I.
TABL IAM AAT (400W)
arameter Value 13.531 Qz 3.95 1 krad/s
p
15.36 krad/s
B. Ballast secications
The two-cell buck-interleaved converter operating in
continuous conduction mode (CCM) was designed with a
Page 4 f 7
switching frequency of 40 kHz The Bode diagram that
characterizes the inductor cuent over the duty-cycle (TF
presented in (8» is shown in Fig 8
Even though the converter presents stability without acompensator, a control loop should be inserted to prevent
changes at the load in case of any variation
By Nyquist theorem, a system is enabled to reproducesignals until half of the sampling frequency Commonly, the
crossover frequency ) is chosen at a lower decade of the
switching frequency ) n this case, is chosen to be close
to the lamp model pole There are two reasons for this: first,
the analyzed converter is a well-known plant and second, for
the sake of dynamics, the lamp pole is not as significant as
the right-plane zero
2
4.8
6
�4
>
38
6
�
3.4 =
-
:
_
_
0 0.2 03 04 6 7 8 9
Fig. 7. Lamp response and model obtained
ode agra
Inf, P 946 de a 783e4 radsec3
�" .C ·1
3
" -5€
9
'
1
reuey ad/sec)
Fig. 8. Inductor current by dutycycle frequency response
97--444-9500-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 5/7
age f 7
Control oo
1) Design
The compensator must present steady-state null error andmaintain the phase margin of the system at least 60° For that, the proportional-integral (PI) compensator can be applied andits TF is shown in (1)
(1)
The two-cell buck-interleaved has been simulated using
two current control loops, one for each interleaved cell A
voltage sensing loop was added to generate the lamp current
reference, so the lamp power is maintained constant
The block diagram that illustrates the current/power
control loop of the complete system is presented in Fig 9
(sensors and modulators gains are considered unitary) and the blocks description is shown as follows:
• Ci(s) - Compensator TF for current loop 1;• Ci2(s) - Compensator TF for current loop 1 ;• G() - System TF, relation between inductor
L current and duty-cycle;• G2() - System TF, relation between inductor
L2 current and duty-cycle;• P - Lamp power
Based on the system evaluation, values found for the PI
compensator coeicients are K 06166 and 1396
krad/s
The Bode diagram of the open loop transfer functionincluding the PI controller is presented in Fig 10
Fig. 9. Closed loop block diagram
2) Simulation Results
PSIM soware was used to simulate the circuit withcurrent loop and the lamp model The c design values areshown at table II The simulated circuit is shown in Fig 11,including the lamp simulation model extracted from [8] andadapted to PSIM
Boe Diagram
G = In. Pm = 110 deg (at 14e+04 ad/sec)6
4
20
i 00
�-20
-0
30
i OLTF
60
� 9
20
10'
10
Fequency (ad/sec)
Fig. 10. Frequency response of the open loop transfer function
TABLE IIIMUATION AN OTOT AAMTE V
Y 400Y() OOYP () 400W
C 220 nF 7.5
R 5Q
;
40kHz:hS SPA08N80C3
HFA5PB60
Figure 1 presents the results for lamp current (upside
waveform); inductors currents (middle waveforms) and the
input voltage in the downside graphic with a 50V step at 10
ms In Fig 13 it can be seen that the lamp power is
v maintained constant ater the input voltage step
IV XPERIMENAL ESULTS
A 400W two-cell c prototype was built with
components shown in table II Figure 14 shows the gate
signals for the switches used on the converter In Fig 15 both
inductors currents are presented and a comparison between an
inductor current and the lamp current is shown in Fig 16 It
can be seen the ripple reduction for the inductor current to the total (lamp) current Finally Fig 17 illustrates the input
current (which is, for the c the sum of both switches
currents) and the voltage stress in one switch Converter
measured overall efficiency is 985%
It can be observed in Fig 17 a certain dierence of current
levels between each cell, consequently on the inductors That
can occur due to inherent non-linearities and components
tolerances, being difficult to prevent Such unbalance can
lead to instability and/or chokes saturation Therefore, it can
be concluded that it required current regulation of each cell,
rather than only controlling the output current
97--444-900-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 6/7
S,
0R"v
v_
L
c.
Gain:
Lamp simulatonmodel
Page 6 f 7
2
P
Fig. . Circuit simulation model including lamp equivalent circuit
Fig. 12. Lamp and inductors current�; input voltage with a 50V step at 10 ms
Tek E,c Acion 21.0MHz· Filt d Rurdos
100V 100V ElIo)'
380 f480V 3733kHZ
Fig. 14. Gate signals for two-cells!BC at open loop operation (OV/div;
O/div)ePVi 20MH F1. d Rudo
. . . . . . . . . . . . . . . . . . . - .
'" ,! I ,! I ' : I ,! I ! I
-
. . . . . . . . . . . . . . . . -
tOA El tOA EI2o.o)' 1860 f500A <10H
Fig. 16. Lamp (up waveform) and inductor current (down waveform) (div;20/div)
oonTia)
Fig. 13. Lamp power -50 V step at input voltage at 10 ms
TekV
. . . . . . . . . . . . . .
. . . . . . . . . . . . _
. . . . . . . . . . . . . . . -
[
1.00
A tO A E0O=) :4
f-224 A
230MH Fil d do
<10H
Fig. 15. Inductors currents for two-cells !BC at open loop operation (div;
20s/div)TekV .50MH Fi1 d Rdo
200A El 200V E10.0) 2620 f800V <10H
Fig. 17. Input current (upside) and r voltage stress for two-cells!BC openloop operation (2div; 200V/div; Os/div)
97--444-9500-9//$00 © 0 IEEE
8/21/2019 Interleaved Buck Converter Aplied to High Power Hid Lamp Supplying Desig Modeling and Control
http://slidepdf.com/reader/full/interleaved-buck-converter-aplied-to-high-power-hid-lamp-supplying-desig-modeling 7/7
age 7 f 7
v. NCLUSIN
This pape pesented an electonic ballast fo supplying
high powe HD lamps based upon a two-cell CCM buck
inteleaved convete fo cuent/powe contol nvesionstage has been implemented via odinay full-bidge and a
PFC stage is assumed
t can be concluded that the inteleaved buck convete is
an excellent option fo designing an electonic ballast due to
its inheent output low ipple cuent souce as well as its
suitability fo high powe ballast applications Moe
impotantly, it has to be highlighted that only electomagnetic
ballasts ae cuently available on the maket fo this ange of
lamp powe
Moeove, such convete pesents the advantage of being
exible in tems of powe level, as the numbe of cells can be
inceased fo a highe lamp powe, keeping the same
functionality Besides, inteleaved topologies can bing
advantages as smalle size, in compaison with a single-cell
convete fo the same powe and high eiciency, 985% in
the pesented convete
The ballast has been analyzed fom a contol point of
view Based upon the aveage state-space technique, DC and
AC models fo the two-cell inteleaved buck convete can be
obtained consideing most of the impotant paasitic
elements
This guaantees theoy and pactical match, impoving
eliability of the feedback contol loop Fo obtaining the
system model, HD lamp has been consideed as a esistance,
once its impedance chaacteistics ae compensated by thecontol loop
Feedback contol loop has been also pesented in the pape
Fo ovecoming the HD lamp negative incemental
impedance, two cuent loops have been successfully
included, one fo each inducto cuent This avoids the
complexity of adding the lamp small-signal AC model to the
convete model Lamp voltage sensing loop has been added
fo the lamp powe setting
n summay, it can be concluded that this pape pesented
a complete poposal fo a high powe HD lamps electonic
ballast design, with its most impotant pats being descibed
in detail
NCS
[1] Shud, M A, Khaaz, A, Ashu, A S, Shate, M,
Benyoussef, "A study of modeling and simulation fo
inteleaved buck convete 1st Powe Electonic & Dive
Systems Technologies Confeence, PEDSTC 010
[] Mao, H, Yao, L, Wang, C, Bataseh, "Analysis of
inducto cuent shaing in nonisolated and isolated
mutiphase DC-DC convetes EEE Tansactions on
ndustial Electonics, v 54, no 6, pp 3379-3388, Decembe,
007
[3] Wang, J B, Chuang, S "A study of the inteleaved
buck deived convetes EEE nteational Confeence on
ndustial Technology, CT 006
[4] Made, D Ho, P "A dynamic model fo the electicalchaacteistics of uoescent lamps EEE ndusty
Applications Society Annual Meeting, AS 199
[5] Dalla Costa, M A, Alonso, J M, Gaca, J, Cadesn,
J, Rico-Secades, M "Acoustic esonance chaactetization of
low-wattage metal-halide lamps unde low-fequency squae
wavefom opeation EEE Tansactions on Powe
Electonics, v , n 3, pp 7 35743, May 007
[6] Machesan, T B, Cevi, M, Kisten, A L, Campos, A,
Pado, R N "Analysis of the output capacito and lamp
voltage invesion fo the bidiectional fyback convete
EEE ndusty Applications Society, AS 008[7 ] Shen, M, Qian, Z Peng, F Z "Design of a two-stage
low-fequency squae-wave electonic ballast fo HD lamps EEE Tansactions on ndusty Applications, v 39, n
, pp 4-430, Mach/Apil, 003
[8] Alonso, J M, Dalla Costa, M A, Cadesn, J, Matn
Ramos, J A, Gaca-Gaca, J "Small-signal modeling of
dischage lamps though step esponse and its application to
low-fequency squae-wavefom electonic ballasts EEE
Tansactions on Powe Electonics, v , n 3, pp 744-75,
May 007
9] Eickson, R W, Maksimovic, D "Fundamentals of
Powe Electonics Book, nd edition, 001
[10] Deng, E, Cuk, S "Negative incemental impedance and
stability of fuoescent lamps EEE Applied Powe Electonics Confeence and Exposition, AEC 1997
Ben-Yaakov, S, Shvatsas, M, Gozman, S "Statics and
dynamics of uoescent lamps opeating at high fequency:
Modeling and simulation EEE Tansactions on ndusty
Applications, v 38, n 6, pp 1486-149,
Novembe/Decembe, 00
[11] Glozman, S, Ben-Yaakov, S "Dynamic inteaction
analysis of HF ballasts and uoescent lamps based on
envelope simulation EEE Tansactions on ndusty
Applications, v 37 , n 5, pp 153 1-1536, Septembe/Octobe,
001
97--444-9500-9//$00 © 0 IEEE