interrupts
DESCRIPTION
TRANSCRIPT
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What is an Interrupt?
It means interrupting the normal execution of the microprocessor.
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Steps whenever there is an interrupt?
current
PC PC contents are stored in stack
100
101
102
103
104
103
103
STACK
SP
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4
Interrupts in 8085
Main routine
Interrupt
Save program counter
Disable interrupts
Send out interupt acknowledge
Service routine
INTA
Go to service routine
Get original program counter
Go back
EI
RET
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HARDWARE INTERRUPT
It is a special signal from an I/O device to the computer.
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SOFTWARE INTERRUPT
It is generated by a program interrupt instructions in the CPU.
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TYPES OF INTERRUPTS
MASKABLE & NON- MASKABLE INTERRUPTS
VECTORED & NON-VECTORED INTERRUPTS
EDGE TRIGGERED & LEVEL TRIGGERED INTERRUPTS
PRIORITY BASED INTERRUPTS
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MASKABLE INTERRUPTS
EXAMPLE: RST 7.5 RST 6.5 RST 5.5 INTR ONLY TRAP IS A NON MASKABLE
INTERRUPT
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VECTORED INTERRUPTS
EXAMPLE:
RST 7.5 RST 6.5 RST 5.5 TRAP
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8085 Interrupts
8085
TRAPRST7.5RST6.5RST 5.5INTRINTA
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The addresses to which program control goes:
NAME VECTOR ADDRESSES
RST 7.5 003CH(7.5 X 0008H)
RST 6.5 0034H(6.5 X 0008H)
RST 5.5 002CH(5.5 X 0008H)
TRAP 0024H(4.5 X 0008H)
Absolute address is calculated by multiplying the RST value with 0008H.
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NON – VECTORED INTERRUPT
EXAMPLE:
INTR is a non vectored interrupt.
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The 8085 Interrupts
Interrupt name Maskable Vectored
INTR Yes No
RST 5.5 Yes Yes
RST 6.5 Yes Yes
RST 7.5 Yes Yes
TRAP No Yes
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EDGE TRIGGERED INTERRUPTS
EXAMPLE:
RST 7.5
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Edge triggering
Rising edge
Falling edge
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LEVEL TRIGGERED INTERRUPT
EXAMPLE: RST 6.5 RST 5.5 INTR TRAP is EDGE & LEVEL triggered interrupt.
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Level triggering
Low level
High level
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PRIORITY BASED INTERRUPTSINTERRUPT PRIORITY
TRAP 1
RST 7.5 2
RST 6.5 3
RST 5.5 4
INTR 5
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Five hardware interrupts are:
TRAP RST 7.5 RST 6.5 RST 5.5 INTR
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TRAP (PIN-6)
Non- maskable Has highest priority Can not disable. Edge & level triggered Used for power failure & emergency shut off.
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RST 7.5
Maskable interrupt.
Has 2nd highest priority.
+ve edge triggered only.
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RST 6.5
Maskable interrupt.
3rd highest priority.
Level triggered only.
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RST 5.5
Maskable interrupt.
4th highest priority.
Level triggered only.
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INTR
Maskable interrupt.
Lowest priority.
Level triggered.
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INTA’
Stands for Interrupt acknowledge.
Outgoing signal.
Active low signal.
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QUESTIONS FOR YOU
Which interrupt has the highest priority?
Which interrupt has the lowest priority?
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