introduction to data flow graphs and their scheduling sources: gang quan

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Introduction to Data Flow to Data Flow Graphs and Graphs and their their Scheduling Scheduling Sources: Gang Quan

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Introduction to Introduction to Data Flow Graphs Data Flow Graphs

and their and their Scheduling Scheduling

Sources: Gang Quan

Computational ModelsComputational Models What:What:

– A conceptual notion for expressing the function of a system DFG (Design Flow Graph) FSM, Petri net, Turing machine, etc.

Computational Models & LanguagesComputational Models & Languages– Models express the behavior, languages capture models– Models are conceptual, languages are concrete

What is in a computational modelWhat is in a computational model– A set of objects– Rules – Semantics

Should be “big” (powerful) enough enough to precisely express the function of the system with unambiguity, should be “small” enough to have synthesis and verification tools to support it.

Data Flow Graph (DFG)Data Flow Graph (DFG)

A modem communications system

– Each box is a single function or sub systems– The activity of each block in the chain depends on the

input of the previous block– Data driven

Each functional block may have to wait until it receives a "certain amount" of information before it begins processing

Some place to output the results

Data Flow GraphData Flow Graph

Definition– A directed graph that shows the data dependencies

between a number of functions– G = (V,E)

Nodes (V): each node having input/output data ports Arces (E): connections between the output ports and input

ports

– Semantics Fire when input data are ready Consume data from input ports and produce data to its output

ports There may be many nodes that are ready to fire at a given time

Data Flow Graph ConstructionData Flow Graph Construction

a

acbbx

2

42

1

a

acbbx

2

42

2

-1

+

-

x

/

**

sqrt

x

x

b 4 c a 2

-/

X1

X2

a

acbbx

2

42

1

a

acbbx

2

42

2

Multiplication

Constant

Square root

Division

Nodes of DFG can be any Nodes of DFG can be any operators, also very operators, also very complex operatorscomplex operators

Data flow graph constructionData flow graph construction

original code:

x a + b;

y a * c;

z x + d;

x y - d;

x x + c;

a b c d

+ *

+

+

yxzx

-

x

Data flow graph constructionData flow graph construction

original code:

x a + b;

y a * c;

z x + d;

x y - d;

x x + c;

single-assignment form:

x1 a + b;

y a * c;

z x1 + d;

x2 y - d;

x3 x2 + c;

Data flow graph constructionData flow graph construction

single-assignment form:

x1 a + b;

y a * c;

z x1 + d;

x2 y - d;

x3 x2 + c;

a b c d

+ *

+

+y

x3

z

x1

-

x2

Design Issues for Design Issues for DFGsDFGs

1. Allocating operator nodes to resources (blocks, functional units)

2. Mapping to blocks3. Schedule in time4. Memory management5. Construction and usage of the queues and other

special memory resources useful in data flows– stacks?

What are the goals of these What are the goals of these design processes?design processes?

Guarantee correct behaviorUtilize hardware efficiently.Obtain acceptable performance.

AllocationAllocation

Decide the numbers and types of different functional units– E.g. register allocation

….

x <= a + b;

y <= a + c;

x <= x - c;

….

….x …

….y….

….

x <= a + b;

y <= a + c;

x <= x - c;

….

….x …

….y….

three registers

MappingMappingDistributing nodes to different functional

units on which they will fire– Functional units may provide different functions

Adder or ALU, MUX or buses, etc

– Functional units may have different delay Ripple adder or look ahead adder

– Determines area, cycle time.

A Mapping ExampleA Mapping Example

Subject to: 1. Two adders2. Four registers3. b and e cannot be assigned

to the same register

+

+

a b

c

e

+

d

f We assume two adders and four registers and next do synthesis for this assumption.

But how do we know how many to assume?

A Mapping ExampleA Mapping Example

R1: aR2: b, c, eR3: d, f

+

+

a b

c

e

+

d

f

Subject to: 1. Two adders2. Three registers3. a and e cannot be

assigned to the same register

R3

Adder 1

R1 R2

Adder 2

Mapping may not be unique !

Scheduling of DFGScheduling of DFG

Schedule– Creating the sequence in which nodes fire – Determines number of clock cycles required

Two simple schedules:– As-soon-as-possible (ASAP) schedule puts every

operation as early in time as possible– As-late-as-possible (ALAP) schedule puts every

operation as late in schedule as possibleas late in schedule as possible

ASAP scheduling for DFGASAP scheduling for DFG

+

-

/

*-1

+

** t=0

t=1

t=2

t=3

t=4

+/ **-1

-

*

+

Nodes fire whenever the input data are available.

Start from t=0

ALAP Scheduling for DFGALAP Scheduling for DFG

+

-

/

*-1

+

** t=0

t=1

t=2

t=3

t=4

+/

**

-1

-

*

+

Nodes fire when absolutely necessary.

Start from the terminal values of t

More about ASAP and ALAPMore about ASAP and ALAPUnlimited resources

– No limit for the number of registers, adders, etc

Longest path through data flow determines minimum schedule length

Mobility– tL – tS

•Difference between schedule in ALAP and schedule in ASAP.

•The higher it is the more solutions we can find in optimization process

MobilityMobility

u = tL - tS

t=0t=1t=2t=3t=4

+/ **-1-*+

t=0t=1t=2t=3t=4

+/**

-1-

*+

ASAP

ALAP

+

/

**

-1

-

*

+

u

0

0

0

1

0

2

0

The node mobility represents its flexibility in the fire sequence.

+

-

/

*-1+

**

u here is the mobility list

We will use this list in next scheduling method

Restrained SchedulingRestrained Scheduling

TimeTime constraints– Time is given, minimize the resource

Resource constraints

NP problem

+

-

/

*-1

+

**

TimeTime Constraints Constraints

-1

+

-

x

/

**

sqrt

x

x

b 4 c a 2

-/

X1X2

T

2

2

1

1

1

6 7 8

+/-

*//

**

sqrt

-1

1

2

1

1

1

1

1

1

1

1

How many units of time the graph needs to complete (we assume it)

This shows how many various blocks we need if 6 fires.

This shows how many various blocks we need if 8 fires.

Resource Constraints Constraints

Resource is given, minimize the long time

List based scheduling– Maintain a priority based ready listpriority based ready list

The priority can be decided by mobility for example

– Fire the nodes according to their Fire the nodes according to their prioritiespriorities until all the resource are used in that stage

+

-

/

*-1

+

**

List Based SchedulingList Based Scheduling

+

-

/

*+

+

+

t=0

t=1

t=2

t=3

t=4

+/

-

* +

+

Such that there is one +/-, one *///

/ + + - * + +

u 0 0 1 0 0 2 0

t=5+

priority based ready listpriority based ready listThe priority can be decided by mobility for example

Fire the nodes according to their prioritiesFire the nodes according to their priorities until all the resource are used in that stage

List Based SchedulingList Based Scheduling

A general ASAP Priority based ready

list+

-

/

*-1

+

**

Control/Data Flow Graph (CDFG)Control/Data Flow Graph (CDFG)

x <= a + b;

if ( x > 100)

y <= a * c;

else

y <= a + c;

endif

Control/Data Flow GraphControl/Data Flow Graph Definition

– A directed graph that represents the control dependencies among the functions

branch fall-through

– G=(V,E) Nodes (V)

– Encapsulated DFG– Decision

Arces (E)– flow of the controls

Very similar to FSMD– Operation rectangles (instructions) can be vary complicated– Diamonds for predicates can be very complicated and require

many clock pulses to complete.

CDFG ExampleCDFG Examplefun0();

if (cond1) fun1();

else fun2();

fun3();

switch(test1) {

case 1: fun4(); break;

case 2: fun5(); break;

case 3: fun6(); break;

}

fun7();

fun0

cond1

fun3

fun2fun1

fun5 fun6fun4

fun7

test1

Y N

CDFG ExampleCDFG Example

fun0();

while(cond1) {

fun1();

}

fun2();

fun0

cond1

fun3

fun2

Y

N

Design Issues for CDFGDesign Issues for CDFG

Code optimization– Loop optimization, dead code detection

Register allocation

SummarySummary Data Flow GraphData Flow Graph (DFG)

– models data dependencies.– Does not require that nodes be fired in a particular

order.– Models operations in the functional model—no

conditionals. – Allocation and Mapping– Scheduling – ASAP, ALAP, List-based scheduling

Control/Data Flow GraphControl/Data Flow Graph– Represents control dependencies

To rememberTo remember Now we know the most important concepts:Now we know the most important concepts:

– Data Flow GraphData Flow Graph (DFG) – Control/Data Flow GraphControl/Data Flow Graph– FSM tableFSM table– Transition GraphTransition Graph– Combinational Graph (netlist)Combinational Graph (netlist)

These concepts alone are sufficient to complete all These concepts alone are sufficient to complete all projects in this class.projects in this class.

However we will introduce more concepts and algorithms However we will introduce more concepts and algorithms so you will be able to find:so you will be able to find:– Better solutionsBetter solutions– In shorter timeIn shorter time

Homework 3Homework 3

1. Find an example of some computation that is repeated many times on the same or on different data

2. Draw DFG for this computation3. Possibly optimize this DFG using laws of arithmetic4. Schedule this DFG ASAP. Allocate to resources and find cost of

hardware and time of processing.5. Schedule this DFG ALAP. Allocate to resources and find cost of

hardware and time of processing. 6. Schedule this DFG according any other method or heuristically using

your common sense. Allocate to resources and find cost of hardware and time of processing.

7. Make a table comparing all your results – you can have more than three.8. Select one design and give reason for this.9. Realize this design as a complete circuit. You can use ready adders,

multipliers, etc blocks from internet.10. If you want (option) you may simulate this design with Verilog or VHDL

or any graphic simulator. This is not mandatory part of the homework.

Review for Exams (1)Review for Exams (1)1. What is in a computational model? Give examples2. Why computational models are important? We can describe every system as

a Mealy Machine? Why other?3. What is DFG?4. Give few applications of DFGs 5. Give example of a DFG of some hypothetical computer that would be

worthy to build, for instance Hough Transform processor for a robotrobot6.6. What is Allocating?What is Allocating?7.7. What is Mapping?What is Mapping?8.8. What is Scheduling?What is Scheduling?9.9. Explain ASAP Scheduling for a practical DFG on example.Explain ASAP Scheduling for a practical DFG on example.10.10. Do the same example again using ALAP scheduling.Do the same example again using ALAP scheduling.11.11. Compare the ASAP and ALAP Scheduling.Compare the ASAP and ALAP Scheduling.12.12. What is Constraint Satisfaction Problem (question asked again but now you What is Constraint Satisfaction Problem (question asked again but now you

know more)know more)13.13. What is NP, NP complete and NP hard problem. Give examples.What is NP, NP complete and NP hard problem. Give examples.14.14. Why the concept of NP problems is important?Why the concept of NP problems is important?

Review for Exams (2)Review for Exams (2)1. What is mobility and fire sequence. Give an example.

2. Formulate the scheduling, allocation and similar problems as constraints satisfaction problems with constraints and costs as energy to be minimized.

3. Give example of List Scheduling

4. What is CDFG and what are associated synthesis and optimization problems?