introduction - uni koblenz-landauunikorn/lehre/gdbs/ws12/01-introduction.pdf · manages the...
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Introduction
Outlook
Defining the Term Operating Systemg p g y Computer Architecture Recap
E l d C t Evolved Concepts
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Defining the Term Operating System
What is an Operating System?p g y
[Silberschatz et al.] An operating system is a program that manages the computer hardware It also provides a basismanages the computer hardware. It also provides a basis for application programs and acts as an intermediary between the computer user and the computer hardware.p p
[Stallings] An operating system is a program that controls the f l d fexecution of application programs and acts as an interface
between applications and the computer hardware.
[Tanenbaum] Computers are equipped with a layer of software called the operating system whose job is to p g y jmanage all devices and provide user programs with a simpler interface to the hardware.
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What is an Operating System?p g y
[Silberschatz et al.] An operating system is a program that manages the computer hardware It also provides a basismanages the computer hardware. It also provides a basis for application programs and acts as an intermediarybetween the computer user and the computer hardware.p p
[Stallings] An operating system is a program that controls the f l d fexecution of application programs and acts as an interface
between applications and the computer hardware.
[Tanenbaum] Computers are equipped with a layer of software called the operating system whose job is to p g y jmanage all devices and provide user programs with a simpler interface to the hardware.
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A General Computer Systems Viewp y
user 1 user 2 user 3 user n…
compiler word processor browser databasesystem
…
system and application programssystem
operating system
computer hardwarecomputer hardware
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Defining Operating Systemsg p g y
Operating system defined by the one program running all theOperating system defined by the one program running all the times on the computer responsible for resource allocation and control
d k l Denoted as kernel All else are system and application programs
[Resource allocation] Numerous and possibly conflicting requests for resources
CPU RAM St I/O CPU, RAM, Storage, I/O Decide how to allocate them to specific programs and users
Important: efficiency and fairness
[Reso ce cont ol] [Resource control] Manage and execute user programs Prevent errors and improper use of the computer Operation and control of I/O devices
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Computer Architecture Recap
System OrganizationStorage and CachingI/O MechanismsHardware Protection
Computer System Organizationp y g
Components: CPU, bus, controller, memory
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An Example Boardp
ATX mainboard, KT333 chip set, MSI10
Linking the OS and Hardware:Starting and Rebootingg g
Bootstrap programp p g Used to start up the computer
Small and typically stored in ROM Small and typically stored in ROM
Bootstrap program is booting the system Initialize CPU registers, device controllers, and Initialize CPU registers, device controllers, and
memory contents Load the operating system kernel Load the operating system kernel Kernel gets the CPU and start the first process
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Program Executiong Instructions
Memory access0xef0c ...0xef10 load 0xaffc d0 Memory access
Arithmetic Branch
0xef10 load 0xaffc, d00xef14 loadc 0x0001, d10xef18 loadc 0x0001, d20 f1 dd d2 d1
PC
…
Registers e g :
0xef1c add d2, d10xef20 swap d1, d20xef24 dec d0
Registers, e.g.: Data, address Instruction
P t
0xef28 jnz 0xef1c0xef2c store d2, 0xb0000xef30 ...
Program counter Stack pointer Status register
...
hStatus register
Stackll t
0xf0000xf0040xf008SP
push
call, return 0xf0080xf00c
SP
pop12
Random Access Memory (RAM)y ( ) Only storage directly accessible by CPU
Memory stores data load: Memory CPU register store: CPU Register Memory
Memory stores instructions as well! Memory stores instructions as well!
Typical instruction execution cycleF t h i t ti i t CPU i t ti i t Fetch instruction into CPU instruction register
Decode instruction and fetch operands Execute instruction on operands Store result back into memory (or register)
Referred as von Neumann architecture Referred as von Neumann architecture
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Computer Architecture Recap
System OrganizationStorage and CachingI/O MechanismsHardware Protection
Storage StructuregS
volatile
non volatile
Cost
izenon-volatile
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Caching: Example CPU and RAMg p
ProblemCPU registers accessible with one cycle of CPU clock CPU registers accessible with one cycle of CPU clock
Accessing memory may take many cycles of CPU clock CPU stall
Solution: Cache between CPU registers and RAM Faster but more expensive! Faster but more expensive!
Data cache Check if data is present If not, copy data into cache temporarily (possibly prefetch subsequent data)(p y p q )
Instruction cacheFetch next instructions expected to be executed Fetch next instructions expected to be executed
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Cache Coherency and Consistencyy y
Example: Incrementing A on magnetic disk Stored values of A differ Stored values of A differ Requires writing back to magnetic disk
Cache-
Increasing complexityMultitasking: CPU switches among processes
Consistency
Multitasking: CPU switches among processes Multiprocessor: local caches Distributed environment: replicas on different
Cache-C h Distributed environment: replicas on different
computers17
Coherency
Computer Architecture Recap
System OrganizationStorage and CachingI/O MechanismsHardware Protection
I/O Structure: the simple way connecting Device and Memory via CPUy
Device concepts: pbuffer, controller register
CPU
Instructions
DataregisterInterr
I/O Req
Dat
Detecting transfer completion Memory
rupt
quest
ta
completion Polling
Interrupt driven
Device
Interrupt driven
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Interrupt Driven I/O (and Operating Systems)p ( p g y )
Hardware and software may trigger events Signaled by an interrupt Traps are specific software-generated interruptsaps a e spec c so t a e ge e ated te upts
Caused by an error (e.g. division by zero) Request a specific operating system service (system q p p g y ( y
call, monitor call)
Operating system handles events Immediately stop current computation Immediately stop current computation Execute interrupt service routine
On completion resume interrupted computation On completion resume interrupted computation20
Calling and Returning from Interrupt Handlersg g p
Modifying the program counter
Finding the matching interrupt handlerP d fi d b f i t t Predefined number of interrupts
Interrupt vector Stores start address of interrupt handler Stores start address of interrupt handler Indexed by unique interrupt number
Remember the return address Simple: Store return address in a register
S hi ti t d S t t k Sophisticated: System stack
Save and restore processor state! Save and restore processor state!21
Direct Memory Access (DMA)y ( ) Interrupt handling and high speed devices
A simplified example A simplified example 2 s for interrupt handling 4 s inter arrival time per byte CPU spends 50% of the time with interrupt handlingCPU spends 50% of the time with interrupt handling
SolutionT ansfe a block of data to/f om memo Transfer a block of data to/from memory
No CPU intervention Generate only one interrupt per block
Th i lifi d l f 1024 b bl k The simplified example for 1024 byte blocks Interrupt handling requires 100 * 2 / (4 * 1024) = 0.04%
Attention: However, DMA operation may slow down CPU
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Accessing I/O Controllersg
I/O controllers include registers/ g Store commands and data being transferred
CPU may provide Special I/O instructions Data transfer between registers and memory
More convenient: memory-mapped I/Od f f Map device registers at a specific range of
memory addresses
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Memory Mapped I/O Examplesy pp p
Screen locations mapped into memorypp y
S i l d ll l t Serial and parallel ports Write data to memory mapped data registery pp g Set Bit in memory mapped control register Device transfers data and clears the Bit Device transfers data and clears the Bit
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Computer Architecture Recap
System OrganizationStorage and CachingI/O MechanismHardware Protection
Hardware Protection
Sharing requires hardware protectiong q p Example: Concurrent I/O access
Example: Memory modification Example: Memory modification Example: Infinite loops
Basic hardware mechanismsBasic hardware mechanisms Operation modes
Memory protection Memory protection Timers
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Dual-Mode Operationp
Two separate execution modesp User mode: tasks on behalf of the user
Supervisor mode: task on behalf of the OS Supervisor mode: task on behalf of the OS Realized by a special mode bit (status register)
Privileged instructions: Privileged instructions:only executable in supervisor mode
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Switching Between Modesg
System starts in supervisor mode Switch to user mode Start user program
Returning to supervisor mode Setting the mode bit? Solution: Set on interrupt or trap only
System calls (realized by software interrupt) Verify parameters Execute desired command Switch to user mode Continue with instruction after system call 28
Memory Protectiony
Dual-mode is not sufficientReplace handler address in interrupt vector Replace handler address in interrupt vector
Modify code of the interrupt service routine
Memory Protection required as well Protect interrupt vector Protect interrupt service routine
In general In general Protect operating system from user code Protect user code from one another
Two mechanisms (considered later in this course): t ti d isegmentation and paging
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CPU Protection with Timers
Prevention from infinite loopsI t t ft ifi d i d Interrupt after a specified period
Operating system gets control by interrupt handler Hardware timer modifications are privilegedp g
Timers are used for time sharing User gets CPU until the next timer interrupt Context switch on interrupt
save registers internal variables save registers, internal variables, … Continue next program on execution point where it previously left of
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Evolved Concepts
Operating Systems over the past 50 Yearsp g y p
Evolution of operating systemsC l t f ti t Common elements of operating systems
Why have they developed as the have?
Main purposes Convenience for the user/applicationsConvenience for the user/applications Manage limited resources Possibly conflicting goals
Computer architecture and operating systemsI fl d h th Influenced each other
Operating systems to facilitate the use of hardware New hardware features to support operating systems New hardware features to support operating systems
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Mainframes
IBM System 360 33
Mainframes
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Mainframes
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Mainframe Systems (some numbers…)y ( ) IBM System/360-44 (1966)
Clocking speed: 4MHz Clocking speed: 4MHz RAM: 32-256 kB
IBM System/360-195 1024-4096 kB 1024 4096 kB Model 195 purchase prices from $7 million to $12.5 million, depending on
configuration
Cite from Wikipedia: “The slowest System/360 models announced in 1964 ranged in speed from 0.0018 to 0.034 MIPS; the fastest System/360 models were approximately 50 times as fast with 8 kB and up to 8 MB of internal main memory”up to 8 MB of internal main memory” i.e.: max. approx 1,7 MIPS
(1.700.000 instructions per second)
Consider an old Intel 8080 CPU (1974): Clocking speed: 2MHz 0 64 MIPS H MIPS t l b 0.64 MIPS
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However: MIPS must always beread careful when comparingdifferent architectures!
Mainframe Systems (Batch)y ( )
I/O devices: card reader, tape drive, line printer card punch operatingprinter, card punch
System has to execute jobs
p gsystem
System has to execute jobs Described by punch cards No direct user interaction
Batched jobs to speed up processing user program
First rudimentary operating system Transfer control from a finished job to the
p garea
Transfer control from a finished job to the next one in the batch
Resident in Memory
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Mainframe Systems (Multiprogrammed)y ( p g ) Observation: IO is a bottleneck compared to CPU
operating Introduction of disk technology enables direct
access to several jobs
p gsystem
Idea: Multiprogramming Keep a subset S of all jobs in memory Execute one job in S until it gets blocked due to IO
job 1
Execute one job in S until it gets blocked due to IO Switch to a next non blocked job and so on … Jobs finishing to wait can get back the CPU job 2
Operating system features Job scheduling – which job gets into the memory CPU scheduling – the system must choose among
job 3 CPU scheduling the system must choose among
several jobs ready to run Memory management – the system must allocate
the memory to several jobsll i f d i
job 4 Allocation of devices
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Mainframe Systems (Time-Sharing)y ( g)
Time-Sharing or MultitaskingExecute multiple jobs by switching among them periodically or on Execute multiple jobs by switching among them periodically or on blocking IO
High frequency of switching
Features Enables user interaction Many users can share a computer simultaneously
Important concepts Important concepts Process – executed program in memory Disk serves as a backing store for main memory
Vi t al memo abst a tion of the ph si al memo Virtual memory – abstraction of the physical memory Allows execution of a job not completely in memory A large abstract array of storage
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Minicomputersp
DEC PDP-140
The Term Mainframe and Minicomputer Todayp yemphasis is on job thoughput
IBM AS/400 Minicomputer (ISeries)IBM System z9 Mainframe (ZSeries) 41
Supercomputersp pemphasis is on number crunching
Cray-1 42
Supercomputersp p
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Supercomputersp pfor more recent models see: http://www.top500.org/
IBM Blue Gene44
Desktop Systemsp y
Low hardware costs computer dedicated to one userM i i i d i Maximize convenience and responsiveness
In contrast to mainframes utilization of full capacity of CPU and IO devices is less important
(Responsiveness and full hardware utilization are conflicting goals)
Early PC CPUs Early PC CPUs Not suitable for multiuser and multitasking No protection mechanism The first operating systems: Macintosh OS, MS DOS
Meanwhile these features are provided Meanwhile these features are provided MS Windows, Mac OS X, Linux
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Multiprocessor Systems (1)p y ( )
Also known as parallel or tightly coupled systemsM th More than one processor
Sharing the computer bus and clock Possibly sharing memory and peripheral devices Possibly sharing memory and peripheral devices
The main advantages The main advantages Increased throughput – speed up ratio for N
processors? (Amdahl’s Law)f Economy of scale – share peripherals, mass storage,
and power supply Increased reliability – failure of one processor will not Increased reliability failure of one processor will not
halt the system graceful degradation
fault tolerance (example HP NonStop) fault tolerance (example HP NonStop)
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Multiprocessor Systems (2)p y ( ) Symmetric multiprocessing (SMP)
All processors are peersp p Load balancing Sharing of resources (Supported by all modern operating systems)
Asymmetric multiprocessing Each processor has an assigned task Master processor controls the systemp y
Schedule and allocate work for slave processors
Recent trendsMultiple compute cores Multiple compute cores
Blade servers47
Distributed Systemsy
Loosely coupled systems Collection of processors No shared memory or clock
C i i k Communication over a network
Network LAN, MAN, WAN, PAN, …
Network connectivity has become essential part of OS development
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Distributed Systems: Client-Server, P2Py ,
Client Server Systems Server handles requests generated by clients Categories: compute-server, file-server
Peer-to-Peer Systems Peer to Peer Systems Computer may act as client or server Service provided by several nodes Service provided by several nodes Requires service discovery
centralized lookup servicecentralized lookup service broadcasting request
Example: file sharing, web services, …p g
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Distributed Systems: OS Typesy yp
Network operating systemsp g y Computer acts autonomously
Provide message exchange between processes Provide message exchange between processes on different computersN t ki f t h t fil Networking features such as remote file access
Distributed operating systemProvides illusion of a single operating system Provides illusion of a single operating system
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Clustered Systemsy
An alternative to expensive supercomputers
Coupling of individual computersp g p Sharing of secondary storage Closely linked via LAN networky
Asymmetric clusteringy g Redundant machine in hot-standby mode When server fails, hot-standby host becomes new When server fails, hot standby host becomes new
server Symmetric clusteringSymmetric clustering
Several hosts execute applications51
Real-Time Systemsy
Time requirements on processor operation Previously defined, fixed time constraints Result’s correctness depends on return time
Hard real-time system Hard real time system Guarantee that critical tasks are completed on time Requires well known bounded delays Requires well known bounded delays
Soft real time systems Soft real-time systems Critical real-time task gets priority over other ones
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Handheld Systemsy
Challenges due to limited sizeS ll t f Small amount of memory Virtual memory required Not frequently applied
Slow processors Faster processor requires larger battery
Small input and output devices Small input and output devices Familiar task have to be condensed E.g. web clipping
Wireless technologies Radio, infrared
Tradeoff between limitations in functionality and convenience and portabilityconvenience and portability
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And more…
Embedded system –single-purpose computer built into a larger system for the purposes of controlling and monitoring the system. 54
Summary and References
Summaryy
Operating System main goalsf d ll f b Support for good overall system performance by
scheduling computational activities Control (and protection) of available hardware Control (and protection) of available hardware
ressources in case of parallel processing Provide a convenient environment for execution
and development of programs Hardware support
Interrupts Execution modes
Vi t l Virtual memory IO access (e.g. memory mapped, DMA, ...)
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References
Silberschatz, Galvin, Gagne, „Operating , , g , „ p gSystem Concepts“, Seventh Edition, Wiley, 20052005 Chapter 1 „Introduction“
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