ir2156 ds rev-j 9-10-2012

21
1 IR2156(S)PbF BALLAST CONTROL IC Features Ballast control and half bridge driver in one IC Programmable preheat frequency Programmable preheat time Internal ignition ramp Programmable over-current threshold Programmable run frequency Description The IR2156 incorporates a high voltage half- bridge gate driver with a programmable oscillator and state diagram to form a complete ballast control IC. The IR2156 features include programmable preheat and run frequencies, programmable preheat time, programmable dead-time, and programmable over- current protection. Comprehensive protection features such as protection from failure of a lamp to strike, filament failures, as well as an automatic restart function, have been included in the design. Application Diagram Programmable dead time DC bus under-voltage reset Shutdown pin with hysteresis Internal 15.6V zener clamp diode on Vcc Micropower startup (150 μA) Latch immunity and ESD protection Packages IR2156SPBF IR2156PBF SOICN14 PDIP14 IR2156

Upload: others

Post on 29-Oct-2021

7 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: IR2156 DS REV-J 9-10-2012

1

IR2156(S)PbF BALLAST CONTROL IC

Features Ballast control and half bridge driver in one IC Programmable preheat frequency Programmable preheat time Internal ignition ramp Programmable over-current threshold Programmable run frequency

Description The IR2156 incorporates a high voltage half-bridge gate driver with a programmable oscillator and state diagram to form a complete ballast control IC. The IR2156 features include programmable preheat and run frequencies, programmable preheat time, programmable dead-time, and programmable over-current protection. Comprehensive protection features such as protection from failure of a lamp to strike, filament failures, as well as an automatic restart function, have been included in the design.

Application Diagram

Programmable dead time DC bus under-voltage reset Shutdown pin with hysteresis Internal 15.6V zener clamp diode on Vcc Micropower startup (150 µA) Latch immunity and ESD protection

Packages

IR2156SPBF IR2156PBF SOICN14 PDIP14

IR2

15

6

Page 2: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

2

Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.

Symbol Definition Min. Max. Units

VB High side floating supply voltage -0.3 625

V

VS High side floating supply offset voltage VB - 25 VB + 0.3

VHO High side floating output voltage VS - 0.3 VB + 0.3

VLO Low side output voltage -0.3 VCC + 0.3

IOMAX Maximum allowable output current (HO, LO) due to external power transistor miller effect

-500 500 mA

VDC VDC pin voltage -0.3 VCC+0.3

V VCT CT pin voltage -0.3 VCC+0.3

VCPH CPH pin voltage -0.3 VCC+0.3

ICPH CPH pin current -5 5 mA

IRPH RPH pin current -5 5

VRPH RPH pin voltage -0.3 VCC+0.3 V

IRT RT pin current -5 5 mA

VRT RT pin voltage -0.3 VCC+0.3 V

VCS Current sense pin voltage -0.3 5.5

ICS Current sense pin current -5 5

mA ISD Shutdown pin current -5 5

ICC Supply current (Note 1) -20 20

dV/dt Allowable offset voltage slew rate -50 50 V/ns

PD Package power dissipation @ TA ≤ +25ºC (14-Pin DIP)

PD = (TJMAX-TA)/RθJA (14-Pin SOIC)

--- 1.80 W

--- 1.40

RθJA Thermal resistance, junction to ambient (14-Pin DIP) --- 70

ºC/W (14-Pin SOIC) --- 82

TJ Junction temperature -55 150

TS Storage temperature -55 150 ºC

TL Lead temperature (soldering, 10 seconds) --- 300

Note 1: This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section.

Page 3: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

3

Recommended Operating Conditions For proper operation the device should be used within the recommended conditions.

Symbol Definition Min. Max. Units

VBS High side floating supply voltage VBSUV+ VCLAMP

V VS Steady state high side floating supply offset voltage -1 600

VCC Supply voltage VCCUV+ VCLAMP

ICC Supply current Note 2 10 mA

CT CT lead capacitance 220 --- pF

ISD Shutdown lead current -1 1 mA

ICS Current sense pin current -1 1

TJ Junction temperature -25 125 ºC

Note 2: Enough current should be supplied into the VCC pin to keep the internal 15.6V zener clamp diode on this pin regulating at its voltage, VCLAMP.

Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=40KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified.

Symbol Definition Min Typ Max Units Test Conditions

Supply Characteristics

VCCUV+ VCC supply undervoltage positive going threshold

10.5 11.5 12.5

V

VCC rising from 0V

VCCUV- VCC supply undervoltage negative going threshold

8.5 9.5 10.5 VCC falling from 14V

VUVHYS VCC supply undervoltage lockout hysteresis 1.5 2.0 3.0

IQCCUV UVLO mode quiescent current 50 120 200 µA

VCC=11V

IQCCFLT Fault-mode quiescent current --- 200 470 SD = 5.1V, or CS = 1.3V

IQCC Quiescent VCC supply current --- 1.0 1.5 mA

CT connected to COM, VCC = 14V, RT = 15kΩ

ICC40k VCC supply current, f = 40kHz 1.3 1.5 1.7 VCPH=12V, VVDC=12V

VCLAMP VCC zener clamp voltage 14.5 15.6 16.5 V ICC = 5mA

Floating Supply Characteristics

IQBS0 Quiescent VBS supply current -5 0 5 µA

VHO = VS (CT=0V)

IQBS1 Quiescent VBS supply current --- 30 50 VHO = VB (CT=14V)

ILK Offset supply leakage current --- --- 50 µA VB = VS = 600V

Page 4: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

4

Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=40KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified.

Symbol Definition Min Typ Max Units Test Conditions

Oscillator, Ballast Control, I/O Characteristics

fOSCRUN Oscillator frequency during RUN mode 36.0 40.0 44.0

kHz

VVDC=14V,

VCPH=Open

fOSCPH Oscillator frequency during PH mode 49.0 55.0 60.0 VVDC=14V,

VCPH=COM

d Oscillator duty cycle --- 50 --- %

VCT+ Upper CT ramp voltage threshold --- 8.3 ---

V VCC=14V

VCT- Lower CT ramp voltage threshold --- 4.8 ---

VCTFLT Fault-mode CT pin voltage --- 0 --- SD>5.1V or CS>1.3V

tDLO LO output deadtime --- 2.0 --- µsec

tDHO HO output deadtime --- 2.0 ---

RDT Internal deadtime resistor --- 3 --- kΩ

Preheat Characteristics

ICPH CPH pin charging current 3.6 4.3 5.2 µA CT=10V, VDC=5V, VCPH=0V

VCPHFLT Fault-mode CPH pin voltage --- 0 --- mV SD>5.1V or CS>1.3V

RPH Characteristics IRPHLK Open circuit RPH pin leakage current --- 0.1 --- µA CT=10V

VRPHFLT Fault-mode RPH pin voltage --- 0 --- mV SD>5.1V or CS>1.3V

RT Characteristics IRTLK Open circuit RT pin leakage current --- 0.1 --- µA CT=10V

VRTFLT Fault-mode RT pin voltage --- 0 --- mV SD>5.1V or CS>1.3V

Protection Circuitry Characteristics

VSDTH+ Rising shutdown pin threshold voltage --- 5.1 --- V

VSDHYS SD pin Reset threshold voltage --- 450 --- mV

VCSTH+ Over-current sense threshold voltage 1.1 1.25 1.44 V

tCS Over-current sense propogation delay --- 160 --- nsec

Delay from CS to LO

VCSPW Over-current sense minimum pulse width --- 135 --- VCS pulse amplitude = VCSTH + 100mV

RVDC DC bus sensing resistor 7.5 10.0 14.0 kΩ VCPH>12V, VDC=7V, CT=0

VCPH-VDC CPH to VDC offset voltage 10.3 10.9 11.4 V VCPH open, VDC=0V

Page 5: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

5

Electrical Characteristics VCC = VBS = VBIAS = 14V +/- 0.25V, VVDC=Open, RT=39KΩ, RPH=100KΩ, CT=470 pF, VCPH=0.0V, VSD=0.0V, VCS=0.0V, CLO=CHO=1000 pF, TA=25C unless otherwise specified.

Symbol Definition Min Typ Max Units Test Conditions

Gate Driver Output Characteristics VOL Low-level output voltage --- COM ---

V IO = 0

VOH High-level output voltage --- VCC --- IO = 0

tr Turn-on rise time --- 110 150 nsec

tf Turn-off fall time --- 55 100

Page 6: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

6

Block Diagram

RT

CPH

VB

HO

VS

LO

CS

Vcc

CT

RPH

COM

R

VTH

R

ICPHR

Under-VoltageDetect

FaultLogic

DriverLogic High-

SideDriver

Low-Side

Driver

Comp 1

Schmitt 1

SD

5.1V

SoftStart

1.3V

R

R

2.5K

40K

S1

S2

S3

S4

QT

R Q

S6

Comp 2

Comp 3

QS

R2 Q

R1VDC10K

5.1V

5.1V

RDT

RVDC

Pin Assignments & Definitions

10

Pin Assignments

1

2

3

4

5

6

7

9

8

IR2156

NC

VCC

VDC

RT

RPH

COM

CT

CS

LO

VS

HO

VB

CPH

SD

14

13

12

11

Pin # Symbol Description

1

14

13

3

12

7

6

5

4

2

RT

VS

HO

NC

SD

CPH

CT

RPH

Minimum Frequency Timing Resistor

Preheat Frequency Timing Resistor

Oscillator Timing Capacitor

Preheat Timing Capacitor

High-Side Gate Driver Output

High-Side Floating Return

CS Current Sensing Input

9

11

10

8

LO

VB

VCC

COM IC Power & Signal Ground

Logic & Low-Side Gate Driver Supply

High-Side Gate Driver Floating Supply

Low-Side Gate Driver Output

Shutdown Input

No Connect

VDC IC Start-up and DC Bus Sensing Input

Page 7: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

7

State Diagram

VCC < 9.5V(VCC Fault or Power Down) orSD > 5.1V(Lamp Fault or Lamp Removal)

UVLO Mode1/2-Bridge OffIQCC ≅ 120µA

CPH = 0VCT = 0V (Oscillator Off)

PREHEAT Mode1/2-Bridge oscillating @ fPH

RPH // RTCPH Charging @ ICPH = 5 µACS Enabled @ CPH > 7.5VRVDC to COM = 12.6kΩ @

CPH > 7.5V

VCC > 11.5V (UV+) andSD < 5.1V

Power Turned On

FAULT ModeFault Latch Set

1/2-Bridge OffIQCC ≅ 180µA

CPH = 0VVCC = 15.6V

CT = 0V (Oscillator Off)

CS > 1.3V(Failure to Strike Lamp)

CS > 1.3V(Lamp Removal) orSD > 5.1V orVCC < 9.5V (UV-)(Power Turned Off)

CPH > 10V(End of PREHEAT Mode)

RUN ModeRPH = Open

1/2-Bridge Oscillating @fRUN

Ignition RampMode

RPHOpenfPH ramps to fRUN

CPH charging

CPH > 13V

CS > 1.3V(Lamp Fault)

Page 8: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

8

VCC

HO

LO

UVLO+15.6V

TIMING DIAGRAMSNORMAL OPERATION

UVLO-

CPH

CS

PH

IGN RUN UVLOUVLO

1.25VOver-Current Threshold

FREQ

7.5V

VCC

fph

frun

RT

CT

LO

CS

HO

RPH

RT

CT

LO

CS

HO

RPH

RT

CT

LO

CS

HO

RPH

VDC

Page 9: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

9

VCC

HO

LO

UVLO+15.6V

TIMING DIAGRAMSFAULT CONDITION

UVLO-

CPH

CS

PH

IGN RUN UVLOUVLO

1.3V

FREQ

7.5V

VCC

fph

frun

FA

ULT

PH

IGN

SD

> 5.1V

SD

RT

CT

LO

CS

HO

RPH

RT

CT

LO

CS

HO

RPH

RT

CT

LO

CS

HO

RPH

VDC

Page 10: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

10

Characterization Data

Page 11: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

11

Characterization Data

Page 12: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

12

Characterization Data

Page 13: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

13

Characterization Data

Page 14: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

14

Characterization Data

Page 15: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

15

Characterization Data

Page 16: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

16

Characterization Data

Page 17: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

17

Functional Description Under-voltage Lock-out Mode (UVLO)

The under-voltage lock-out mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on threshold of the IC. To identify the different modes of the IC, refer to the State Diagram shown on page 2 of this document. The IR2156 undervoltage lock-out is designed to maintain an ultra low supply current of less than 200uA, and to guarantee the IC is fully functional before the high and low side output drivers are activated. Figure 1 shows an efficient supply voltage using the start-up current of the IRS2156 together with a charge pump from the ballast output stage (RSUPPLY , CVCC, DCP1 and DCP2).

Figure 1, Start-up and supply circuitry.

The start-up capacitor (CVCC) is charged by current through supply resistor (RSUPPLY) minus the start-up current drawn by the IC. This resistor is chosen to provide 2X the maximum start-up current to guarantee ballast start-up at low line input voltage. Once the capacitor voltage on VCC reaches the start-up threshold VCCUV+, and the SD pin is below VSDTH-, the IC turns on and HO and LO begin to oscillate. The capacitor begins to discharge due to the increase in IC operating current (Figure 2).

DISCHARGETIME

INTERNAL VCCZENER CLAMP VOLTAGE

VCCHYS

Vccuv+

Vccuv-

CHARGE PUMPOUTPUT

t

VC1

RSUPPLY & CVCCTIMECONSTANT

CVCCDISCHARGE

Figure 2, Supply capacitor (CVCC) voltage.

During the discharge cycle, the rectified current from the charge pump charges the capacitor above the IC turn-off threshold. The charge pump and the internal 15.6V zener clamp of the IC take over as the supply voltage. The start-up capacitor and snubber capacitor must be selected such that enough supply

current is available over all ballast operating conditions. An external bootstrap diode (DBOOT) and the supply capacitor (CBOOT) comprise the supply voltage for the high side driver circuitry. To guarantee that the high-side supply is charged up before the first pulse on pin HO, the first pulse from the output drivers comes from the LO pin. During undervoltage lock-out mode, the high- and low-side driver outputs HO and LO are both low, pin CT is connected internally to COM to disable the oscillator, and pin CPH is connected internally to COM for resetting the preheat time. Preheat Mode (PH)

The preheat mode is defined as the state the IC is in when the lamp filaments are being heated to their correct emission temperature. This is necessary for maximizing lamp life and reducing the required ignition voltage. The IR2156 enters preheat mode when VCC exceeds the VCCUV+ positive-going threshold. HO and LO begin to oscillate at the preheat frequency with 50% duty cycle and with a dead-time which is set by the value of the external timing capacitor, CT, and internal deadtime resistor, RDT. Pin CPH is disconnected from COM and an internal 4uA current source (Figure 3) charges the external preheat timing capacitor on CPH linearly. The over-current protection on pin CS is disabled during preheat.

5

4

5uA

6

7CPH

CT

RPH

RT

11

8COM

LOM2

RCS

OSC. 13HO

M1

12VS

HalfBridgeOutput

I LOAD

VBUS (+)

VBUS (-)

LoadReturn

Half-Bridge Driver

S4

CPH

CT

RPH

RT

Figure 3, Preheat circuitry

The preheat frequency is determined by the parallel combination of resistors RT and RPH, together with timing capacitor CT. CT charges and discharges between 1/3 and 3/5 of VCC (see Timing Diagram, page 9). CT is charged exponentially through the parallel combination of RT and RPH connected internally to VCC through MOSFET S1. The charge time of CT from 1/3 to 3/5 VCC is the on-time of the respective output gate driver, HO or LO. Once CT exceeds 3/5 VCC, MOSFET S1 is turned off, disconnecting RT and RPH from VCC. CT is then discharged exponentially through an internal resistor, RDT, through MOSFET S3 to COM. The discharge time of CT from 3/5 to 1/3 VCC is the dead-time (both off) of the output gate drivers, HO and LO. The selected value of CT together with RDT therefore program the desired dead-time (see Design Equations, page 12, Equations 1 and 2). Once CT discharges below 1/3 VCC, MOSFET S3 is turned off, disconnecting RDT from COM, and MOSFET S1 is turned on, connecting RT and RPH again to VCC. The frequency remains at the preheat frequency until the voltage on pin CPH exceeds 13V and the IC enters Ignition Mode. During the preheat mode, both the over-current protection and the

14

13

12

11

8

IRS2156

LO

COM

VB

VS

HO

Half-Bridge Output

RSUPPLY

DCP1DCP2

M2

M1

CSNUB

VBUS(+)

CBOOT

RCS

VBUS(-)

2

VCC

CVCC

DBOOT RLIM

Page 18: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

18

DC bus under-voltage reset are enabled when pin CPH exceeds 7.5V.

Ignition Mode (IGN)

The ignition mode is defined as the state the IC is in when a high voltage is being established across the lamp necessary for igniting the lamp. The IR2156 enters ignition mode when the voltage on pin CPH exceeds 13V.

5

4

5uA

6

7CPH

CT

RPH

RT

11

8 COM

LOM2

OSC. 13HO

M1

12VS

HalfBridgeOutput

I LOAD

VBUS (+)

VBUS (-)

LoadReturn

Half-Bridge Driver

1.25V

S1

S4

Comp4

10

2VCC

CS

R1

S3

FaultLogic

RCSCCS

RT

RPH

CT

CPH

Figure 4, Ignition circuitry.

Pin CPH is connected internally to the gate of a p-channel MOSFET (S4) (see Figure 4) that connects pin RPH with pin RT. As pin CPH exceeds 13V, the gate-to-source voltage of MOSFET S4 begins to fall below the turn-on threshold of S4. As pin CPH continues to ramp towards VCC, switch S4 turns off slowly. This results in resistor RPH being disconnected smoothly from resistor RT, which causes the operating frequency to ramp smoothly from the preheat frequency, through the ignition frequency, to the final run frequency. The over-current threshold on pin CS will protect the ballast against a non-strike or open-filament lamp fault condition. The voltage on pin CS is defined by the lower half-bridge MOSFET current flowing through the external current sensing resistor RCS. The resistor RCS therefore programs the maximum allowable peak ignition current (and therefore peak ignition voltage) of the ballast output stage. The peak ignition current must not exceed the maximum allowable current ratings of the output stage MOSFETs. Should this voltage exceed the internal threshold of 1.3V, the IC will enter FAULT mode and both gate driver outputs HO and LO will be latched low. Run Mode (RUN)

Once the lamp has successfully ignited, the ballast enters run mode. The run mode is defined as the state the IC is in when the lamp arc is established and the lamp is being driven to a given power level. The run mode oscillating frequency is determined by the timing resistor RT and timing capacitor CT (see Design Equations, page 12, Equations 3 and 4). Should hard-switching occur at the half-bridge at any time due to an open-filament or lamp removal, the voltage across the current sensing resistor, RCS, will exceed the internal threshold of 1.3 volts and the IC will enter FAULT mode. Both gate driver outputs, HO and LO, will be latched low.

DC Bus Under-voltage Reset

Should the DC bus decrease too low during a brown-out line condition or over-load condition, the resonant output stage to the lamp can shift near or below resonance. This can produce hard-switching at the half-bridge which can damage the half-bridge switches. To protect against this, pin VDC measures the DC bus voltage and pulls down on pin CPH linearly as the voltage on pin VDC decreases 10.9V below VCC. This causes the p-channel MOSFET S4 (Figure 4) to close as the DC bus decreases and the frequency to shift higher to a safe operating point above resonance. The DC bus level at which the frequency shifting occurs is set by the external RBUS resistor and internal RVDC resistor. By pulling down on pin CPH, the ignition ramp is also reset. Therefore, should the lamp extinguish due to very low DC bus levels, the lamp will be automatically ignited as the DC bus increases again. The internal RVDC resistor is connected between pin VDC and COM when CPH exceeds 7.5V (during preheat mode).

Fault Mode (FAULT)

Should the voltage at the current sensing pin, CS, exceed 1.3V at any time after the preheat mode, the IC enters fault mode and both gate driver outputs, HO and LO, are latched in the ‘low’ state. CPH is discharged to COM for resetting the preheat time, and CT is discharged to COM for disabling the oscillator. To exit fault mode, VCC must be recycled back below the UVLO negative-going turn-off threshold, or, the shutdown pin, SD, must be pulled above VSDTH+. Either of these will force the IC to enter UVLO mode (see State Diagram, page 2). Once VCC is above VCCUV+ and SD is below 4.5V, the IC will begin oscillating again in the preheat mode.

Page 19: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

19

Design Equations

Note: The results from the following design equations can differ slightly from experimental measurements due to IC tolerances, component tolerances, and oscillator over- and under-shoot due to internal comparator response time. For additional design support for different lamp types and AC line input configurations, including component calculations, schematics, bill of materials and inductor specifications, please download IR’s Ballast Design Assistant (BDA) software at www.irf.com.

Step 1: Program Dead-time The dead-time between the gate driver outputs HO and LO is programmed with timing capacitor CT and an internal dead-time resistor RDT. The dead-time is the discharge time of capacitor CT from 3/5VCC to 1/3VCC and is given as:

2000⋅= TDT Ct [Seconds] (1)

Or,

2000DT

Tt

C = [Farads] (2)

Step 2: Program Run Frequency The final run frequency is programmed with timing resistor RT and timing capacitor CT. The charge time of capacitor CT from 1/3VCC to 3/5VCC determines the on-time of HO and LO gate driver outputs. The run frequency is therefore given as:

)20006.0(2

1

+⋅⋅=

TTRUN RC

f [Hertz] (3)

Or,

333312.1

1 −⋅⋅

=RUNT

T fCR [Ohms] (4)

Step 3: Program Preheat Frequency The preheat frequency is programmed with timing resistors RT and RPH, and timing capacitor CT. The timing resistors are

connected in parallel internally for the duration of the preheat time. The preheat frequency is therefore given as:

+

+⋅⋅

⋅⋅=

200051.0

2

1

PHT

PHTT

PH

RR

RRC

f [Hertz] (5)

Or,

⋅⋅−

⋅⋅=

333312.1

1

333312.1

1

PHTT

TPHT

PH

fCR

RfC

R [Ohms] (6)

Step 4: Program Preheat Time The preheat time is defined by the time it takes for the capacitor on pin CPH to charge up to 13 volts. An internal current source of 5uA flows out of pin CPH. The preheat time is therefore given as:

602.3 eCt PHPH ⋅= [Seconds] (7)

Or,

633.0 −⋅= etC PHPH [Farads] (8)

Step 5: Program Maximum Ignition Current The maximum ignition current is programmed with the external resistor RCS and an internal threshold of 1.25 volts (VCSTH+). This threshold determines the over-current limit of the ballast, which can be exceeded when the frequency ramps down towards resonance during ignition and the lamp does not ignite. The maximum ignition current is given as:

CSIGN R

I25.1= [Amps Peak] (9)

Or,

IGNCS I

R25.1= [Ohms] (10)

Page 20: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

20

Case Outline

Page 21: IR2156 DS REV-J 9-10-2012

IR2156(S)PbF

21

Qualification: Lead-free MSL3, industrial

http://www.irf.com

Data and specifications subject to change without notice.

Sales Offices, Agents and Distributors in Major Cities Throughout the World. © 2012 International Rectifier Printed in U.S.A