IRF1405ZS-7PIRF1405ZL-7P

HEXFET® Power MOSFET

VDSS = 55V

RDS(on) = 4.9mΩ

ID = 120A

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AUTOMOTIVE MOSFET

HEXFET® is a registered trademark of International Rectifier.

DescriptionSpecifically designed for Automotive applications,this HEXFET® Power MOSFET utilizes the latestprocessing techniques to achieve extremely lowon-resistance per silicon area. Additional featuresof this design are a 175°C junction operatingtemperature, fast switching speed and improvedrepetitive avalanche rating . These features com-bine to make this design an extremely efficientand reliable device for use in Automotive applica-tions and a wide variety of other applications.

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D

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Features Advanced Process Technology Ultra Low On-Resistance 175°C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax

Absolute Maximum RatingsParameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) A

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (See Fig. 9)

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)

IDM Pulsed Drain Current PD @TC = 25°C Maximum Power Dissipation W

Linear Derating Factor W/°CVGS Gate-to-Source Voltage VEAS Single Pulse Avalanche Energy (Thermally Limited) mJEAS (tested) Single Pulse Avalanche Energy Tested Value IAR Avalanche Current AEAR Repetitive Avalanche Energy mJ

TJ Operating Junction and °C

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds

Mounting torque, 6-32 or M3 screw

Thermal ResistanceParameter Typ. Max. Units

RθJC Junction-to-Case ––– 0.65 °C/WRθCS Case-to-Sink, Flat, Greased Surface 0.50 –––RθJA Junction-to-Ambient ––– 62RθJA Junction-to-Ambient (PCB Mount, steady state) ––– 40

10 lbf•in (1.1N•m)

230

1.5 ± 20

250

810

See Fig.12a,12b,15,16

300 (1.6mm from case )

-55 to + 175

Max.150

100

590

120

PD - 96905B

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Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25°C,

L=0.064mH, RG = 25Ω, IAS = 88A, VGS =10V.Part not recommended for use above this value.

Pulse width ≤ 1.0ms; duty cycle ≤ 2%. Coss eff. is a fixed capacitance that gives the same

charging time as Coss while VDS is rising from 0 to 80%VDSS.

Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. This value determined from sample failure population. 100%

tested to this value in production. This is applied to D2Pak, when mounted on 1" square PCB

( FR-4 or G-10 Material ). For recommended footprint andsoldering techniques refer to application note #AN-994.

Rθ is measured at TJ of approximately 90°C.

Solder mounted on IMS substrate.

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D

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S

D

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Static @ TJ = 25°C (unless otherwise specified)Parameter Min. Typ. Max. Units

V(BR)DSS Drain-to-Source Breakdown Voltage 55 ––– ––– V∆ΒVDSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.054 ––– V/°CRDS(on) SMD Static Drain-to-Source On-Resistance ––– 3.7 4.9 mΩVGS(th) Gate Threshold Voltage 2.0 ––– 4.0 Vgfs Forward Transconductance 150 ––– ––– SIDSS Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200Qg Total Gate Charge ––– 150 230 nCQgs Gate-to-Source Charge ––– 37 –––Qgd Gate-to-Drain ("Miller") Charge ––– 64 –––td(on) Turn-On Delay Time ––– 16 ––– nstr Rise Time ––– 140 –––td(off) Turn-Off Delay Time ––– 170 –––tf Fall Time ––– 130 –––LD Internal Drain Inductance ––– 4.5 ––– nH Between lead,

6mm (0.25in.)LS Internal Source Inductance ––– 7.5 ––– from package

and center of die contactCiss Input Capacitance ––– 5360 ––– pFCoss Output Capacitance ––– 1310 –––Crss Reverse Transfer Capacitance ––– 340 –––Coss Output Capacitance ––– 6080 –––Coss Output Capacitance ––– 920 –––Coss eff. Effective Output Capacitance ––– 1700 –––

Diode Characteristics Parameter Min. Typ. Max. Units

IS Continuous Source Current ––– ––– 150

(Body Diode) AISM Pulsed Source Current ––– ––– 590

(Body Diode)VSD Diode Forward Voltage ––– ––– 1.3 Vtrr Reverse Recovery Time ––– 63 95 nsQrr Reverse Recovery Charge ––– 160 240 nC

RG = 5.0Ω

ID = 88A

VDS = 25V, ID = 88A

VDD = 28V

ID = 88A

VGS = 20VVGS = -20V

VDS = 44V

VGS = 10V

VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

VGS = 10V

MOSFET symbol

VGS = 0V

VDS = 25V

VGS = 0V, VDS = 44V, ƒ = 1.0MHz

Conditions

VGS = 0V, VDS = 0V to 44V

ƒ = 1.0MHz, See Fig. 5

TJ = 25°C, IF = 88A, VDD = 28Vdi/dt = 100A/µs

TJ = 25°C, IS = 88A, VGS = 0V

showing theintegral reverse

p-n junction diode.

VDS = VGS, ID = 150µA

VDS = 55V, VGS = 0VVDS = 55V, VGS = 0V, TJ = 125°C

ConditionsVGS = 0V, ID = 250µA

Reference to 25°C, ID = 1mA VGS = 10V, ID = 88A

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Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics Fig 4. Typical Forward Transconductancevs. Drain Current

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D, D

rain

-to-

Sou

rce

Cur

rent

(A

)

VGSTOP 15V

10V8.0V7.0V6.0V5.5V5.0V

BOTTOM 4.5V

≤60µs PULSE WIDTHTj = 25°C

4.5V

0 2 4 6 8 10 12

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

I D, D

rain

-to-

Sou

rce

Cur

rent

(Α

)

TJ = 25°C

TJ = 175°C

VDS = 25V

≤60µs PULSE WIDTH

0 25 50 75 100 125 150 175 200

ID,Drain-to-Source Current (A)

0

25

50

75

100

125

150

Gfs

, For

war

d T

rans

cond

ucta

nce

(S)

TJ = 25°C

TJ = 175°C

VDS = 10V

300µs PULSE WIDTH

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

I D, D

rain

-to-

Sou

rce

Cur

rent

(A

)

4.5V

≤60µs PULSE WIDTHTj = 175°C

VGSTOP 15V

10V8.0V7.0V6.0V5.5V5.0V

BOTTOM 4.5V

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage

Fig 5. Typical Capacitance vs.Drain-to-Source Voltage

Fig 7. Typical Source-Drain DiodeForward Voltage

0 50 100 150 200

QG Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

VG

S, G

ate-

to-S

ourc

e V

olta

ge (

V) VDS= 44V

VDS= 28V

ID= 88A

1 10 100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C, C

apac

itanc

e(pF

)

VGS = 0V, f = 1 MHZCiss = Cgs + Cgd, C ds SHORTED

Crss = Cgd Coss = Cds + Cgd

Coss

Crss

Ciss

0.0 0.5 1.0 1.5 2.0 2.5

VSD, Source-to-Drain Voltage (V)

1

10

100

1000

I SD

, Rev

erse

Dra

in C

urre

nt (

A)

TJ = 25°C

TJ = 175°C

VGS = 0V

1 10 100 1000

VDS, Drain-to-Source Voltage (V)

0.01

0.1

1

10

100

1000

10000

I D,

Dra

in-t

o-S

ourc

e C

urre

nt (

A)

OPERATION IN THIS AREA LIMITED BY R DS(on)

Tc = 25°CTj = 175°CSingle Pulse

100µsec

1msec

10msec

DC

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current vs.Case Temperature

Fig 10. Normalized On-Resistancevs. Temperature

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

2.5

RD

S(o

n) ,

Dra

in-t

o-S

ourc

e O

n R

esis

tanc

e

(

Nor

mal

ized

)

ID = 88A

VGS = 10V

1E-006 1E-005 0.0001 0.001 0.01 0.1 1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

The

rmal

Res

pons

e (

Z th

JC ) 0.20

0.10

D = 0.50

0.020.01

0.05

SINGLE PULSE( THERMAL RESPONSE )

Notes:1. Duty Factor D = t1/t22. Peak Tj = P dm x Zthjc + Tc

Ri (°C/W) τi (sec)0.1707 0.000235

0.1923 0.000791

0.2885 0.008193

τJ

τJ

τ1

τ1τ2

τ2 τ3

τ3

R1

R1 R2

R2 R3

R3

ττC

Ci i/RiCi= τi/Ri

25 50 75 100 125 150 175

TC , Case Temperature (°C)

0

25

50

75

100

125

150

I D,

Dra

in C

urre

nt (

A)

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QG

QGS QGD

VG

Charge

D.U.T.VDS

IDIG

3mA

VGS

.3µF

50KΩ

.2µF12V

Current RegulatorSame Type as D.U.T.

Current Sampling Resistors

+

-

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energyvs. Drain CurrentFig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

tp

V(BR)DSS

IAS

Fig 14. Threshold Voltage vs. Temperature

RG

IAS

0.01Ωtp

D.U.T

LVDS

+- VDD

DRIVER

A

15V

20VVGS

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

0

200

400

600

800

1000

EA

S ,

Sin

gle

Pul

se A

vala

nche

Ene

rgy

(mJ) ID

TOP 14A23A

BOTTOM 88A

-75 -50 -25 0 25 50 75 100 125 150 175 200

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

VG

S(t

h) G

ate

thre

shol

d V

olta

ge (

V)

ID = 150µA

ID = 250µA

ID = 1.0mA

ID = 1.0A

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Fig 15. Typical Avalanche Current vs.Pulsewidth

Fig 16. Maximum Avalanche Energyvs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:(For further info, see AN-1005 at www.irf.com)1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a

temperature far in excess of Tjmax. This is validated for every part type.2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single avalanche pulse.5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche).6. Iav = Allowable avalanche current.7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25°C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav ·f ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) =T/ ZthJC

Iav = 2T/ [1.3·BV·Zth]EAS (AR) = PD (ave)·tav

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

300

EA

R ,

Ava

lanc

he E

nerg

y (m

J)

TOP Single Pulse BOTTOM 1% Duty CycleID = 88A

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

1

10

100

1000

Ava

lanc

he C

urre

nt (

A)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Τ j = 25°C and Tstart = 150°C.

0.01

Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ∆Tj = 150°C and Tstart =25°C (Single Pulse)

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Fig 17. for N-ChannelHEXFETPower MOSFETs

• • •

P.W.Period

di/dt

Diode Recoverydv/dt

Ripple ≤ 5%

Body Diode Forward DropRe-AppliedVoltage

ReverseRecoveryCurrent

Body Diode ForwardCurrent

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D = P.W.Period

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+

-

+

+

+-

-

-

&•

• !"#""• $%%• "#""&#

VDS

90%

10%VGS

td(on) tr td(off) tf

'(≤ 1 )$≤ 0.1 %

&

&'(''

+-

Fig 18a. Switching Time Test Circuit

Fig 18b. Switching Time Waveforms

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D2Pak - 7 Pin Package OutlineDimensions are shown in millimeters (inches)

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D2Pak - 7 Pin Part Marking Information

D2Pak - 7 Pin Tape and Reel

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Data and specifications subject to change without notice.

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IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information. 12/06

TO-263CA 7 Pin Long Leads Package OutlineDimensions are shown in millimeters (inches)

Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/