irfd120
TRANSCRIPT
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File Number 2315.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright Intersil Corporation 1999
IRFD120
1.3A, 100V, 0.300 Ohm, N-ChannelPower MOSFET
This advanced power MOSFET is designed, tested, andguaranteed to withstand a specified level of energy in the
breakdown avalanche mode of operation. These are
N-Channel enhancement mode silicon gate power field
effect transistors designed for applications such as switching
regulators, switching convertors, motor drivers, relay drivers,
and drivers for high power bipolar switching transistors
requiring high speed and low gate drive power. They can be
operated directly from integrated circuits.
Formerly developmental type TA17401.
Features
1.3A, 100V
rDS(ON) = 0.300
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speeds
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 Guidelines for Soldering Surface Mount
Components to PC Boards
Symbol
Packaging
HEXDIP
Ordering Information
PART NUMBER PACKAGE BRAND
IRFD120 HEXDIP IRFD120
NOTE: When ordering, use the entire part number.
G
D
S
SOURCE
GATE
DRAIN
Data Sheet July 1999
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Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
IRFD120 UNITS
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS 100 V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 100 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 1.3 A
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 5.2 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V GS 20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD 1.0 W
Linear Derating Factor (See Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.008 W/ oC
Single Pulse Avalanche Energy Rating (Note 3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS 36 mJ
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TLPackage Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
300
260
oCoC
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250A, VGS = 0V (Figure 9) 100 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250A 2.0 - 4.0 V
Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 A
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC - - 250 A
On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON) Max, VGS = 10V 1.3 - - A
Gate Source Leakage IGSS VGS = 20V - - 500 nA
Drain Source On Resistance (Note 2) rDS(ON) ID = 0.6A, VGS = 10V (Figures 7, 8) - 0.25 0.30
Forward Transconductance (Note 2) gfs VDS > ID(ON) x rDS(ON)MAX , ID = 0.6A (Figure 11) 0.9 1.0 - S
Turn-On Delay Time td(ON) VDD = 0.5 x Rated BVDSS, ID 1.3A,
VGS = 10V, RG = 9.1
RL
= 38.5 for VDD
= 50V
MOSFET Switching Times are Essentially
Independent of Operating Temperature
- 20 40 ns
Rise Time tr - 35 70 ns
Turn-Off Delay Time td(OFF) - 50 100 ns
Fall Time tf - 35 70 ns
Total Gate Charge
(Gate to Source + Gate to Drain)
Qg(TOT) VGS = 10V, ID = 1.3A, VDS = 0.8 x Rated BVDSS,
Ig(REF) = 1.5mA (Figure 13)
Gate Charge is Essentially Independent of Operating
Temperature
- 11 15 nC
Gate to Source Charge Qgs - 6.0 - nC
Gate to Drain Miller Charge Qgd - 5.0 - nC
Input Capacitance CISS VGS = 0V, VDS = 25V, f = 1MHz (Figure 10) - 450 - pF
Output Capacitance COSS - 200 - pF
Reverse Transfer Capacitance CRSS - 50 - pF
Internal Drain Inductance LD Measured From the Drain
Lead, 2mm (0.08in) from
Package to Center of Die
Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
- 4.0 - nH
Internal Source Inductance LS Measured From theSource
Lead, 2mm (0.08in) from
Header to Source Bonding
Pad
- 6.0 - nH
Thermal Resistance Junctionto Ambient RJA Free Air Operation - - 120oC/W
LS
LD
G
D
S
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Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Continuous Source to Drain Current ISD ModifiedMOSFET Symbol
Showing the Integral
Reverse P-N Junction
Diode
- - 1.3 A
Pulse Source to Drain Current ISDM - - 5.2 A
Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 1.3A, VGS = 0V (Figure 12) - - 2.5 V
Reverse Recovery Time trr TJ = 150oC, ISD = 1.3A, dISD/dt = 100A/s - 280 - ns
Reverse Recovery Charge QRR TJ = 150oC, ISD = 1.3A, dISD/dt = 100A/s - 1.6 - C
NOTES:
2. Pulse test: pulse width 300s, duty cycle 2%.
3. VDD = 25V, starting TJ = 25oC, L = 32mH, RG = 25, peak IAS = 1.3A.
Typical Performance Curves Unless Otherwise Specified
FIGURE1. NORMALIZEDPOWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
AMBIENT TEMPERATURE
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA FIGURE 4. OUTPUT CHARACTERISTICS
G
D
S
TA, AMBIENT TEMPERATURE (oC)
POWERDISSIPATIONMULTIPLIER
00 25 50 75 100 150
0.2
0.4
0.6
0.8
1.0
1.2
125
TA, AMBIENT TEMPERATURE (oC)
50 75 10025 150
1.5
1.2
0.9
0
0.6
ID,DRAINCURRENT(A)
0.3
125
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
ID,DRAIN
CURRENT(A)
100
0.1
100.1
0.01
10
LIMITED BY rDS(ON)
AREA MAY BEOPERATION IN THIS
TJ = MAX RATED
1ms
10ms
100ms
100s
DC
1
ID,DRAIN
CURRENT(A)
0 10 20 30 40
4
8
12
16
20
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
VGS = 4V
VGS = 5V
VGS = 7V
PULSE DURATION = 80sVGS = 10V
VGS = 8V
VGS = 6V
VGS = 9V
DUTY CYCLE = 0.5% MAX
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FIGURE 5. SATURATION CHARACTERISTICS FIGURE 6. TRANSFER CHARACTERISTICS
NOTE: Heating effect of 2s pulse is minimal.
FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENTFIGURE 8. NORMALIZED DRAIN TOSOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Typical Performance Curves Unless Otherwise Specified (Continued)
ID,DRAINCUR
RENT(A)
0 1 2 3 4
2
4
6
8
10
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
0
VGS = 9V
VGS = 4V
VGS = 5V
VGS = 6V
VGS = 10V
VGS = 8V
VGS = 7V
PULSE DURATION = 80sDUTY CYCLE = 0.5% MAX
20
IDS(ON),DRAINTOSOU
RCECURRENT(A)
VGS, GATE TO SOURCE VOLTAGE (V)
16
12
8
086420 10
4
TJ = 25oC
TJ = 125oC
TJ = -55oC
PULSE DURATION = 80sDUTY CYCLE = 0.5% MAXVDS > ID(ON) x rDS(ON)MAX
0
0.4
0.8
10 20 30
rDS(ON),DRAINTOSOURCE
ID, DRAIN CURRENT (A)
400
0.2
0.6 VGS = 10V
VGS = 20VONRESISTANCE()
2s PULSE TEST
NORMALIZEDDRAINTOSOURCE
2.2
1.4
1.0
0.6
0.240
TJ, JUNCTION TEMPERATURE (oC)
120 160
1.8
800-40
ONRESISTANCE
PULSE DURATION = 80sDUTY CYCLE = 0.5% MAXVGS = 10V, ID = 0.6A
1.25
0.95
0.85
0.75-40
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED
DRAINTOSOURCE
BREAKD
OWNVOLTAGE
160
1.05
1.15
0 40 80 120
IDS = 250A1000
200
00 20 50
C,CAPA
CITANCE(pF)
600
VDS, DRAIN TO SOURCE VOLTAGE (V)
800
400
10 30
CISS
COSS
CRSS
40
VGS = 0V, f = 1MHzCISS = CGS + CGDCRSS = CGDCOSS CDS + CGD
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FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE
FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE
Test Circuits and Waveforms
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
Typical Performance Curves Unless Otherwise Specified (Continued)
ID, DRAIN CURRENT (A)
gfs,TRANSCOND
UCTANCE(S)
0 4 8 12 16
1
2
3
4
5
200
TJ = -55oC
TJ = 25oC
TJ = 125oC
PULSE DURATION = 80sDUTY CYCLE = 0.5% MAX
0 2 3
0.1
10
2
ISD,SOURCETODRA
INCURRENT(A)
VSD, SOURCE TO DRAIN VOLTAGE (V)
102
1
5
5
2
4
TJ = 25oC
TJ = 150oC
2PULSE DURATION = 80sDUTY CYCLE = 0.5% MAX
QG, GATE CHARGE (nC)
VGS,GATETOSOURCE(V)
0 4 6 10
5
15
20ID = 5.2A
10
0
2 8
VDS = 80V
VDS = 50V
VDS = 20V
tP
VGS
0.01
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate andreliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms (Continued)
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS90%
10%
tf
td(OFF)
tOFF
90%
50%50%
10%PULSE WIDTH
VGS
0
0
0.3F
12VBATTERY
50k
VDS
S
DUT
D
G
Ig(REF)0
(ISOLATED
VDS
0.2F
CURRENTREGULATOR
ID CURRENTSAMPLING
IG CURRENTSAMPLING
SUPPLY)
RESISTOR RESISTOR
SAME TYPEAS DUT
Qg(TOT)
Qgd
Qgs
VDS
0
VGS
VDD
Ig(REF)
0
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