ITk Pixel PoweringRusty Boyd

The University of Oklahoma US ATLAS ITk Meeting

SLAC July 7th, 2015

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Powering

2010 JINST 5 C12002Module

FE-I4 FE-I4 FE-I4 FE-I4

Module

FE-I4 FE-I4 FE-I4 FE-I4

Module

FE-I4 FE-I4 FE-I4 FE-I4

1

n -1

n

R I

nV

I

Figure 1. Schematical design of a SP scheme.The current is reduced by a factor n, where nis the number of modules in the chain, with re-spect to a parallel powering scheme where thesame number of modules is powered by a con-stant voltage.

nR I

Module

FE-I4 FE-I4 FE-I4 FE-I4

1

n -1

nV FE-I4 FE-I4 FE-I4 FE-I4

FE-I4 FE-I4 FE-I4 FE-I4

nI

Figure 2. Schematical design of a parallel pow-ering scheme.

modules as in the traditionally used powering schemes. Issues connected to system aspects such asAC-coupled module readout and HV distribution have to be considered as well.

Based on the experience acquired with an alternative powering scheme for the ATLAS pixeldetector [5], a SP scheme is proposed for the upgrade of the ATLAS pixel detector at sLHC.The scheme architecture as well as its main elements will be discussed in this paper, after a briefdescription of the ATLAS pixel detector design for sLHC.

2 The ATLAS pixel detector at sLHC

The current design of the ATLAS pixel detector for sLHC foresees 4 to 5 barrel layers, and 6 disksper side in the foreward region. Given the different requirements, two dedicated developments areongoing for the two innermost layers, and for the outer layers and disks respectively. The designof the inner layers requires advanced technologies to cope with the high rate and the radiationenvironment. For the outer layers and the disks which cover a very large area at lower radiationlevels and particle rates, the main requirements are simplicity and reduction of construction costsand time. The idea is thus to extend the available hybrid pixel technology to large area detectors,i.e. identify and counteract main costs drivers.

As a consequence of this choice, the developement of a stave concept and of a first prototypefor the outer layers is proceeding fast. Figure 3 illustrates the stave concept [6]. In the baselinedesign, modules consists of arrangements of 2 by 2 FE-I4 chips.3 32 modules are mounted on eachstave, 16 on the top and 16 on the bottom. Each stave quarter (i.e. 8 modules) is an electrical unitserved by one stave cable and one End Of Stave (EOS) card. The stave cable is a multi-layer cableintegrated in the stave structure with pre-bent tabs glued on the stave surface. A module flex with

3FE-I4 is the new ATLAS pixel front-end chip [7]. Its development targets both the Insertable B-Layer (IBL)project [9] and the ATLAS pixels outer layers at sLHC.

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2010 JINST 5 C12002

PUBLISHED BY IOP PUBLISHING FOR SISSA

RECEIVED: October 15, 2010ACCEPTED: November 15, 2010PUBLISHED: December 1, 2010

TOPICAL WORKSHOP ON ELECTRONICS FOR PARTICLE PHYSICS 2010,20–24 SEPTEMBER 2010,AACHEN, GERMANY

A serial powering scheme for the ATLAS pixeldetector at sLHC

L. Gonella,1 D. Arutinov, M. Barbero, A. Eyring, F. Hugging, M. Karagounis,H. Kruger and N. Wermes

Physikalisches Institut, Universitat Bonn,Nussallee 12, D-53115 Bonn, Germany

E-mail: laura.gonella@physik.uni-bonn.de

ABSTRACT: Powering concepts, such as serial powering and DC-DC conversion, are in develop-ment for the silicon trackers at sLHC to achieve an efficient power distribution with a minimumvolume of cables. This paper will describe the serial powering scheme developed for the upgradedATLAS pixel detector, with focus on the scheme architecture and on the main components in-volved: the Shunt-LDO regulator and the protection scheme. Issues connected to system aspectswill be discussed, and the advantages in terms of material reduction provided by the proposed serialpowering scheme will be presented.

KEYWORDS: Voltage distributions; Particle tracking detectors (Solid-state detectors)

1Corresponding author.

c� 2010 IOP Publishing Ltd and SISSA doi:10.1088/1748-0221/5/12/C12002

• Two ITk Pixel powering schemes are under development • Serial powering - baseline • Pulsed powering (parallel)

• Neither have been demonstrated to work in complete services chain

• Both require power supply design

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Both• Need more manpower

• Serial power effort has been mostly from Bonn University until recently (3 more European institutes & OK State)

• OU is only participant in Pulsed Powering R&D - Supported by ATLAS Project Office in first 2 years.

• Need power supply designs and full scale tests (100 m cable plant) in time to write TDR

• Will an ITk pixel workshop be called in fall 2015 to bring other institutes up to speed, get them involved?

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OU & OK State• Build knowledge base and libraries for power system simulations • Build & operate full scale, generic power test stand to verify simulations

• Readout system compatibility (3 at this time for ITk pixel R&D)Serial Powering: Results of the simulation

!  Multiphysics simulation for for cable diameter optimization !  These plots show the system response to rapid

current injection (left) and ramped current injection (right). Therefore, we know that the startup routine will have to be carefully controlled or modules might be damaged.  1 2 3 4 5 6 7 8 9 10 11 12

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0

20

40

60

80

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Comparison of test and simulated values of cable input voltage, input pedestal voltage & dc voltage across the load resistor

Load Resistance (Ohms)

Perc

ent d

iffer

ence

in

sim

ulat

ioin

v te

st v

alue

s

1kHz, Vinrms − Vped6kHz, Vinms − Vped1kHz, Vloadavg 6kHz, Vloadavg1khz, Vped6kHz, Vped

0 500 1000 1500 2000 2500−15

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−5

0

5

10

15

20Simulated voltages for the modeled cable and a 2 Ohm load at 6Khz

Time (x200 ns)

Ampl

itude

(V)

Rectified sine wave input to cableVoltage across load

R22

D1

MBR20100CT VDDO1

VDDO2

Rser=.02

V1

SINE(0 3 3k)

R1

.015

R3

.015

C2

1.010m

n004

n003n002n001

.tran 0 12m 10m

.model VDD LTRA(len=50 R=0.0217 L=710n C=33p)

--- Y:\Google Drive\Work\Pulsed Powering\Sims\LTSpice T-line VDD values HW.asc ---

OU

OSU4

Test System Physical Layout - to be built at OU

Module(s)

Sealed Faraday cage

Cooling tubes

Power cables

Clock & Control

earth

Room exhaust

Dry flushing gas

Data out

Broken lines indicate controlled electrical isolation from the detector components and

Faraday cage.

hum

idity

logicSystem interlock

hum

idity

Programmable

Power Safety Shunt

Shunt I/O

Monitor coilBroadband Antenna

Flow monitor

• Remote control readout, operation

• Realistic, full length cables and connectors (Pixel to start)

• EMI/RFI susceptibility and radiation measurement

• Cooling, detector safety, etc…

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OU Powering Production• Many unknowns

• What power supplies get built? • Where do they get built? • Who pays? • Are patch panels required? • Do cables, connectors, power supplies need engineering

supervision during production? • To early to define a production role for power components…

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Serial Powering: OSU Production plans

!  These plans are contingent upon the successful design of a serial powering system

!  We can be responsible for the production of services !  We can also be responsible for the production of power

supplies !  If serial powering is the US ATLAS Deliverable then serial

powering will be our major project !  We plan to have 2 graduate students and 2 EE

undergraduate students working under Welch’s supervision.

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US Funding for ITk Pixel Power• Ends 2015

• OK State U.: S. Welch support ends September, 2015 • To date: simulations, interconnect research

• OU: R. Boyd support ends April 2016 (base grant renewal?) • TWEPP 2013 poster, JINST proceedings, IBL authorship project (A.A.

Hasib) • No support for students exists but OU has recruited 4 undergraduates

with very limited time, may be able to resume testing this fall • Only tiny amount of material support from 3 year base grant

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R&D Summary• The two proposed solutions, serial power and pulsed power, have been

largely supported by two institutes: OU and Bonn University • Oklahoma State and 3 European institutions have joined the serial

power R&D effort in the past year • OU continues to be the only institute investigating pulsed powering • There is no demonstrated solution for ITk pixel power • There are no power supplies suitable for either solution

• Support for both powering efforts in the US could end soon if key personnel are lost

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Power Production Summary

• In general, the stuff of power supply systems have been “core” items for Pixel Detector scale projects

• However, construction demands may result in parts of the power system being built in the US, a la several IBL cables

• Even if construction takes place elsewhere, the IBL experience, similar in technology if not scale, suggests that close supervision of and interaction with vendors is essential to success

• Bottom line: the only US deliverables for power supply systems may be specifications and engineering supervision of production

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further information

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Material Requirements• More important than ever that we develop capability to do low frequency cable

measurements to characterize their response in the power system simulations • Equipment (VNA) doesn’t seem to exist in US ATLAS institutes • Expensive, even if we hire measurement out to industry (and test stand needs

would not be met) • Readout hardware ($$$) needed for multiple efforts at OU and OK State but

critical to power development • Real modules are also not free. Can’t do meaningful power system test without

them • Other expenses: PPSP chip support (for serial powering DCS), EMI/RFI

measurements jigs, etc.

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Serial Powering

• 4 European groups working on bench tests • Includes DCS chip, PPSP • Based on 4-chip FE-I4 modules ($$)

• Not clear how shunt power is dissipated on stave

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Pulsed Powering• Achieves point-of-load regulation over the same wire pair that delivers

power • Compatible with serial powering and mitigates losses of shunt

regulation by providing constant voltage across N modules, fails safe! • When combined with resonant inductive coupling

• Provides current reduction in cables by efficient air core transformer • Possibility for wireless power transmission into detector

• Must be engineered to not emit RFI/EMI into neighboring subdetectors

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ComparisonSerial powering Pulsed Powering

Current reduction yes with resonant inductive coupling

Fails Safe no yes

Added power dissipation in detector

prop. to (module max. current - instantaneous current)

prop. to (LDO + rectifier resistance (few milliohms))

Max cable current Maximum of one module depends on transformer design

Module power isolation not possible, N voltage references yes

FE design dependency shunt regulator LDO voltage regulator

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