j. mccalley voltage source converter. basic topology 2 below is the basic topology of the basic...

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J. McCalley Voltage source converter

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Page 1: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

J. McCalley

Voltage source converter

Page 2: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Basic topology

2

Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC).

Our interest is to study the operation of this converter. We will focus on the grid-side converter and then the rotor-side converter.

Page 3: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

3

Below is an illustration of the grid-side converter.

In the figure, we have represented ideal bi-directional switches. It converts voltage and currents from DC to AC while the exchange of power can be in both directions•From AC to DC (rectifier mode)•From DC to AC (inverter mode).The ideal switch is implemented by an insulated gate bipolar transistor (IGBT). We will not consider switching time or voltage drops for our ideal switches.

There is also a grid-side filter to smooth the voltage waveforms generated. The filter is composed of only inductances in this case, but other filter designs are used.

The command of the upper switches are made by signals Sag, Sbg, and Scg, and of the lower switches by signals S’ag, S’bg, and S’cg. We will require, for any leg, that the state of the lower switch be opposite to the state of the upper switch, i.e.,

;;; cgcgbgbgagag SSSSSS

where the overbar means “complement.”

Page 4: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

4

By inspecting the switching circuit, we observe that the DC voltage Vbus is connected across phase a when Sag=1 (closed), which necessarily implies S’ag=0. A similar thing can be said for the b-phase and for the c-phase. Noting the location of the point “o” on the DC bus, we may represent this according to:

Generalizing the above results in

We note that this converter may have two possible voltages for each phase, Vbus or 0;therefore it is referred to as a two-level converter. Multi-level converters are also used.

cgbusco

bgbusbo

agbusao

SVv

SVv

SVv

1,0

1,0

1,0

cg

bg

ag

S

S

S

cbajSSVv jgjgbusjo ,,,1,0

Page 5: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

5

But now let’s consider the phase voltages to neutral. Focusing on only the a-phase, we can draw the below figure.

o n

vao

-

+ +

-

van

vno- +

Then we can write that

noaoan vvv Similarly,

nococn

nobobn

vvv

vvv

Generalizing,cbajvvv nojojn ,,

For balanced voltages,0 cnbnan vvv

Substitute in above expressions to the left:

coboaono

nocoboao

noconobonoao

vvvv

vvvv

vvvvvv

3

1

3

0

Substitute above into left-hand vjn expressions.

Page 6: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

6

nococn

nobobn

noaoan

vvv

vvv

vvv

Substitute in above expressions to the left:

coboaono vvvv 3

1

boaococoboaoconococn

coaobocoboaobonobobn

coboaocoboaoaonoaoan

vvvvvvvvvv

vvvvvvvvvv

vvvvvvvvvv

3

1

3

2

3

13

1

3

2

3

13

1

3

2

3

1

From slide 4:

cgbusco

bgbusbo

agbusao

SVv

SVv

SVv

Substitute these vjo expressions on the left into the vjn expressions above.

Page 7: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

7

Substitute in above expressions to the left:

bgagcgbus

bgbusagbuscgbusboaococn

cgagbgbus

cgbusagbusbgbuscoaobobn

cgbgagbus

cgbusbgbusagbuscoboaoan

SSSV

SVSVSVvvvv

SSSV

SVSVSVvvvv

SSSV

SVSVSVvvvv

233

1

3

2

3

1

3

2

233

1

3

2

3

1

3

2

233

1

3

2

3

1

3

2

We have expressed out line-to-neutral voltages in terms of the switch statuses:

bgagcgbus

cn

cgagbgbus

bn

cgbgagbus

an

SSSV

v

SSSV

v

SSSV

v

23

23

23

Page 8: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

8

How many different combinations of switches do we have? 000, 001, 010, 011, 100, 101, 110, 111

We can observe the different switch states below.

Page 9: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

9

How many different combinations of switches do we have?000, 001, 010, 011, 100, 101, 110, 111

Lets evaluate our van equations for each switch status. For example, for 000:

023

023

023

bgagcgbus

cn

cgagbgbus

bn

cgbgagbus

an

SSSV

v

SSSV

v

SSSV

v

For example, for 001:

3

200)1(2

3

3100

3

3100

3

busbuscn

busbusbn

busbusan

VVv

VVv

VVv

Page 10: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

10

The following table provides switch status, vjo, and vjn for all eight states.

Notice that vjo takes only two different voltage levels, but van take five different voltage levels.

Page 11: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Grid-side converter

11

Let’s order the switching states as follows: 100

110111011001000

Now plot the resulting vjn outputs, and you get….

This is called a six pulse generation scheme.

Page 12: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Harmonic analysis of van

12

This is an AC voltage!

Observe- This function is half-wave symmetric even harmonics n=0,2,4,…don’t exist- It is also an odd function (symmetric about the origin) and therefore

We can obtain the Fourier series of this function according to

tnbtnaatfn

nn 01

00 sincos)(

0

0

0

00

00

00

sin)(2

cos)(2

)(1

Tn

Tn

T

tdtntfT

b

tdtntfT

a

dttfT

a

2/

0

00

0

sin)(4

;0T

nn tdtntfT

ba

Page 13: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Harmonic analysis of van

13

3

2cos

3cos2

3

2

3

2cos

3cos2

3

21

3

2cos1

3cos

3

2

3

2coscos

3cos2

3

2cos21

3cos

3

2

3

2cos

2

2cos

6

2cos

3

2cos21

6

2cos

23

4

coscos2cos3

4

sin3

sin3

2sin

3

4

sin)(4

0

0

0

0

0

0

0

0

0

0

0

0

2/

3/0

3/

6/0

6/

0000

2/

3/

0

3/

6/

0

6/

0

00

2/

0

00

0

0

0

0

0

0

0

0

0

0

0

nnn

V

nnn

Vnn

n

V

nnnnnn

V

T

Tn

T

Tn

T

Tn

T

Tn

T

Tn

n

TV

T

tntntnn

V

T

tdtnV

tdtnV

tdtnV

T

tdtntfT

b

bus

busbus

bus

bus

T

T

T

T

Tbus

T

T

bus

T

T

bus

T

bus

T

n

Observe that harmonics of multiples of 3 also do not exist, since for n=3,6,9,…

01123

2cos

3cos2

nn 0nb

Therefore, only n=1, 5, 7, 11, 13, 17, 19, 23, 25, 29, … exist.

So let’s compute the bn coefficient for van.

Page 14: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Harmonic analysis of van

14

3

2cos

3cos2

3

2

nnn

Vb busn

The amplitude of the different harmonics, for Vbus=1, would then be:

n |bn|

1 0.6366

5 0.1273

7 0.0909

11 0.0579

13 0.0490

17 0.0374

19 0.0335

… …

tnbtnaatfn

nn 01

00 sincos)(

Page 15: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Harmonic analysis of van

15

n=1 n=1,5 n=1,5,7

n=1,5,7, 11 n=1,5,7, 11,13 n=1,5,7, 11,13, 17

n=1,5,7, 11,13, 17, 19

• Observe the fundamental at the top left.• Also observe as we add more terms to the

Fourier series, the waveform more closely approximates the true van on slide 12.

Page 16: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

α-β components of line-to-neutral voltages

16

3

33

6

32

6

3363

3

2

3/2

3/

3/

2

3

2

30

2

1

2

11

3

2

2

3

2

30

2

1

2

11

3

2

bus

bus

busbus

busbusbus

bus

bus

bus

cn

bn

an

V

V

VV

VVV

V

V

V

v

v

v

v

v

Recalling the values of the line-to-neutral voltages from slide 10:

We can express the three-phase voltages in terms of α-β components. For example, consider the three-phase voltage corresponding to the 001 state in the table above:

Continuing in like manner for all of the eight switching states, we get….

Page 17: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

α-β components of line-to-neutral voltages

17

Observe we have named each switching state under the column labeled “Vector” as V0, V1, V2,….

We represent these vectors, together with the α-β reference frame, on the “space-vector diagram” below.

Substitute into the space-vector expression

)()()( tjvtvtv

cn

bn

an

v

v

v

v

v

2

3

2

30

2

1

2

11

3

2

Recall the α-β transform:

We label V1-V6 “active” vectors & V0, V7 vectors “zero” vectors. Note the sector labels.

Sector I

Sector II

Sector III

Sector IV

Sector V

Sector VI

Page 18: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Space vector representation of line-to-neutral voltages

18

cnbn

cnbnan

cn

bn

an

vv

vvv

v

v

v

v

v

2

3

2

32

1

2

1

3

2

2

3

2

30

2

1

2

11

3

2

)()()( tjvtvtv

3/23/20

3

2

2

3

2

1

2

3

2

1

3

2

2

3

2

3

2

1

2

1

3

2)(

jcn

jbn

jancnbnan

cnbncnbnan

evevevjvjvv

vvjvvvtv

Consider the switching state 100. From the table on slide 16, we see that for this state:

DCcnDCbnDCan VtvVtvVtv3

1)(,

3

1)(,

3

2)(

Substitution of the above expressions into the space vector expression yields:

13

2

6

3

6

31

3

2

6

3

6

1

6

3

6

1

3

2

3

2

2

3

2

1

3

1

2

3

2

1

3

1

3

2

3

2

2

3

2

1

2

3

2

1

3

2)(

VVjjVjjV

jVjVV

jvjvvtv

DCDCDC

DCDCDC

cnbnan

Page 19: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Space vector representation of line-to-neutral voltages

19

If we follow the same procedure for all six, it is possible to show that the general expression for the kth space vector is:

6,...,2,1,3

2 3)1(

keVVkj

DCk

These active vectors and the zero vectors do not move in space and are therefore called “stationary” vectors.

Let’s consider a rotating space vector, , which rotates counterclockwise at an angular velocity of ω=2πf, where f is the fundamental frequency of the inverter output voltage. Recall that the angular displacement between and the α-axis of the α-B reference frame is obtained from:

refv

refv

)0()()(0

t

dttt

We have an interesting thing that we can now do – we can generate a space vector, , of any magnitude or position (angle) using our switches.refv

But we will have to closely consider one switching attribute that we have not yet.

Dwell time.

Page 20: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

20

Given the reference vector is within a certain quadrant, then these three stationary vectors will be the two active vectors comprising the quadrant’s boundary, together with a zero vector.

Then the dwell time for each stationary vector is •the amount of time it is allowed to be “on,”•the amount of time it “dwells”•the duty cycle time (on-state or off-state time) of the chosen switches during the sampling period.

Define: sampling period TS is the time for which the reference vector has a particular magnitude and angle. We assume it is sufficiently small so that the reference vector can be considered constant over this time.

refvUnder this assumption, can be approximated, whatever its magnitude and position, by three stationary vectors.

To determine the dwell times necessary for each stationary vector to obtain the reference space vector, we need the following principle (next slide)….

Page 21: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

21

Volt-second balancing principle: The product of the reference voltage and sampling period TS equals the sum of the voltage multiplied by the time interval of the chosen stationary vectors.

refv

The balancing principle implies the following: to achieve a certain reference voltage ,we will turn one stationary vector on for some time Ta, another stationary vector on for some time Tb, and the third stationary vector (the zero vector) on for some time T0, such that

TS=Ta+Tb+T0, and the total volt-seconds associated with the desired reference vector, , must be the same as the total volt-seconds associated with the three stationary vectors during their respective dwell times, i.e.,

refv

SrefTv

0021 TVTVTVTv baSref

We provide an example on the next slide….

Page 22: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Sector I

Sector II

Sector III

Sector IV

Sector V

Sector VI

Dwell-time calculation

22

θ

vref

ω

For this example, the stationary vectors on either side of the reference vector are the 100 (V1) and the 110 (V2) vectors. From the table on slide 16, we know that

0;3

2;

3

2; 0

3/21 VeVVVVevv j

DCDCj

refref

Substitute the above into:

0021 TVTVTVTv baSref

Page 23: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

23

3/

3

2

3

2 jbDCaDCS

jref eTVTVTev

Now split into real (α-axis) and imaginary (β-axis) as follows:

bDCbDCaDC

bDCaDC

bDCaDCSref

TVjTVTV

jTVTV

jTVTVjTv

3

3

3

1

3

2

)2

3

2

1(

3

2

3

2

)3

sin3

(cos3

2

3

2)sin(cos

bDCbDCaDCSref TVjTVTVjTv3

3

3

1

3

2)sin(cos

bDCSref

bDCaDCSref

TVjTv

TVTVTv

3

3sin

3

1

3

2cos

Page 24: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

24

Recall our timing constraint:

0TTTT baS

bDCSref

bDCaDCSref

TVjTv

TVTVTv

3

3sin

3

1

3

2cos

And the two equations we just derived:

These are three equations with three unknowns (Ta, Tb, T0), and we may solve them. Skipping the algebra, we obtain:

baS

DC

Srefb

DC

Srefa

TTTT

V

TvT

V

TvT

0

sin3

3sin

3

30for

Page 25: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

25

The below figure provides intuition in regards to the relation between the dwell-time calculation and the reference vector.

Only Sector I is shown, since this is the sector where our reference vector resides.

The contributions of V1, V2, and V0 to the reference vector are proportional to the ratio of their respective dwell times to the sample time. This is consistent with the balancing principle.

In the below, what can you say about Ta, Tb, and/or T0.

• If vref lies exactly in the middle between V1 and V2 (θ=π/6), then... Ta=Tb.

• If vref is closer to V2, then… Tb>Ta.

• If vref is coincident with V2, then…

Ta=0.• If the head of vref is right on Q, then…

Ta=Tb=T0. Summary:

Page 26: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Dwell-time calculation

26

Recall our expressions from slide 24 to compute dwell times.

baS

DC

Srefb

DC

Srefa

TTTT

V

TvT

V

TvT

0

sin3

3sin

3

These equations were only applicable for Sector I, thereforewe had to qualify them with:

30for

However, we can use these equations for other sectors as well as follows:

Subtract off an appropriate multiple of π/3 from the actual angular displacement θ such that the modified angle θ’ falls into the range between 0 and π/3.

30for

3)1(

k

where k=1,2,…,6 for sectors I, II, …, VI, respectively.

The calculated dwell times will be for the stationary vectors on either side of the sector.

Page 27: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

27

Given that we have selected the space vectors and their corresponding dwell times, then we must arrange the switching sequence. The switching sequence should satisfy the following requirements to minimize device switching frequency and corresponding switching losses:1.Transitions from one switching state to the next should involve only two switches in the same inverter leg, one being switched on and the other being switched off.2.The transition for vref moving from one sector in the space vector diagram to the next requires a minimum number of switchings.

Page 28: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

28

• This figure is for only one position of the space vector within one sector (sector 1). SVM will have N positions per sector, with 6 sectors, and so 6N different switching sequences are needed to move the space vector through 360°.

vref

000 100 110 111 110 100 000

Sag, va0

Sbg, vb0

Scg, vc0

We are plotting the switch status (0,1) or the voltage va0.

Page 29: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

29

• Only the vectors bounding the sector and the zero vectors are used.• Moving from one vector to an adjacent vector only involves toggling one bit,

implying that only two switching operations (for a single leg, the top switch and the bottom switch).

000 100 110 111 110 100 000

Sag, va0

Sbg, vb0

Scg, vc0

Page 30: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

30

• Each of the switches in the inverter turns on and off once per sampling period, so that the switching frequency of the devices is thus equal to the sampling frequency.

000 100 110 111 110 100 000

Sag, va0

Sbg, vb0

Scg, vc0

Page 31: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

31

• The total time adds to Ts.

000 100 110 111 110 100 000

Sag, va0

Sbg, vb0

Scg, vc0

Page 32: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Switching sequence

32

• It starts and ends with the zero vector V0, each for time T0/4.• The other T0/2 time for the zero vector is during the middle interval, but V7 is

used, because if we were to use V0 during the middle interval, we would have to switch more than 2 switches.

000 100 110 111 110 100 000

Sag, va0

Sbg, vb0

Scg, vc0

Page 33: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Computing space vector from switching sequence

33

Recall from slide 7 that from our switch statuses, we may evaluate van, vbn, and vcn.

bgagcgbus

cn

cgagbgbus

bn

cgbgagbus

an

SSSV

v

SSSV

v

SSSV

v

23

23

23

Then from knowledge of van, vbn, and vcn, we can compute the space vector vector:.

2

3

2

1

2

3

2

1

3

2)( jvjvvtv cnbnan

Page 34: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Computing space vector from switching sequence

34

Alternatively, you evaluate van, vbn, and vcn from the switch statuses, as on the previous slide, and then compute the α-β components according to:.

cn

bn

an

v

v

v

v

v

2

3

2

30

2

1

2

11

3

2

)()()( tjvtvtv Then from knowledge of vα, vβ, we can compute the space vector according to:.

Page 35: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

Computing space vector from switching sequence

35

0;3

2;

3

20

3/21 VeVVVV j

DCDC

Finally, we can compute the space vectors from dwell times and appropriate vectors. For example, in sector I, we have.

SS

b

S

a

T

TV

T

TV

T

TVtv 0

021)(

where

For the final exam, you should be able to1.For a specified space vector (magnitude and angle), identify dwell times and then the switching sequence necessary to achieve it.2.For a specified switching sequence, identify the associated space vector.

Page 36: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

A larger view

36

30for

3)1( )59.4(

k

DC

refa V

vm

3 )61.4(

baS

SaSDC

Srefb

SaDC

Srefa

TTTT

TmTV

TvT

TmV

TvT

0

sinsin3

3sin

3sin

3

)60.4(

See next slide for Table 4-4

Page 37: J. McCalley Voltage source converter. Basic topology 2 Below is the basic topology of the basic back-to-back two-level voltage source converter (VSC)

A larger view

37