jp# jun-2014...04-november-2016 jun-2014 r.getz module (daughter bd) initial release 27jul17...

04-NOVEMBER-2016

R.GETZJUN-2014

MODULE (DAUGHTER BD)

INITIAL RELEASE

C.ELKHOURY27JUL17

C.ELKHOURY13JAN16

C.ELKHOURY

F

C.ELKHOURY

27SEP16

C.ELKHOURY

D

C

ENGINEERING CHANGESB 25JUN15

23OCT15

AS PER ECR-069082

E

A

AS PER ECR-056930

AS PER ECR-057339

AS PER ECR-064782

1 10

<User Define><User Define><User Define>

: Pitch-pitch StyleVendor StylePACKAGE : PinCount-lead N/A Package-family

<PRODUCT_1>Product(s): Zynq / AD9361HW TYPE : MODULE

no_template

FCodeID1:1

02_038702TBD

-

-

-

S.LEE/

-

C.ELKHOURY

-

-

-

-

REV

2REVISIONS

1

OWNED OR CONTROLLED BY ANALOG DEVICES.THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTSPURPOSE DETRIMENTAL TO THE INTERESTS OF ANALOG DEVICES. JP#USED IN FURNISHING INFORMATION TO OTHERS, OR FOR ANY OTHER

8

CONNECTORFUNCTIONCODE DEVICE

2

2

6JUMPER TABLE

4

7

5

A

3

DATE APPROVED

D

B

DESCRIPTION

34

OFFON

5

57

OEM PART# HANDLER

6

C

B

8

SOCKET OEMBK/BD SPEC.P.O SPEC.

A

1

RELAY CONTROL CHART

3 14

C

NOT TO BE REPRODUCED OR COPIED, IN WHOLE OR IN PART, ORTHIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC. IT IS

CHECKER

DESIGNER

PTD ENGINEER

TEST ENGINEER

DECIMALS

X.XXX +-0.005X.XX +-0.010

MASTER PROJECT TEMPLATE

TOLERANCES

+-1/32FRACTIONS

+-2SIZE

DDDD

SCHEMATIC

DRAWING NO.

SCALE CODE ID NO.

SHEET OF

REV.

DA A

ENV C

L GSE

ODATE

ANGLES

UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE IN INCHES

TESTER TEMPLATE

TEMPLATE ENGINEER

HARDWARE SERVICES

HARDWARE SYSTEMS

COMPONENT ENGINEER

TEST PROCESS

HARDWARE RELEASE

* SEE ASSEMBLY INSTRUCTIONS

CONTROL

D

PHY1

BANK_501

REVERSE CURRENT PROTECTION


12/17 LPR-031889_24MHZ

2 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

10K

10K

DNI10K

10K10K

DNI10K

4.7UF10UF 1UF

100OHM

L0805

41

L0805

100OHM

100OHM

L0805

24MEGHZ

4.99K

CDSOT23-SR208

BSS138TA

0.1UF

0.1UF0.1UF

0.1UF

0.1UF

BSS138LT1G

XC7Z035-L2FBG676I

0

0.1UF

BSS138TA

27PF

31

4.7UF

1K

3

4.7UF4.7UF0.1UF

1K

88E1512-56QFN

1UF

0.1UF

0.1UF

0.1UF

51

1UF

1K

245242

1UF

BSS138TA

220

220USB3320C-EZK

1K

1UF 1UF 1UF

0.1UF 0.1UF4.7UF0.1UF0.1UF

43

0.1UF 0.1UF

BSS138TA

39

8.06K

0.1UF

1K

1K

4.99K

27PF

25MEGHZ

C218

C168

C119 C166

Y2

R176

Y3

R37

R26

R8R7 Q5

R13

Q1

R15

R17

R14

Q2

R16Q4

R18

Q3

R12

R11

R50 C59

C60

C242

U10

C224 C225 C226

C217 C214

C201 C211 C203

C50

C49

C210 C219

C208

E14

C75 C73 C63

C212 C206 C74

C58

C78

E15

E16

R27

R175

R178

U16

U15

C184 C181 C182 C183

U1

R191

R194

VCC-3P3V

VCC-3P3V-IO

VCCPCOM-1P8V

PS_MIO17_501_ETH0_TX_D0

PS_MIO18_501_ETH0_TX_D1PHY1_AVDD_1V8

PS_MIO16_501_ETH0_TX_CLK

PS_MIO21_501_ETH0_TX_CTL

PHY1_AVDD_1V8PHY1_1V8

PHY1_AVDD_1V8_OUT

PS_MIO08_500_ETH0_RESETN

PHY1_AVDD_3V3

PS_MIO07_500_USB_RESET_BPS_MIO30_501_USB0_STP

VCCPCOM-1P8V

VCCPCOM-1P8V

PS_MIO21_501_ETH0_TX_CTL

PS_MIO48_501_JX4PS_MIO49_501_JX4

PS_MIO34_501_USB0_D2

PS_MIO36_501_USB0_CLKPS_MIO37_501_USB0_D5

PS_MIO39_501_USB0_D7PS_MIO40_501_SD0_CLKPS_MIO41_501_SD0_CMDPS_MIO42_501_SD0_DATA0

PS_MIO44_501_SD0_DATA2


PS_MIO50_501_SD0_CDPS_MIO51_501_JX4

PHY1_DVDD_1V0

PS_MIO27_501_ETH0_RX_CTL

PS_MIO22_501_ETH0_RX_CLK

PS_MIO23_501_ETH0_RX_D0



ETH_MD2_N

PHY1_VDD_3V3

PHY1_VDD_3V3


USB_OTG_N

VCC-3P3V-IO

PS_MIO09_500_USB_CLK_PD

PHY1_VDD_3V3

USB_VBUS_OTGPS_MIO53_501_ETH0_MDIOPS_MIO52_501_ETH0_MDC

PHY1_1V8

PHY1_AVDD_1V8

PHY1_LED_0





CARRIER_RESET

PS_MIO16_501_ETH0_TX_CLKPS_MIO17_501_ETH0_TX_D0PS_MIO18_501_ETH0_TX_D1PS_MIO19_501_ETH0_TX_D2PS_MIO20_501_ETH0_TX_D3

PHY1_1V8

PHY1_DVDD_1V0

VCCPCOM-1P8V

1.8V

USB_OTG_P

PHY1_AVDD_1V8_OUT

VCCPCOM-1P8V



VCC-3P3V-IO

USB_ID

PHY1_1V8


ETH_MD1_P

ETH_MD1_N

ETH_MD2_P

ETH_MD3_P

ETH_MD3_N

ETH_MD4_P

ETH_MD4_N

ETH_PHY_LED0

USB_OTG_PUSB_OTG_N

PS-SRST#

PS_MIO32_501_USB0_D0PS_MIO33_501_USB0_D1

3.3V

PS_MIO27_501_ETH0_RX_CTLPS_MIO28_501_USB0_D4PS_MIO29_501_USB0_DIRPS_MIO30_501_USB0_STPPS_MIO31_501_USB0_NXT

PHY1_VDD_3V3

PS_MIO31_501_USB0_NXTPS_MIO29_501_USB0_DIRPS_MIO36_501_USB0_CLK


PS_MIO37_501_USB0_D5PS_MIO28_501_USB0_D4PS_MIO35_501_USB0_D3


USB_OTG_CPEN

ETH_PHY_LED1

PS-SRST#

VCCPCOM-1P8V

PS_MIO24_501_ETH0_RX_D1PS_MIO25_501_ETH0_RX_D2


VCCPCOM-1P8VPS_MIO23_501_ETH0_RX_D0PS_MIO22_501_ETH0_RX_CLK

PHY1_VDD_3V3

PHY1_AVDD_3V3

PHY1_LED_1

PHY1_AVDD_3V3

PHY1_LED_0

PHY1_LED_1

S_IN_P

PHY1_AVDD_1V8S_IN_N

PS_MIO53_501_ETH0_MDIOPS_MIO52_501_ETH0_MDC

PHY1_DVDD_1V0S_OUT_NS_OUT_P

31

42

4

1 3

2

2

1

3

2

1

3

2

1

32

1

3

2

1

3

3334

10

52 49

11

55 54 51 5056 53

29

45

12

48 47 45 44 4346

30

16

41

3736

PAD

18 22 24 28

8

17 21 23 27

7

121314

3231

40

42

6

15

935

2520

3938

2619

3

21

21

21

52

6

43

1

25

3220 3028

2221

29

1615

27

1411

826

24

2

12

23

PAD

1819

31

1310976543

17

1

K18

G18

F21

D17

C20

A22H18 A19

A20B20B22A18B21B19E17C18E18D18F17C19C22C21D21D20K16D19J16E22

K17E21K19E20J18F18H17F19J19F20G22F22H19G19G20G17G21

PINSPARE

GND

PINSPARE

PINSPARE

PINSPARE

GND GND GND

PAD

TX_C

TRL

TXD(

3)TX

D(2)

TX_C

LKVD

DOTX

D(1)

TXD(

0)VD

DORX

D(3)

RXD(

2)RX

_CLK

RXD(

1)RX

D(0)

RX_C

TRL

DVDDREGCAP2

DVDD_OUTAVDD18_OUT

AVDD18REGCAP1

REG_INAVDDC18XTAL_IN

XTAL_OUTHSDACPHSDACN

RSETTSTPT

MDI

P(0)

MDI

N(0)

AVDD

18AV

DD33

MDI

P(1)

MDI

N(1)

MDI

P(2)

MDI

N(2)

AVDD

33AV

DD18

MDI

P(3)

MDI

N(3)

RESE

TNCO

NFIG

LED(0)LED(1)LED(2)/INTNVDDOVDDO_SELCLK125MDIOMDCDVDDS_OUTNS_OUTPAVDD18S_INNS_INP

GND

GND

GND

GND

GND

PINSPARE

PINSPARE

GND_FLAG

VDDI

O

DIR

VDD1

8

STP

VDD1

8

RESETB

REFCLK

XO

RBIAS

IDVBUSVBAT

VDD3

3

DMDP

CPEN

SPK_RSPK_L

REFSEL2

DATA7

N/C

REFSEL1

DATA6DATA5

REFSEL0

DATA4DATA3DATA2DATA1DATA0

NXT

CLKOUT

PINSPARE

PINSPARE

PINSPARE

PINSPARE

VCCO

_MIO

1_50

1VC

CO_M

IO1_

501

VCCO

_MIO

1_50

1VC

CO_M

IO1_

501

VCCO

_MIO

1_50

1

PS_MIO_VREF_501PS_SRST_B_501PS_MIO16_501PS_MIO17_501PS_MIO18_501PS_MIO19_501PS_MIO20_501PS_MIO21_501PS_MIO22_501PS_MIO23_501PS_MIO24_501PS_MIO25_501PS_MIO26_501PS_MIO27_501PS_MIO28_501PS_MIO29_501PS_MIO30_501PS_MIO31_501PS_MIO32_501PS_MIO33_501 PS_MIO34_501

PS_MIO35_501PS_MIO36_501PS_MIO37_501PS_MIO38_501PS_MIO39_501PS_MIO40_501PS_MIO41_501PS_MIO42_501PS_MIO43_501PS_MIO44_501PS_MIO45_501PS_MIO46_501PS_MIO47_501PS_MIO48_501PS_MIO49_501PS_MIO50_501PS_MIO51_501PS_MIO52_501PS_MIO53_501

GND

GNDGND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

VDDSTANDBY

GNDOUTPUT

GND

G

S

D

GND

G

S

D

GND

GND

G

S

D

G

S

D

GND

PINSPARE

D

THIS DRAWING IS THE PROPERTY OF ANALOG DEVICES INC.

IN PART, OR USED IN FURNISHING INFORMATION TO OTHERS,

OR FOR ANY OTHER PURPOSE DETRIMENTAL TO THE INTERESTS

THE EQUIPMENT SHOWN HEREON MAY BE PROTECTED BY PATENTS

AC

IT IS NOT TO BE REPRODUCED OR COPIED, IN WHOLE ORDRAWING NO.

2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE

OWNED OR CONTROLLED BY OWNED ANALOG DEVICES.

EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

BANK_500

QSPI FLASH

BOOT MODE

CASCADED JTAG

NAND (NA)

QSPI

SD CARD

0

0

1

S4(MIO5)

1

0

1

0

1

S3(MIO4)

DAT2

QSPI & MICROSD

MIO


DAT1DAT0VSSCLKVDDCMDCD/DAT3

3 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

4.7K4.7K

220PF

220PF

XC7Z035-L2FBG676I

0.1UF

FDMA430NZ FDMA430NZ

FDMA430NZ

220PF

0.1UF

20K

10KDNI

10K

10K

10K

10K

10K

10K 10K

10KDNI 10K

DNI

DM3CS-SF

4.99K

SI1050X-T1-GE3

N25Q256A11E1240

4.99K

220PF

20K

SI1050X-T1-GE3 SI1050X-T1-GE3

CAS-120TB

0.1UF

0.1UF

20K

0.1UF

4.99K0.1UF

4.99K

4.99K

R0603

0.1UF

39

10UF

20K20K20K20K

CAS-120TB

CAS-120TB

240

20K

0.1UF

4.02K

7914J-1-000E

4.02K

4.02K

ADM1166ACPZSI1050X-T1-GE3

10UF

BAT54C

4.02K

4.02K

33.333MEGHZ

20KTXS02612RTWR

10UF

0

0

Q11 Q9

Q13

C187

R77

R76

R60

Y1

D1

R35

R74

R73

R72

R71

R70

R69

U13

R34

R28

R19

R31R32

R52R51

Q12

C215

C213

C209

C207

R41

R38 R40

R30 R39

Q8Q7

Q10

R36

J3

R45

R44

R42

C202

C205C204

U7

R4 C42

U1

S4

S3

S1

R120 R119

C40

C55

C41

U11

R122R121

R116

R109 C57

C54

SW1

R3

C39

R114

FB_0V95

FB_1V35

FB_1V0

FB_1V8

PS_MIO08_500_ETH0_RESETN

PWR_GD_1.35V

PS_MIO13_500_JX4

PS_MIO11_500_JX4

PS_MIO07_500_USB_RESET_B

PS_MIO09_500_USB_CLK_PDPS_MIO10_500_JX4

VCCPCOM-1P8V

VCCO_12_13_EN VCCO_12_13_EN

JX_VCCO_12

VIN_EN

JX_VIN

VCCO_1P8V_EN

JX_VCCO_13

JX_VCCO_12

SDIO_DAT1B0SDIO_DAT0B0

VCC-3P3V-IO

SDIO_CLKB0

SDIO_CMDB0SDIO_DAT3B0SDIO_DAT2B0

VCCPCOM-1P8V

PS_MIO41_501_SD0_CMD

J3-9

VCC-3P3V-IO

JX_VCCO_33_34

MGTAVCC_ENMGTAVTT_EN3.3V_EN

PS_MIO15_500_JX4

VCCPCOM-1P8V

VH

VBUS

JX_VCCO_12_SEQJX_VCCO_13_SEQ

JX_VCCO_33_34_SEQ

JX_MGTAVCC

1.35V

PS_MIO05_500_QSPI0_IO3

PS_MIO03_500_QSPI0_IO1PS_MIO04_500_QSPI0_IO2


PS_MIO14_500_JX4

PS_MIO40_501_SD0_CLK

MGTAVTTMGTAVTT_EN MGTAVCCMGTAVCC_EN

JX_MGTAVTT




1.8V



SDIO_DAT3B1

VCCPCOM-1P8V

VCC-3P3V-IO

REF_IN_OUT

JX_MGTAVCCJX_MGTAVTT

REF_IN_OUT

VCC-3P3V-IO

SDIO_DAT0B0

VCC-3P3V-IO

1.0V0.95V

SDIO_DAT0B1

SDIO_DAT2B0

SDIO_CLKB1SDIO_CLKB0

VDDCAP

3.3V_SEQ

PWR_GD

VCCO_12_13_EN

VCCPCOM-1P8V

PS_MIO01_500_QSPI0_SS_B

JX_VCCO_33_34_SEQ

SDIO_CMDB0

SD_SEL

VCCPCOM-1P8V

VCCPCOM-1P8V

JX_VCCO_33_34

JX_VCCO_13_SEQ

3V3_I2C

3V3_I2C

PS_1.35V_ENPG_MODULE

VCCO_1P8V_EN1.8V_EN

PS_MIO06_500_QSPI0_SCLK

PS_MIO01_500_QSPI0_SS_B


VCCO_33_34_EN

VCCPCOM-1P8V

VCCO_1P8VVCCO_33_34

VCCO_33_34_EN

VIN_EN

VCCO_12

VCCPCOM-1P8V

JX_VCCO_13

VCCO_13

VDDCAP

3V3_I2C

SDA_ADM1166SCL_ADM1166

PS_MIO00_500_JX4

PS_MIO02_500_QSPI0_IO0PS_MIO03_500_QSPI0_IO1

PS_MIO05_500_QSPI0_IO3PS_MIO06_500_QSPI0_SCLK

3.3V_SEQ

JX_VIN

3.3V


SDIO_CMDB1

VCCPCOM-1P8V

JX_VCCO_12_SEQ

VIN

PS-SRST#

PS_MIO12_500_JX4

PAD24

3

PAD1

6521

PAD24

3

PAD1

6521PA

D24

3

PAD1

6521

4

1 3

2

32

1

C4

B3

B4

C2A4

E5E4E3E2E1D5D1C5C3C1B5B1A5A3A2

D4

D2D3B2

43

6

52

1

43

6

52

1

43

6

52

1

43

6

52

1

987654321

GND4GND3GND2GND1

54321

9876

10

3932

3635

14

13

12 31

21222324252627282930

40PA

D

201918

171615

3738

11

3433

E24

B23

A26

C23 C24D23B25A23B26A25D24A24E23F23

C26F24D25E25D26E26B24

13 2

13 2

13 2

17215

24

PAD112

1022

3 8231 1516714186

12204

13199

2B2A

1B1A

VCCO

_MIO

0_50

0VC

CO_M

IO0_

500

VCCO

_MIO

0_50

0

PS_MIO15_500PS_MIO14_500PS_MIO13_500PS_MIO12_500PS_MIO11_500PS_MIO10_500

PS_MIO9_500PS_MIO8_500PS_MIO7_500PS_MIO6_500

PS_MIO5_500PS_MIO4_500PS_MIO3_500PS_MIO2_500PS_MIO1_500PS_MIO0_500PS_CLK_500PS_POR_B_500

VCCB1VCCB0VCCA

CLKB1CLKB0

CMDB1CMDB0

DAT3B1DAT3B0DAT2B1DAT2B0DAT1B1DAT1B0DAT0B1DAT0B0

PADGNDGNDSEL

CLKA

CMDA

DAT3A

DAT2A

DAT1A

DAT0A

S

G

D

S

G

D

S

G

D

GND

GND

VDDSTANDBY

GNDOUTPUT

GND

NCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

RESET/NC

CDQ0

VSS

W#/VPP/DQ2DQ1

S#

VCC

HOLD#/DQ3

GND

GND

GND

GNDGND

GND GND

GND

GND

GNDGND

GND

GNDGND

GND

GNDGND

GND

GNDGND

GND

GND

GND

GND

GND

PINSGND

VDDC

AP

VCCP

REFOUT

DAC6DAC5DAC4DAC3DAC2DAC1

PDO10PDO9PDO8PDO7PDO6PDO5PDO4PDO3PDO2PDO1

EPAD

GND

PDO

GND

REFG

NDAG

ND

SDASCLA1A0

REFIN

AUX1AUX2

VHVP4VP3VP2VP1VX5VX4VX3VX2VX1

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE


4 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

61082-101400LF

1K

61082-101400LF

61082-101400LF61082-101400LF61082-101400LF

61082-101400LF61082-101400LF

61082-101400LF

10K10K

3PIN_SOLDER_JUMPER

3PIN_SOLDER_JUMPER3PIN_SOLDER_JUMPER

3PIN_SOLDER_JUMPER

JP2

JP1

JP4

JP3

R43

R53

R56

JX4 JX4

JX4 JX4

JX3 JX3

JX3 JX3

JX2 JX2

JX2 JX2

JX1 JX1

JX1JX1

ETH_MD1_PETH_MD1_N

SDIO_DAT1B1SDIO_CMDB1

JX_MGTAVTT

ETH_PHY_LED1

USB_OTG_CPENUSB_VBUS_OTG

IO_L06_12_JX3_PIO_L06_12_JX3_N



IO_L12_MRCC_12_JX3_PIO_L12_MRCC_12_JX3_N

IO_L14_SRCC_12_JX3_PIO_L14_SRCC_12_JX3_N


IO_L01_12_JX3_P

MGTXTX2_112_JX3_NMGTXTX2_112_JX3_P


MGTREFCLK1_112_JX3_NMGTREFCLK1_112_JX3_PV_0_P

V_0_N

MGTXTX1_112_JX3_PMGTXTX1_112_JX3_N

MGTXTX3_112_JX3_PMGTXTX3_112_JX3_N

IO_L02_12_JX3_P

IO_L04_12_JX3_P

IO_L08_13_JX2_P

IO_L12_MRCC_13_JX2_N

MGTXRX2_112_JX1_NMGTXRX2_112_JX1_P

MGTXRX0_112_JX1_N

MGTXRX0_112_JX1_P



MGTREFCLK0_112_JX1_NMGTREFCLK0_112_JX1_P

JX_VCCO_12IO_L12_MRCC_33_JX1_PIO_L12_MRCC_33_JX1_N

IO_L10_33_JX1_P

IO_L08_33_JX1_NIO_L08_33_JX1_P

IO_L06_33_JX1_N

IO_L02_33_JX1_N

IO_L22_33_JX1_P

IO_L20_33_JX1_P

IO_L18_33_JX1_N

IO_L16_33_JX1_N

IO_00_33_JX1FPGA_VBATT

IO_L17_33_JX1_N

IO_L19_33_JX1_P



IO_00_13_JX2

IO_L23_12_JX2_N


IO_L01_13_JX2_PIO_L01_13_JX2_NIO_L03_13_JX2_PIO_L03_13_JX2_NINIT_B_0_JX2_09

FPGA_DONEPWR_ENABLE

IO_L13_MRCC_13_JX2_P

IO_L11_SRCC_13_JX2_P


IO_L19_33_JX1_N

IO_L02_13_JX2_PJTAG_TCKJTAG_TDO

IO_L16_33_JX1_P

IO_L18_33_JX1_P

IO_L20_33_JX1_N

IO_L22_33_JX1_N


IO_L02_33_JX1_P


PS_MIO15_500_JX4 PS_MIO12_500_JX4

PS_MIO13_500_JX4

SDASCL


AUXDAC2

IO_L06_13_JX2_N

PG_MODULE


IO_L24_13_JX2_P

PG_1P8V


IO_L15_12_JX3_P

IO_L13_MRCC_12_JX3_NIO_L13_MRCC_12_JX3_P

IO_L11_SRCC_12_JX3_NIO_L11_SRCC_12_JX3_P



SDIO_CLKB1JX3_SD1_CDNSDIO_DAT2B1SDIO_DAT0B1

IO_25_13_JX2

IO_L06_13_JX2_P

IO_L08_13_JX2_N

IO_L19_13_JX2_P

IO_L15_13_JX2_N


IO_L07_13_JX2_P

IO_L09_33_JX1_N

JTAG_TMSJTAG_TDICARRIER_RESET

IO_25_33_JX1

IO_L03_33_JX1_N

JX_MGTAVCC


IO_L01_34_JX4_P



IO_25_34_JX4


IO_L14_SRCC_34_JX4_NIO_L14_SRCC_34_JX4_P


IO_25_12_JX4IO_00_12_JX4



IO_L07_13_JX2_N

IO_L04_13_JX2_N


IO_L09_33_JX1_P


IO_L14_SRCC_33_JX1_N


JX_VCCO_33_34

IO_L08_34_JX4_N



IO_L03_34_JX4_N

IO_L03_34_JX4_P

AUXDAC1

GPO3GPO1GPO0

GPO2

AUXADC

DX_0_PDX_0_N

JX_VCCO_12

VDDA_GPO_PWR


IO_L08_34_JX4_P

IO_L10_34_JX4_PIO_L10_34_JX4_NIO_L12_MRCC_34_JX4_P

PS_MIO51_501_JX4

PS_MIO47_501_JX4


ETH_PHY_LED0

PS_MIO46_501_JX4

PS_MIO11_500_JX4

IO_L22_34_JX4_N

IO_L22_34_JX4_P

PS_MIO00_500_JX4

PS_MIO14_500_JX4

PS_MIO10_500_JX4


IO_L17_13_JX2_N

IO_L10_13_JX2_P

IO_L06_33_JX1_P

IO_L15_33_JX1_N

IO_L15_33_JX1_P

JX_VIN JX_VIN

JX_VIN

JX_VIN

IO_L17_33_JX1_P

IO_L15_13_JX2_P


IO_L03_33_JX1_P



IO_L19_13_JX2_N

JX_VCCO_13IO_L22_12_JX2_NIO_L22_12_JX2_P



JX_VCCO_33_34

IO_L24_13_JX2_N



IO_L15_12_JX3_NIO_L23_12_JX2_PIO_L21_12_JX2_NIO_L21_12_JX2_P



JX_VCCO_13

IO_L01_34_JX4_N


AD9361_CLK


IO_L19_34_JX4_P

IO_L21_34_JX4_NIO_L21_34_JX4_PIO_L19_34_JX4_NIO_L10_33_JX1_N IO_L11_SRCC_33_JX1_N

IO_L17_13_JX2_P

IO_L10_13_JX2_N

IO_L02_12_JX3_N IO_L03_12_JX3_NIO_L03_12_JX3_P

IO_L01_12_JX3_N

VINVIN

ETH_MD2_P

USB_OTG_NUSB_OTG_P

ETH_MD4_P


ETH_MD3_P

S_IN_N




IO_L18_13_JX2_N

JX_VIN

IO_L18_13_JX2_P

ETH_MD3_N USB_ID

S_IN_P

ETH_MD4_N


SDIO_DAT3B1 IO_L07_34_JX4_N




JX_VCCO_13

IO_L05_12_JX3_P

ETH_MD2_NS_OUT_P

S_OUT_N

IO_L05_12_JX3_N

23

1

23

1

23

1

23

1

99979593918987858381797775737169676563615957555351

100989694929088868482807876747270686664626058565452

494745434139373533312927252321191715131197531

5048464442403836343230282624222018161412108642

99979593918987858381797775737169676563615957555351

100989694929088868482807876747270686664626058565452

494745434139373533312927252321191715131197531

5048464442403836343230282624222018161412108642

99979593918987858381797775737169676563615957555351

100989694929088868482807876747270686664626058565452

494745434139373533312927252321191715131197531

5048464442403836343230282624222018161412108642

99979593918987858381797775737169676563615957555351

100989694929088868482807876747270686664626058565452

5048464442403836343230282624222018161412108642

494745434139373533312927252321191715131197531

GNDGNDGND

BCOM

A

BCOM

A

BCOMA

BCOMA

GND

GNDGNDGND GNDGND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

VTTREF

ON

PLACE NEAR DDR #2

VTT

ONHI

DDR3


S5S3

BANK_502

PLACE NEAR DDR3 #1

S0

STATE

HI

5 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

10K

10K

80.6

0.1UF 0.1UF 0.1UF

240

0

TPS51206DSQR

4.7UF 4.7UF

240

XC7Z035-L2FBG676I

0.015UF

0

240

240120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

120

10UF

10UF10UF

4.7UF4.7UF100UF 0.47UF0.47UF0.47UF

0.01UF

0.01UF0.22UF

0.47UF0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF

0.01UF0.01UF

0.01UF0.01UF

0.01UF

120

120

120

120

120

120

120 4.7UF

120

0.01UF

1K

MT41K256M16TW-107:P

MT41K256M16TW-107:P

U3

U2

R142

R133

C123

C122

C120

R135

R134

C91 C92 C94 C95 C96 C97 C109 C112 C115 C116 C117 C118

R222

R221

U1

C103

R166

C80

R161

U14

C89C88 C108C107C86C100 C87 C106

R165

C102

C84C81

C79

C82C83

R6

C43

R163

C101

R160R162

R156R159

R154R155

R152R153

R150R151

R148R149

R146R147

R144R145

R141R143

R139R140

R137R138

R136

C77C76

DDR3_CS#

DDR3_CK_P

DDR3_DQ8

DDR3_CK_N

DDR3_DQS2_P

VCC-1P35

DDR3_DM3

DDR3_DQ11DDR3_DQ10

VCC-3P3V

VCCPCOM-1P8VVCC-3P3V

DDR3_DQ30

DDR3_DQ28

VTTVREF

VTT_0P75

DDR3_A3

DDR3_DQ6

DDR3_A13

VCCO-DDR

DDR3_DQS3_PDDR3_DQS2_N

DDR3_DQS1_NDDR3_DQS1_PDDR3_DQS0_NDDR3_DQS0_PDDR3_DQ31DDR3_DQ29

DDR3_DQ27

DDR3_DQ26DDR3_DQ25DDR3_DQ24DDR3_DQ23DDR3_DQ22

DDR3_DQ18DDR3_DQ17DDR3_DQ16DDR3_DQ14DDR3_DQ15

DDR3_BA1

DDR3_A7

DDR3_A8

DDR3_A5

DDR3_A6

DDR3_A3

DDR3_WE#

DDR3_BA0

DDR3_BA1

DDR3_A13

DDR3_A4

DDR3_A1

DDR3_A2

DDR3_A0

DDR3_CKE

DDR3_ODT

DDR3_RAS#

DDR3_CAS#

DDR3_BA2

DDR3_A14

DDR3_A11

DDR3_A12

DDR3_A9

DDR3_A10

DDR3_DQS3_N

DDR3_DQ21DDR3_DQ20

DDR3_DM2

DDR3_DQ19

DDR3_RAS#DDR3_CAS#DDR3_WE#

DDR3_CKEDDR3_CS#

DDR3_ODT

DDR3_BA2DDR3_A0DDR3_A1DDR3_A2

DDR3_CK_NDDR3_CK_P

DDR3_A4

DDR3_A6DDR3_A5

DDR3_A8DDR3_A7

DDR3_A12DDR3_A11

DDR3_A14

DDR3_DQ12DDR3_DQ13

DDR3_DM1

DDR3_DQ9

DDR3_DQ7

DDR3_DQ4DDR3_DQ5

DDR3_DM0

DDR3_DQ2DDR3_DQ3

DDR3_DQ0DDR3_DQ1

DDR3_RST#

VTT_0P75

VCC-1P35

VCC-1P35

VCC-1P35

VCC-1P35

VTT_0P75

VTTVREF

VTTVREF

VTTVREF

VTTVREF

DDR3_A10DDR3_A9

DDR3_BA0

VCC-1P35

DDR3_DQ13

DDR3_DQ15

DDR3_DQ12

DDR3_DQS1_N

DDR3_DQ14

DDR3_DQ11

DDR3_DQ9

DDR3_DQS1_P

DDR3_DQ10

DDR3_DM1

DDR3_DQ8

DDR3_DQ0

DDR3_DM0

DDR3_DQ2

DDR3_DQS0_P

DDR3_DQ1

DDR3_DQ3

DDR3_DQ6

DDR3_DQS0_N

DDR3_DQ4

DDR3_DQ7

DDR3_DQ5

DDR3_RAS#

DDR3_CK_P

DDR3_ODT

DDR3_CAS#

DDR3_CK_N

DDR3_CKE

DDR3_CS#

DDR3_WE#

DDR3_A10

DDR3_BA0

DDR3_A12

DDR3_BA1

DDR3_A5DDR3_A4

DDR3_A7

DDR3_A9

DDR3_A11

DDR3_A6

DDR3_RST#

DDR3_A13DDR3_A14

DDR3_A8

DDR3_DQ29

DDR3_DQ31

DDR3_DQ28

DDR3_DQS3_N

DDR3_DQ30

DDR3_DQ27

DDR3_DQ25

DDR3_DQS3_P

DDR3_DQ26

DDR3_DM3

DDR3_DQ24

DDR3_DQ16

DDR3_DM2

DDR3_DQ18

DDR3_DQS2_P

DDR3_DQ17

DDR3_DQ19

DDR3_DQ22

DDR3_DQS2_N

DDR3_DQ20

DDR3_DQ23

DDR3_DQ21

DDR3_RAS#

DDR3_CK_P

DDR3_ODT

DDR3_CAS#

DDR3_CK_N

DDR3_CKE

DDR3_CS#

DDR3_WE#

DDR3_A10

DDR3_BA0

DDR3_BA2

DDR3_A3

DDR3_A0

DDR3_A12

DDR3_BA1

DDR3_A5

DDR3_A2DDR3_A1

DDR3_A4

DDR3_A7

DDR3_A9

DDR3_A11

DDR3_A6

DDR3_RST#

DDR3_A13DDR3_A14

DDR3_A8

DDR3_BA2DDR3_A0DDR3_A1DDR3_A2DDR3_A3

L8

L3

G9

G1F9E8E2D8D1B9B1 T9T1P9P1M9

M1J8J2G8E1B3A9

H1M8

H9H2F1E9D2C9C1A8A1 R9R1N9N1K8K2G7

D9B2

B7C7

D3

T2

J3

K1

M7L9L1J9J1

G3F3

E7

A3B8A2A7C2C8C3D7H7G2H8H3F8F2F7E3

L2

K9

K7J7

K3

M3N8M2

T7T3

N7

R7L7R3T8R2R8P2P8N2P3P7N3

L8

L3

G9

G1F9E8E2D8D1B9B1 T9T1P9P1M9

M1J8J2G8E1B3A9

H1M8

H9H2F1E9D2C9C1A8A1 R9R1N9N1K8K2G7

D9B2

B7C7

D3

T2

J3

K1

M7L9L1J9J1

G3F3

E7

A3B8A2A7C2C8C3D7H7G2H8H3F8F2F7E3

L2

K9

K7J7

K3

M3N8M2

T7T3

N7

R7L7R3T8R2R8P2P8N2P3P7N3

W22

V25

T21

R24

N20

M23

L26

J22

H25

V22

W21V21M21K21

V23

Y22H22

W24

P25

L24

H24

W25

R25

L25

G25

W23

Y26Y25

W26U25

U24U26V24R23T23T25T24P23N26P24R26

N23M24

N24M25

K23M26L23K26J23J24H23H26G26J25F25J26

V26P26K25G24

Y21

R21P21U21

Y23

R22T22U22

R20J20P20H21M22U20T20J21L20N22M20L22N21K20K22

5

6

3

2

1

10

97

4

PAD8

VSS

A8

A14A13

RESET#

VSS

VDD

A6

A11

A9

A7

VDD

VSS

A4

A1A2

A5

VSS

VDD

BA1

A12/BC#

A0

A3

VDD

VSS

VREF

CA

NC

BA2

BA0

VSS

NC

ZQ

A10/AP

WE#

CS#

NC

CKE

VDD

CK#

CAS#

VDD

ODT

NC VSS

CK

RAS#

VSS

NC

VDDQ

DQ5

DQ7

DQ4

VDDQ

VREF

DQ

VSSQ

VSS

VDD

LDQS#

DQ6

VSSQ

VSSQ

DQ3

DQ1

LDQS

DQ2

VDDQ

VDDQ

VSSQ

LDM

DQ0

VSSQ

VSS

VDD

VSSQ

DQ8

UDM

VDDQ

VSSQ

VDDQ

DQ10

UDQS

DQ9

DQ11

VDDQ

VSSQ

DQ14

UDQS#

VSS

VDD

VSSQ

VSS

VDDQ

DQ12

DQ15

DQ13

VDDQ

VSS

A8

A14A13

RESET#

VSS

VDD

A6

A11

A9

A7

VDD

VSS

A4

A1A2

A5

VSS

VDD

BA1

A12/BC#

A0

A3

VDD

VSS

VREF

CA

NC

BA2

BA0

VSS

NC

ZQ

A10/AP

WE#

CS#

NC

CKE

VDD

CK#

CAS#

VDD

ODT

NC VSS

CK

RAS#

VSS

NC

VDDQ

DQ5

DQ7

DQ4

VDDQ

VREF

DQ

VSSQ

VSS

VDD

LDQS#

DQ6

VSSQ

VSSQ

DQ3

DQ1

LDQS

DQ2

VDDQ

VDDQ

VSSQ

LDM

DQ0

VSSQ

VSS

VDD

VSSQ

DQ8

UDM

VDDQ

VSSQ

VDDQ

DQ10

UDQS

DQ9

DQ11

VDDQ

VSSQ

DQ14

UDQS#

VSS

VDD

VSSQ

VSS

VDDQ

DQ12

DQ15

DQ13

VDDQ

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GND

GND GND

GND

GNDGND

GND

GNDGNDGND

PS_DDR_VREF1_502PS_DDR_VREF0_502

VCCO

_DDR

_502

_9VC

CO_D

DR_5

02_8

VCCO

_DDR

_502

_7VC

CO_D

DR_5

02_6

VCCO

_DDR

_502

_5VC

CO_D

DR_5

02_4

VCCO

_DDR

_502

_3VC

CO_D

DR_5

02_2

VCCO

_DDR

_502

_1

PS_DDR_DQ31_502

PS_DDR_DQ30_502PS_DDR_DQ29_502

PS_DDR_DQ28_502

PS_DDR_DQS_N3_502PS_DDR_DQS_P3_502

PS_DDR_DM3_502

PS_DDR_DQ27_502

PS_DDR_DQ26_502PS_DDR_DQ25_502PS_DDR_DQ24_502PS_DDR_DQ23_502PS_DDR_DQ22_502PS_DDR_DQ21_502PS_DDR_DQ20_502

PS_DDR_DQS_N2_502PS_DDR_DQS_P2_502

PS_DDR_DM2_502

PS_DDR_DQ19_502PS_DDR_DQ18_502PS_DDR_DQ17_502PS_DDR_DQ16_502

PS_DDR_RAS_B_502PS_DDR_CAS_B_502PS_DDR_WE_B_502

PS_DDR_CKE_502PS_DDR_CS_B_502

PS_DDR_ODT_502

PS_DDR_BA0_502PS_DDR_BA1_502PS_DDR_BA2_502

PS_DDR_A0_502PS_DDR_A1_502PS_DDR_A2_502

PS_DDR_CKN_502PS_DDR_CKP_502

PS_DDR_VRN_502PS_DDR_VRP_502

PS_DDR_A4_502PS_DDR_A3_502






PS_DDR_DQ14_502PS_DDR_DQ15_502PS_DDR_DQ12_502PS_DDR_DQ13_502

PS_DDR_DQS_P1_502PS_DDR_DQS_N1_502

PS_DDR_DM1_502





PS_DDR_DQS_P0_502PS_DDR_DQS_N0_502

PS_DDR_DM0_502



PS_DDR_DRST_B_502

PIN

SP

AR

E

PIN

SP

AR

E

PIN

SP

AR

E

PIN

SP

AR

E

PIN

SP

AR

EP

INS

PA

RE

PIN

SP

AR

E

PIN

SP

AR

E

PIN

SP

AR

E

PIN

SP

AR

E

PAD

VDD

S5

GND

S3 VTTREF

VTTSNS

PGND

VTT

VLDO

IN

VDDQSNS

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

PLACE NEAR XC7Z035 (VCCO-DDR)

BANK_0

PLACE NEAR XC7Z035 (VCCPINT)

PLACE NEAR XC7Z035 (MGTAVTT)PLACE NEAR XC7Z035 (VCCINT-0P95V)

PLACE NEAR XC7Z035 (MGTACVV)

PLACE NEAR XC7Z035 (VCCO-33 BANK)


PLACE NEAR XC7Z035 (VCCPCOM-1P8V)

ZYNQ

GND/VCC

PLACE NEAR XC7Z035 (VCCO-12 BANK) PLACE NEAR XC7Z035 (VCCO-13 BANK)


XILINX


6 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

4.7K

4.7K 4.7K

680UF 680UF

600OHMS

LG L29K-G2J1-24-Z

220OHM

0.47UF 0.1UF

4.7UF100UF

0.1UF

4.7UF

0.1UF

0.47UF

47UF

0.1UF0.1UF0.1UF0.1UF

0.47UF

4.7UF

220OHM

0

4.7UF

0.47UF

0.1UF

0.1UF0.1UF0.1UF4.7UF 0.47UF 0.1UF 0.1UF 4.7UF 4.7UF 0.47UF 0.1UF 0.1UF 0.1UF 0.1UF0.1UF

100UF 4.7UF 4.7UF 0.47UF 0.47UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF

4.7UF 0.1UF

100UF 100UF 4.7UF

130

0.47UF 0.47UF0.47UF

0.47UF

0.47UF0.47UF 0.1UF0.1UF 0.1UF 0.1UF

XC7Z035-L2FBG676I

4.7UF 4.7UF 4.7UF 4.7UF4.7UF4.7UF

4.7UF

4.7UF 0.47UF 0.1UF

XC7Z035-L2FBG676I

0.1UF

0.1UF

0.47UF

4.7UF

4.7UF

0.1UF

4.7UF 0.47UF

0.1UF

0.47UF

4.7UF

0.1UF

0.1UF

0.1UF 0.1UF 0.1UF0.47UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF 0.1UF0.1UF

0.1UF4.7UF

100UF

D4

C44 C85

C251

C250C249C37

C221 C223 C228 C230 C232 C234 C236 C238 C240 C241

C64 C220 C222 C227 C229 C231 C233 C235 C237 C239

E12

C190C189

E1

C99 C110 C114 C145 C147 C154

C167 C170 C171 C185 C186C169C111 C146 C153 C157 C160C144C71 C98C93C90C72C70

U1

R169

R9

R168

R172

R167

C125 C132 C135 C136 C137

C140 C141 C142 C143 C148 C149 C150 C151 C152 C155 C156

C121C138 C139 C126 C127 C128 C129 C130 C131

C163C161

C172

C173 C159 C162 C164

C27C17

C179C177C176

C15 C18 C28 C31

C180 C175

C174 C178

L12

U1

VCC-3P3V-IO

INIT_B_0_JX2_09

VCC-3P3V-IO

VCC-3P3V-IO

VCC-3P3V-IO

DX_0_P

VCCO_1P8V

VCCPINT

VCCPCOM-1P8V

VCCO_1P8V

VCCPCOM-1P8V

JTAG_TDOJTAG_TDIJTAG_TMSJTAG_TCK

V_0_NV_0_P

VCCPCOM-1P8V

MGTAVTT

MGTAVCC

VCCPCOM-1P8V VCCPCOM-1P8V

VCCO_12 VCCO_13

FPGA_DONE

MGTAVCC

MGTAVTT

VCCINT-0P95V

VCCINT-0P95V

VCC-BRAM

VCCPCOM-1P8V

FPGA_VBATT

VCCPINT

VCC-3P3V-IO

VCCO_33_34

DX_0_N

VCCO_33_34

VCCO-DDR

A

C

NP

NP

21

P14N13

N14P13

V14

V12

V15

M14

W11W10V11

W12

U8 V8W8

V13

V9

R8

M13

R14R13

W9T7

21

M18

U17

T18

R17

P18

N17

L17

U19

R19

N19

L19

U15

U13

U11

T14

T12

R15

R11

P12

N15

N11

M12

L15

L13

L11

V16

T16

P16

M16

T10

P10

M10

V10

U9 T8 R9 P8 N9

V6Y2W4V2T2

AF6AF2AE4AD2AC4AB2

Y6U4T6R4

AE8AD6AC8AB6AA8AA4

Y9 Y8 Y7 Y5 Y24

Y14

Y1 W7

W3V7V5V20V17V1U7U3U23U18U16U14U12U10T9T5T26T19T17T15T13T11T1R7R3R18R16R12R10P9P7P6P5P4P3P22P2P19P17P15P11P1N5N25N18

N16

N12

N10

M9

M19

M17

M15

M11L2

1L1

8L1

6L1

4L1

2L1

0L1K4K24

K14J7J17

H20

H10

G3

G23

G13F6F26

F16E9E19

D22D2D12C5C25

C15B8B18

AF9

AF5

AF26

AF16AF

1AE

9AE

7

AE3AE19AD9AD5

AD22AD12

AD1AC9AC7AC3

AC25AC15

AB9AB5

AB18AB1AA9AA7AA3

AA21AA11

A21A11

A1

GND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GND

GNDGND

GND

GND

GND

GNDGND

GND

GND

VCCO

_0VC

CO_0

RSVD

VCC2

RSVD

VCC3

RSVD

VCC1

DONE_0CFGBVS_0

PROGRAM_B_0

INIT_B_0

TDI_0 TDO_0TMS_0TCK_0

RSVDGND

VCCB

ATT_

0

VN_0VP_0VREFP_0VREFN_0DXP_0

GNDADC_0

VCCA

DC_0

DXN_0

VCCP

LLVC

CPIN

TVC

CPIN

TVC

CPIN

TVC

CPIN

TVC

CPIN

TVC

CPIN

TVC

CPAU

XVC

CPAU

XVC

CPAU

XVC

CPAU

XVC

CBRA

MVC

CBRA

MVC

CBRA

MVC

CBRA

MVC

CAUX

_IO

_G0

VCCA

UX_I

O_G

0VC

CAUX

_IO

_G0

VCCA

UXVC

CAUX

VCCA

UXVC

CAUX

VCCA

UXVC

CAUX

VCCI

NTVC

CINT

VCCI

NTVC

CINT

VCCI

NTVC

CINT

VCCI

NTVC

CINT

VCCI

NTVC

CINT

VCCI

NTVC

CINT

VCCI

NTVC

CINT

GND

GND

GND

GND

GND

GND

GND

GND

GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDMGTVCCAUXMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVTTMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCCMGTAVCC

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

BANK_13

HR

BANK_33

HP

HP

BANK_12

HR

MODULE (DAUGHTER BD)XILINX

HPBANK_34

BANK_112

BANK_35

BANK_111

7 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

0.1UF

100

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

XC7Z035-L2FBG676I

0.1UF

0.1UF

0.1UF

C46

C45

C48

C47

U1

U1 U1

U1

R10

U1

U1

U1

MGTREFCLK1_112_JX3_P

MGTREFCLK0_112_JX1_N

MGTAVTT

MGTXTX3_112_JX3_PMGTXTX3_112_JX3_NMGTXTX2_112_JX3_PMGTXTX2_112_JX3_NMGTXTX1_112_JX3_P


IO_L14_35_TX_D1_P

IO_L13_35_TX_D0_NIO_L13_35_TX_D0_P

IO_L24_35_SPI_DI

IO_L03_35_RX_D2_NIO_L03_35_RX_D2_P

IO_L06_34_JX4_PIO_L06_34_JX4_NIO_L07_34_JX4_P



IO_25_34_JX4IO_L24_34_CTRL_IN3


IO_L03_12_JX3_P

IO_L03_12_JX3_N

IO_L04_12_JX3_N

IO_L02_12_JX3_N

IO_00_35_AD9361_RST

IO_L07_35_RX_FRAME_P


IO_L22_34_JX4_P

IO_L19_35_CTRL_OUT1

IO_25_12_JX4

IO_L24_12_JX4_NIO_L24_12_JX4_PIO_L23_12_JX2_N


IO_L20_12_JX2_PIO_L20_12_JX2_NIO_L21_12_JX2_P

IO_L23_12_JX2_P

IO_L19_12_JX2_N


IO_L01_35_RX_D0_P

IO_L07_34_JX4_N

IO_L12_MRCC_35_DATA_CLK_N

IO_L19_35_CTRL_OUT0

IO_L18_35_TX_D5_PIO_L17_35_TX_D4_NIO_L17_35_TX_D4_P

IO_L16_35_TX_D3_PIO_L15_35_TX_D2_NIO_L15_35_TX_D2_PIO_L14_35_TX_D1_N

IO_L11_35_TXNRXIO_L11_35_ENABLEIO_L10_35_SYNC_INIO_L10_35_EN_AGC

IO_L06_35_RX_D5_P


IO_L02_35_RX_D1_N


IO_L24_34_CTRL_IN2IO_L23_34_CTRL_IN1IO_L23_34_CTRL_IN0IO_L22_34_JX4_N

IO_L21_34_JX4_NIO_L21_34_JX4_PIO_L20_34_JX4_NIO_L20_34_JX4_PIO_L19_34_JX4_NIO_L19_34_JX4_PIO_L18_34_JX4_NIO_L18_34_JX4_PIO_L17_34_JX4_NIO_L17_34_JX4_PIO_L16_34_JX4_NIO_L16_34_JX4_PIO_L15_34_JX4_NIO_L15_34_JX4_PIO_L14_SRCC_34_JX4_NIO_L14_SRCC_34_JX4_PIO_L13_MRCC_34_JX4_N

IO_L12_MRCC_34_JX4_NIO_L12_MRCC_34_JX4_P

IO_L10_34_JX4_NIO_L10_34_JX4_PIO_L09_34_JX4_NIO_L09_34_JX4_PIO_L08_34_JX4_NIO_L08_34_JX4_P

IO_L14_SRCC_12_JX3_NIO_L15_12_JX3_P

IO_L04_12_JX3_P

IO_00_12_JX4


IO_L21_12_JX2_N

IO_L18_12_JX2_NIO_L18_12_JX2_PIO_L17_12_JX2_NIO_L17_12_JX2_PIO_L16_12_JX3_N


IO_L14_SRCC_12_JX3_PIO_L13_MRCC_12_JX3_NIO_L13_MRCC_12_JX3_PIO_L12_MRCC_12_JX3_N



IO_L09_12_JX3_N

IO_L12_MRCC_35_DATA_CLK_P

IO_L09_35_TX_FRAME_PIO_L09_35_TX_FRAME_N

IO_L08_35_FB_CLK_PIO_L07_35_RX_FRAME_N

IO_L22_35_CTRL_OUT6IO_L21_35_CTRL_OUT5IO_L21_35_CTRL_OUT4IO_L20_35_CTRL_OUT3

VCCO_1P8V

IO_L05_35_RX_D4_PIO_L05_35_RX_D4_N

IO_L16_35_TX_D3_N

IO_L01_12_JX3_P

VCCO_12

IO_00_34_AD9361_CLKSEL

IO_L03_34_JX4_P


IO_L19_12_JX2_P

IO_L08_12_JX3_P

IO_L07_12_JX3_P

IO_L06_12_JX3_P

IO_L06_35_RX_D5_NIO_L18_35_TX_D5_N

IO_L20_35_CTRL_OUT2




IO_L07_12_JX3_N

IO_L06_12_JX3_N

VCCO_33_34

IO_00_33_JX1IO_L01_33_JX1_PIO_L01_33_JX1_NIO_L02_33_JX1_P


IO_L03_33_JX1_NIO_L04_33_JX1_PIO_L04_33_JX1_NIO_L05_33_JX1_PIO_L05_33_JX1_NIO_L06_33_JX1_PIO_L06_33_JX1_N

IO_L07_33_JX1_PIO_L07_33_JX1_NIO_L08_33_JX1_PIO_L08_33_JX1_NIO_L09_33_JX1_PIO_L09_33_JX1_NIO_L10_33_JX1_PIO_L10_33_JX1_NIO_L11_SRCC_33_JX1_PIO_L11_SRCC_33_JX1_NIO_L12_MRCC_33_JX1_PIO_L12_MRCC_33_JX1_N IO_L13_MRCC_33_JX1_P

IO_L13_MRCC_33_JX1_NIO_L14_SRCC_33_JX1_PIO_L14_SRCC_33_JX1_N

IO_L15_33_JX1_PIO_L15_33_JX1_NIO_L16_33_JX1_PIO_L16_33_JX1_N

IO_L17_33_JX1_PIO_L17_33_JX1_NIO_L18_33_JX1_PIO_L18_33_JX1_NIO_L19_33_JX1_PIO_L19_33_JX1_NIO_L20_33_JX1_P


IO_L23_33_JX1_PIO_L23_33_JX1_NIO_L24_33_JX1_PIO_L24_33_JX1_NIO_25_33_JX1

VCCO_13


IO_L07_13_JX2_PIO_L07_13_JX2_NIO_L08_13_JX2_PIO_L08_13_JX2_NIO_L09_13_JX2_PIO_L09_13_JX2_NIO_L10_13_JX2_PIO_L10_13_JX2_NIO_L11_SRCC_13_JX2_PIO_L11_SRCC_13_JX2_NIO_L12_MRCC_13_JX2_PIO_L12_MRCC_13_JX2_N IO_L13_MRCC_13_JX2_P

IO_L13_MRCC_13_JX2_NIO_L14_SRCC_13_JX2_PIO_L14_SRCC_13_JX2_NIO_L15_13_JX2_PIO_L15_13_JX2_NIO_L16_13_JX2_PIO_L16_13_JX2_NIO_L17_13_JX2_PIO_L17_13_JX2_NIO_L18_13_JX2_PIO_L18_13_JX2_NIO_L19_13_JX2_PIO_L19_13_JX2_NIO_L20_13_JX2_PIO_L20_13_JX2_NIO_L21_13_JX2_PIO_L21_13_JX2_NIO_L22_13_JX2_P

IO_L23_13_JX2_PIO_L23_13_JX2_NIO_L24_13_JX2_PIO_L24_13_JX2_NIO_25_13_JX2IO_00_13_JX2


IO_L03_13_JX2_N



SCLSDA

IO_L22_13_JX2_N IO_L22_35_CTRL_OUT7IO_L23_35_SPI_ENBIO_L23_35_SPI_CLK

IO_L24_35_SPI_DOIO_25_35_AD9361_CLKOUT

IO_L02_13_JX2_P

IO_L08_35_FB_CLK_N

MGTREFCLK0_112_JX1_P

MGTREFCLK1_112_JX3_N

MGTXRX3_112_JX1_P



MGTXRX1_112_JX1_NMGTXRX0_112_JX1_PMGTXRX0_112_JX1_N MGTXTX0_112_JX3_N

VCCO_33_34

J12

H15

F11

E14

B13

A16

A13A12

C11B11

C12B12

A15A14

C14B14

D13C13

B17A17

B16B15

E16D16

C17C16

F15E15

D15D14J14

H14

G14F14

G16G15

K15J15

K13J13

H13H12

F13E13

G12G11

E11D11

G10F10

E10D10

F12E12

K12H16

M3

L6J2H5F1E4

K8K7

N7N6

K6J6

M8L8

K5J5

M7L7

N1M1

N4M4

M2L2

N3N2

L5L4

M6M5J4

J3

L3K3

H2G1

K2K1

H4H3

J1H1

F3E3

E2E1

D1C1

G2F2

D4D3

G4F4

N8L9

K9G8

D7C10

B3A6

H9

B2A2

C2B1

A4A3

B6A5

B5B4

C4C3

B7A7

A9A8

B10A10

C9B9

D6C6

C8C7G7

F7

F8E7

E6D5

F9E8

D9D8

F5E5

J8H8

J10J9

H7H6

G9

G6G5

J11H11

K10K11

AC2

AE2

AF4

AF8

AC1

AE1

AF3

AF7

AD4

AC6

AE6

AD8

AD3

AC5

AE5

AD7

AA6AA5

W6W5

R2

U2

W2

AA2

R1

U1

W1

AA1

T4

V4

Y4

AB4

T3

V3

Y3

AB3

AB8U6U5

R6R5

AB7

Y19

AF21

AE24

AC20

AB23

AA26

Y18AA18

W18W19

AA19AB19

AC18AC19

AA20AB20

W20Y20

AE18AF18

AD18AD19

AE20AE21

AF19AF20

AC21AC22

AD20AD21AC23

AC24

AD23AD24

AA22AA23

AB21AB22

AE23AF23

AE22AF22

AA24AB24

AF24AF25

AD25AD26

AE25AE26

AB26AC26

AA25AB25

V18V19

AF11

AE14

AD17

AC10

AB13

AA16

W16W15

Y16Y15

AA15AA14

AC17AC16

AB17AB16

Y17AA17

AE17AF17

AE16AE15

AF15AF14

AD16AD15

AB15AB14

AC14AD14AC13

AD13

AC12AD11

AE13AF13

AE11AF10

AE12AF12

AE10AD10

AA13AA12

W13Y13

AB11AB10

Y10AA10

AB12AC11

Y12Y11

W17W14

MGTXRXN0_112 MGTXTXN0_112MGTXRXP0_112 MGTXTXP0_112MGTXRXN1_112 MGTXTXN1_112MGTXRXP1_112 MGTXTXP1_112

MGTREFCLK1P_112MGTREFCLK1N_112

MGTRREF_112

MGTREFCLK0N_112

MGTAVTTRCAL_112

MGTXRXN2_112

MGTREFCLK0P_112

MGTXTXN2_112MGTXRXP2_112 MGTXTXP2_112MGTXRXN3_112 MGTXTXN3_112MGTXRXP3_112 MGTXTXP3_112

VCCO

_13

VCCO

_13

VCCO

_13

VCCO

_13

VCCO

_13

VCCO

_13

IO_25_13IO_L24N_T3_13IO_L24P_T3_13IO_L23N_T3_13IO_L23P_T3_13IO_L22N_T3_13IO_L22P_T3_13

IO_L21N_T3_DQS_13IO_L21P_T3_DQS_13

IO_L20N_T3_13IO_L20P_T3_13

IO_L19N_T3_VREF_13IO_L19P_T3_13IO_L18N_T2_13IO_L18P_T2_13IO_L17N_T2_13IO_L17P_T2_13IO_L16N_T2_13IO_L16P_T2_13


IO_L14N_T2_SRCC_13IO_L14P_T2_SRCC_13IO_L13N_T2_MRCC_13IO_L13P_T2_MRCC_13IO_L12N_T1_MRCC_13

IO_L12P_T1_MRCC_13IO_L11N_T1_SRCC_13IO_L11P_T1_SRCC_13IO_L10N_T1_13IO_L10P_T1_13IO_L9N_T1_DQS_13IO_L9P_T1_DQS_13IO_L8N_T1_13IO_L8P_T1_13IO_L7N_T1_13IO_L7P_T1_13IO_L6N_T0_VREF_13IO_L6P_T0_13IO_L5N_T0_13IO_L5P_T0_13IO_L4N_T0_13IO_L4P_T0_13IO_L3N_T0_DQS_13IO_L3P_T0_DQS_13IO_L2N_T0_13IO_L2P_T0_13IO_L1N_T0_13IO_L1P_T0_13IO_0_13

VCCO

_12

VCCO

_12

VCCO

_12

VCCO

_12

VCCO

_12

VCCO

_12

IO_25_12IO_L24N_T3_12IO_L24P_T3_12IO_L23N_T3_12IO_L23P_T3_12IO_L22N_T3_12IO_L22P_T3_12


IO_L20N_T3_12IO_L20P_T3_12




IO_L12P_T1_MRCC_12IO_L11N_T1_SRCC_12IO_L11P_T1_SRCC_12IO_L10N_T1_12IO_L10P_T1_12IO_L9N_T1_DQS_12IO_L9P_T1_DQS_12IO_L8N_T1_12IO_L8P_T1_12IO_L7N_T1_12IO_L7P_T1_12IO_L6N_T0_VREF_12IO_L6P_T0_12IO_L5N_T0_12IO_L5P_T0_12IO_L4N_T0_12IO_L4P_T0_12IO_L3N_T0_DQS_12IO_L3P_T0_DQS_12IO_L2N_T0_12IO_L2P_T0_12IO_L1N_T0_12IO_L1P_T0_12IO_0_12

GND

VCCO

_35

VCCO

_35

VCCO

_35

VCCO

_35

VCCO

_35

VCCO

_35

IO_25_VRP_35IO_L24N_T3_AD15N_35IO_L24P_T3_AD15P_35

IO_L23N_T3_35IO_L23P_T3_35

IO_L22N_T3_AD7N_35IO_L22P_T3_AD7P_35

IO_L21N_T3_DQS_AD14N_35IO_L21P_T3_DQS_AD14P_35

IO_L20N_T3_AD6N_35IO_L20P_T3_AD6P_35IO_L19N_T3_VREF_35

IO_L19P_T3_35IO_L18N_T2_AD13N_35IO_L18P_T2_AD13P_35IO_L17N_T2_AD5N_35IO_L17P_T2_AD5P_35

IO_L16N_T2_35IO_L16P_T2_35

IO_L15N_T2_DQS_AD12N_35IO_L15P_T2_DQS_AD12P_35IO_L14N_T2_AD4N_SRCC_35IO_L14P_T2_AD4P_SRCC_35

IO_L13N_T2_MRCC_35IO_L13P_T2_MRCC_35IO_L12N_T1_MRCC_35

IO_L12P_T1_MRCC_35IO_L11N_T1_SRCC_35IO_L11P_T1_SRCC_35IO_L10N_T1_AD11N_35IO_L10P_T1_AD11P_35IO_L9N_T1_DQS_AD3N_35IO_L9P_T1_DQS_AD3P_35IO_L8N_T1_AD10N_35IO_L8P_T1_AD10P_35IO_L7N_T1_AD2N_35IO_L7P_T1_AD2P_35IO_L6N_T0_VREF_35IO_L6P_T0_35IO_L5N_T0_AD9N_35IO_L5P_T0_AD9P_35IO_L4N_T0_35IO_L4P_T0_35IO_L3N_T0_DQS_AD1N_35IO_L3P_T0_DQS_AD1P_35IO_L2N_T0_AD8N_35IO_L2P_T0_AD8P_35IO_L1N_T0_AD0N_35IO_L1P_T0_AD0P_35IO_0_VRN_35

VCCO

_33

VCCO

_33

VCCO

_33

VCCO

_33

VCCO

_33

VCCO

_33

IO_25_VRP_33IO_L24N_T3_33IO_L24P_T3_33IO_L23N_T3_33IO_L23P_T3_33IO_L22N_T3_33IO_L22P_T3_33


IO_L20N_T3_33IO_L20P_T3_33




IO_L12P_T1_MRCC_33IO_L11N_T1_SRCC_33IO_L11P_T1_SRCC_33IO_L10N_T1_33IO_L10P_T1_33IO_L9N_T1_DQS_33IO_L9P_T1_DQS_33IO_L8N_T1_33IO_L8P_T1_33IO_L7N_T1_33IO_L7P_T1_33IO_L6N_T0_VREF_33IO_L6P_T0_33IO_L5N_T0_33IO_L5P_T0_33IO_L4N_T0_33IO_L4P_T0_33IO_L3N_T0_DQS_33IO_L3P_T0_DQS_33IO_L2N_T0_33IO_L2P_T0_33IO_L1N_T0_33IO_L1P_T0_33IO_0_VRN_33

PUDC_B

VCCO

_34

VCCO

_34

VCCO

_34

VCCO

_34

VCCO

_34

VCCO

_34

IO_25_VRP_34IO_L24N_T3_34IO_L24P_T3_34IO_L23N_T3_34IO_L23P_T3_34IO_L22N_T3_34IO_L22P_T3_34


IO_L20N_T3_34IO_L20P_T3_34




IO_L12P_T1_MRCC_34IO_L11N_T1_SRCC_34IO_L11P_T1_SRCC_34IO_L10N_T1_34IO_L10P_T1_34IO_L9N_T1_DQS_34IO_L9P_T1_DQS_34IO_L8N_T1_34IO_L8P_T1_34IO_L7N_T1_34IO_L7P_T1_34IO_L6N_T0_VREF_34IO_L6P_T0_34IO_L5N_T0_34IO_L5P_T0_34IO_L4N_T0_34IO_L4P_T0_34IO_L3N_T0_DQS_34

IO_L2N_T0_34IO_L2P_T0_34IO_L1N_T0_34IO_L1P_T0_34IO_0_VRN_34

MGTXRXN0_111 MGTXTXN0_111MGTXRXP0_111 MGTXTXP0_111MGTXRXN1_111 MGTXTXN1_111MGTXRXP1_111 MGTXTXP1_111

MGTREFCLK1P_111MGTREFCLK1N_111MGTREFCLK0N_111

MGTXRXN2_111

MGTREFCLK0P_111

MGTXTXN2_111MGTXRXP2_111 MGTXTXP2_111MGTXRXN3_111 MGTXTXN3_111MGTXRXP3_111 MGTXTXP3_111

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

RX1A INPUT

TX MONITOR SMA CONNECTORS

TX1B OUTPUT

TX2A OUTPUT

TX1A OUTPUT

RX2A INPUT

RX2B INPUT

TX MONITOR 2 INPUT

TX MONITOR 1 INPUT

TX2B OUTPUT

14.3K 1%


RX SMA CONNECTORS

TX OUTPUT SMA CONNECTORS

RX1B INPUT

8 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

10UF

10UF

330NH

18PF

18PF

330NH

18PF

330NH

AD9361BBCZ

0.001UF

18PF

18PF

0.001UF

0.001UF

0.001UF

0.001UF

0.001UF

0.001UF

LT15CCC2243A

49.9

49.9

1K

14.3K

0.1UF

FXL4T245BQX

18PF

0.1UF

TCM1-63AX+

18PF

1

10

10

1

TCM1-63AX+

TCM1-63AX+

TCM1-63AX+

TCM1-63AX+

18PF

18PF

18PF

18PF

18PF

1UF

1UF

TCM1-63AX+

18PF

18PF

10K

10UF

TCM1-63AX+

TCM1-63AX+

18PF

18PF

0.001UF

330NH

330NH330NH

10UF

330NH330NH

L8L1

L9L2

U17

L4

C30

C29

C13

R124

C12

R125

R123

C105

C104

R1

R2

C22

C8

C9

C10

C11

C21

R111

C14

C7

C6

T1

T3

T5C25

C26

T7C32

C33

RX1A

RX2A

TX1A

TX2A

T2RX1B

T4RX2BC53

C56

C51

C52

C20 C24

T6 TX1B

C19 C23

T8 TX2B

TXM1

TXM2

U22

C245 C246

R59

R101

R102

M1

C35

C34

C16

L3

L11L10

TX1A_P

TX_VCO_1P1V_SUPPLY

TX2A_P

TX_VCO_1P1V_SUPPLY

GPO1

AUXDAC1

RX2A_P

RX1B_P

RX1B_N

TX2B_P

TX2B_N

TX_MON2

TX2A_N

RX2A_N

TX_MON1

TX_MON2

TX_MON1

IO_L16_35_TX_D3_NIO_L15_35_TX_D2_N

IO_L14_35_TX_D1_NIO_L13_35_TX_D0_NIO_L18_35_TX_D5_N

IO_L21_35_CTRL_OUT5

IO_L21_35_CTRL_OUT4

IO_L14_35_TX_D1_P

VDDA_TX_SYNTH

IO_L01_35_RX_D0_P

1P3_TX2B

IO_L17_35_TX_D4_N

IO_L13_35_TX_D0_P

IO_L15_35_TX_D2_PIO_L16_35_TX_D3_P

IO_L12_MRCC_35_DATA_CLK_P

VDD_INTERFACE

VDDD_DIG

IO_L08_35_FB_CLK_P

IO_L19_35_CTRL_OUT1

IO_L04_35_RX_D3_N

IO_L05_35_RX_D4_N

IO_L02_35_RX_D1_N

TX1A_N

IO_L04_35_RX_D3_P

IO_L02_35_RX_D1_P

RX1A_P

IO_L05_35_RX_D4_P

IO_L06_35_RX_D5_N

IO_L06_35_RX_D5_P

IO_L23_34_CTRL_IN0IO_L23_34_CTRL_IN1IO_L24_34_CTRL_IN2IO_L24_34_CTRL_IN3

CTRL_IN0CTRL_IN1CTRL_IN2CTRL_IN3

CTRL_IN0CTRL_IN1

IO_L19_35_CTRL_OUT0

CTRL_IN3

GPO3

VDDA_TX_LO

AUXDAC2

GPO2

GPO0

RX2B_P

RX2B_N

IO_L24_35_SPI_DI

IO_L23_35_SPI_ENBIO_L24_35_SPI_DO

VDDA_BB

IO_L03_35_RX_D2_N

IO_L01_35_RX_D0_N

IO_L20_35_CTRL_OUT2

VDDA_RX_SYNTH

TX2B_N

RX1B_P

VDDA_GPO

RX1A_N

RX2A_P

IO_L17_35_TX_D4_P

IO_L18_35_TX_D5_P

IO_L11_35_TXNRX

IO_L08_35_FB_CLK_NIO_L09_35_TX_FRAME_P

1P3_TX1B

1P3_TX1A

IO_L03_35_RX_D2_P

IO_L09_35_TX_FRAME_N

IO_L10_35_SYNC_IN

RX2B_N

RX2B_P

VDDA_RX_LO

IO_L20_35_CTRL_OUT3

IO_L22_35_CTRL_OUT6

VCCO_33_34VDD_INTERFACE

IO_L10_35_EN_AGCIO_L11_35_ENABLE

IO_L07_35_RX_FRAME_NIO_L07_35_RX_FRAME_P

TX1B_P

TX1B_N

TX1B_P

TX1A_N

TX1A_PAUXADC

RX2A_N

IO_L22_35_CTRL_OUT7

IO_L12_MRCC_35_DATA_CLK_N

IO_25_35_AD9361_CLKOUT

TX2B_P

RX1A_P

TX1B_N

CTRL_IN2VD

DA_RX_TX

RX1A_N

IO_00_35_AD9361_RST

9361_XTAL

IO_L23_35_SPI_CLK

RX1B_N

1P3_TX2A

TX2A_N

TX2A_P

6

L5

B3

C3

J6

C5C6

D6D5D4 E4 E5 E6 F6F5F4

G4

H11

G11

G5G6

G10

F10

B7B6B5

A3

M3

E12

D11

E11

D10

E10D9 E9D8 E8D7 F8E7

K11

J12

K10

J11

K9

J10

K8

J9

K7

J8J7

H8

L4 K5M2

M1

J1

H1

L1 K1

A1A2

F1E1D1

C1

G1

G7G8

G2

J5J4

L6 K6

H5

C4

M8

M7

M10

M9

A8A9

A10

A12

H9

G9

M5

A5

B11

H4

H12

G3

A11

K4

E2D2

J3

D3 F2

B9

E3

K3

B10

B8

F12

A6

B1B2

B12

C2

C7C8C9

C10C11C12

F3

H2H3

J2

K2L2L3L7L8L9L10

L11

L12

M6

A4

M4

H6

D12 F7 F9 F11

G12

H7

H10

K12

M12

1 5

2

3

4

6

1 5

2

3

4

6

15

2

3

4

15

2

3

4

1

2 3

1

2 3

1

23

1

23

1 5

2

3

4

61

2 3

1 5

2

3

4

61

2 3

15

24

6 1

23

15

2

3

4

6 1

23

1

2 3

1

2 3

2345

13121110

7 8

9

PAD

6

1 14

GND1GND2GND3GND4GND5GND6GND7GND8GND9

GND10GND11 GND12

GND13GND14GND15GND16GND17GND18GND19GND20GND21GND22

M11

3

6

B4

A7

GND

GND

GND

GND

GND

GND

GNDGND

GNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGNDGND

GNDGNDGNDGNDGNDGNDGNDGNDGNDGND

GND

GND

GNDGND

GND

T/R_N

B0B1B2B3

VCCBVCCA

GND PADOE_N

GND

A3A2A1A0

GND

GND

GND

GND

GNDGND

GND

NC

GND

GND

GND

GND

GND

NC

GND

GND

GNDGND

GND

NC

GND

GNDGND

GND

NC

GND

GND

GND

GND

GND

GND

GND

VSSA

XTAL

NXT

ALP

TX1B

_NTX

1B_P

TX1A

_NTX

1A_P

VSSA

TX_M

ON1

VSSA NC

RX1A

_NRX

1A_P

VSSA

VSSA

VSSA

VSSA

VSSA

VSSA

SPI_

DOAU

XADC

RBIA

SVS

SAVS

SARX

1C_N

VSSD

P1_D

0/RX

_D0_

NP1

_D2/

RX_D

1_N

P1_D

4/RX

_D2_

NP1

_D6/

RX_D

3_N

P1_D

8/RX

_D4_

NSP

I_EN

BRE

SETB

VDDA

1P3_

BBVD

DA1P

3_TX

_SYN

THVS

SARX

1C_P

P1_D1/RX_D0_PP1_D3/RX_D1_PP1_D5/RX_D2_PP1_D7/RX_D3_PP1_D9/RX_D4_P

P1_D10/RX_D5_NCLK_OUTSPI_CLK

SPI_DIVDDA1P3_RX_SYNTH

VSSARX1B_N

VDD_INTERFACEDATA_CLK_N

VSSDTX_FRAME_N

P1_D11/RX_D5_PVSSD

SYNC_INTXNRX

VSSAVSSA

RX1B_PVSSD

DATA_CLK_PFB_CLK_N

TX_FRAME_PRX_FRAME_PRX_FRAME_N

ENABLEEN_AGC

CTRL_OUT7VDDA1P1_RX_VCORX_VCO_LDO_OUT

RX_EXT_LO_IN

VDDD

1P3_

DIG

VSSD

FB_C

LK_P

VSSD

P0_D

10/T

X_D5

_NVS

SDCT

RL_O

UT4

CTRL

_OUT

5CT

RL_O

UT6

VSSA

VDDA

1P3_

RX_V

CO_L

DORX

2B_N

P0_D

0/TX

_D0_

NP0

_D2/

TX_D

1_N

P0_D

4/TX

_D2_

NP0

_D6/

TX_D

3_N

P0_D

8/TX

_D4_

NP0

_D11

/TX_

D5_P

CTRL

_OUT

3CT

RL_O

UT2

CTRL

_OUT

1VD

DA1P

3_TX

_LO

_BUF

FER

VDDA

1P3_

RX_L

ORX

2B_P

VSSD

P0_D

1/TX

_D0_

PP0

_D3/

TX_D

1_P

P0_D

5/TX

_D2_

PP0

_D7/

TX_D

3_P

P0_D

9/TX

_D4_

PCT

RL_I

N2CT

RL_I

N3CT

RL_O

UT0

VDDA

1P3_

RX_T

XVD

DA1P

3_RX

_RF

RX2C

_N

VSSAVSSAVSSAVSSAVSSAVSSACTRL_IN1CTRL_IN0TEST/ENABLEAUXDAC2VSSARX2C_PVSSATX_VCO_LDO_OUTVDDA1P3_TX_VCO_LDOVDDA1P3_TX_LOVDDA_GPOGPO_0GPO_1GPO_2GPO_3AUXDAC1VSSAVSSATX_EXT_LO_INVDDA1P1_TX_VCOTX2B_PTX2B_NTX2A_PTX2A_NVSSATX_MON2VSSANCRX2A_PRX2A_N

GND

GNDNC

GND

NC

GNDNC

NC

GND

GND

GND

GNDGND

GND

GND

GND

GND

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

BALL F12

0.5 AMP

BALL H12

BALL E2 & F2

BALL K3

POWER MANAGEMENT SECTION


VIN = 5V MAX

BALL J3

BALL B9 & B10

BALL K4

BALLS D2, D3, AND E3

BALL B8

8 AMPS

1 AMP1.8 AMPS

2 AMPS

9 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

10UF 0.1UF 0.1UF10UF

0.01UF

0.1UF

0.01UF

100UF100UF

100OHM

22UF

10K

1UH

0.0022UF

39PF

ADP2386ACPZN

1UF

35.7K

10K

5

100OHML0805

L0805

5

100OHML0805

5

LG L29K-G2J1-24-Z

330NH

10UF

2.2UF

10UF

1

53.6K

10UF

10UF

10UF 0.1UF 10UF 0.1UF 1UF 0.01UF 0.01UF 1UF

0.01UF

ADP1754ACPZ-1.3

0.1UF

0.1UF

ADP1754ACPZ-1.3

10UF 10UF

10K

0.1UF

10UF

0.1UF

0.01UF

0.1UF

ADP7102ACPZ-2.5

BSS138LT1G

130

1UF 0.01UF 1UF

0.1UF

10UF

ADP7104ACPZ-3.3-R7

10UF

0.01UF0.01UF

0.01UF

0.01UF 0.01UF

0.01UF

0.01UF

0.01UF

0.01UF

1UF1UF

1UF1UF

1UF 1UF

1UF

1UF

1UF

1UF

1UF

10UF

10UF

10UF

0.1UF10UF 0.01UF

1UF

100UF

1UF

100UF

700NH

100OHM

100OHML0805

22UF

10UF100OHML0805

L0805100OHM

22UF

26.1K

1UH

10UF

10UF

L0805

1UH

16.9K

ADP5135

75OHM

10UF10K

4.99K

4.99K

4.99K

13.3K

21K

0.039UF

10K

10K

10K

10K

2.2UF

R79

R49

C341 C342

C256

C255

R303R302

R47

R48

R46

R20

R23

R81

C254

R80

C252

C305 C257

C259C258

C309C308

L13L301

R78

C253

U18

R25

D3

C347C362

U20

U19

U9

L7

L6

L5

C198

E11C196

C197

C192

C194

C195

C193

C191

C200

U6

C319 C358 C359 C360 C361

R113

Q14

R29

E2

E7

E8

E9

E4

E3 C336 C337C334 C335

C324 C325C330 C331

C1 C2 C3 C4

C66

C61

C65

R22 C69

C68

R24

R21

C62

C67

U4

C36

TP2

C199

C38C365C364

C363

C301

C348

C310

C318

C340

C343 C344

C311

E10

R306

C321C320

C329C328

C333C332

C315C314

C323C322

C327C326

C313C312

C354 C355 C356 C357

1.35V

1P3_SUPPLY_B

VCCINT-0P95V

PWR_GD

3.3V

FB0V95

PWR_ENABLE

VIN

FB_1V35

FB_1V8

FB1V35FB1V0

VIN

FB1V8VOUT1

PWR_ENABLEPS_1.35V_EN

1.8V

3V3_I2C

VOUT3

PWR_GD_1.35V

VCC-BRAM

VDD_INTERFACE

VDDA_RX_LO

1P3_SUPPLY_A

PWR_GD

PG_1P8V

VDD_INTERFACE

VDDA_TX_SYNTH

VDDA_TX_LO

VDDA_RX_SYNTH

1P3_TX1A

VDDA_RX_TX

1P3_TX2A

1P3_TX2B1P3_TX1B

VDDD_DIG

VDDA_BB

3.3V_EN

VDDA_GPO_PWR

PG_MODULE

VCC-3P3V

VOUT2

3.3V

VCC-3P3V-IO

SW2

VDDA_GPO

1.8V_EN

PWR_GD

0.95V

VCCPCOM-1P8V

PG_1P8V

SW1

SW3

VCCO-DDR

VCC-1P35

1.0V

PWR_GD_1.35V

VIN

VCCPINT

FB_1V0SW2

FB1V35

VOUT2

FB1V0

SW1

VOUT1

FB1V8

SW3

VOUT3

FB_0V95

FB0V95

PG_1P8V 1.8V

3

23 PAD214765

24

22

19181716

21

1312111098PA

D14

2

20

115

A

C

1413121110

1615

321

79

5

PAD8 6

4

1413121110

1615

321

79

5

PAD8 6

4

182 7

PAD4 63

5

21182

7

PAD4 63

5

2

1

3

21

21

21

21

21

21

229

10

21316

20415

19514

126

PAD

13

238

11

247

12

1718

1

21

GND GND GND GND

GND GNDGND GND

GND GNDGND GND

GND GND GND GND

PG3PG2

VOUT3

VIN2

EN3

VIN1

VOUT2

MODE

AGND

AVIN

SW2

PGND

3

PGND

1

PG1

EN1

FB2

VIN3

VOUT1FB3

EN2

PGND

2

SW1

SW3

FB1

PAD

GNDGNDGND

GNDGNDGND

GND

GNDGNDGNDGNDGND

GND

GND

GNDGND

GND GND GNDGND

GND

GND

GND

GND

GND

GNDGND

GNDGND

GNDGND

GNDGNDGNDGND

GNDGNDGND

GNDGNDGND

GND

GND

GNDGND

SW

GND

SSSYNCRT

PGOOD

ENPVINPVINPVINPVINBST

SW

PGND

PGND

PGND

PGND

PGND

PGND

SWSWSW

GND

VREG

FB

COMP

GND GND

SENSE

VOUT

NC

SS

GND

PG

EN

VIN

PAD

SENSE

VOUT

NC

SS

GND

PG

EN

VIN

PAD

SENSE

PAD

VIN

PGENNC GND

VOUT

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

SENSE_ADJ

PAD

VIN

PGEN_UVLO

NC GND

VOUT

GND

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

CLK MUST BE 1.3VP-P MAX

10 10

<DESIGN_VIEW>


1:1

F02_038702

C.ELKHOURY

18PFDNI

18PF

4.7K4.7K

ADM7160AUJZ-1.8

LG L29K-G2J1-24-Z

2.2UF

ADP7118AUJZ-3.3

10UF10UF

4.02K

4.7UF

1K

TCA9517DGKR

2.2UF

AD7291BCPZ

4.02K0.1UF 0.1UF

4.02K

4.02K

10UF

DNI

10K

10K10K

DNI10K

5147733-4

40MEGHZ

BSS138LT1G

0.1UF

ADG772BCPZ

10K

DNI49.9

301

1K

4.7UF4.7UF 0.1UF

C165

C216

U8

C260 C5Y4

Q6

C188

U5

R33

R5

C113R55

R54

DS1

U23

P1

R75

C247C248

C244C243

R58R57

U21R68

R67

R62

R61

R64

R63 R65

R66

C133

C158C124 C134

U24

3.3V

VBUS

3V3_I2C

PHY1_AVDD_1V8_OUTSCLSDA

3V3_I2C

3V3_I2C

VH

SDA_ADM1166

1P3_SUPPLY_A1P3_SUPPLY_B

FPGA_VBATT

VTT_0P75

SCL_ADM1166

VDDA_GPOVCCO_13 3V3_I2C

3V3_I2C

SDA_ADM1166

SCL_ADM1166

VBUS

SDA_ADM1166

VTTVREF

3V3_I2C

SD_SELJX3_SD1_CDN

IO_00_34_AD9361_CLKSEL

3.3V

PS_MIO50_501_SD0_CD

AD9361_CLK

SCL_ADM1166

J3-9

9361_XTALIO_00_34_AD9361_CLKSEL

3.3V

51

42

3

4

3

2

1

2

1

3

6

79

31

54

10

8

2

A

C

51

4

2

3

B5A5B4A4B3A3B2A2B1A1

81

6372

4

5

7

54321

201918

16

10

1415

17

PAD 69

8

1311

12

VOUT

NC

EN

GND

VIN

GNDGND

GND

E/DGND

VDDOUTGND

GND

GND

GND

GND

D2

GND

S2A

S1A D1S1BIN1

S2B

IN2

VDD

GND

GND

VOUTSENSE/ADJEN

GND

VIN

GND

GND

GNDGND

GND

GND

GND

GND

VCCB

SCLBSDAB

ENGND

SDAASCLA

VCCA

GNDGND

GND

GND

GNDGND

GNDGND

PAD GND1GND

VDD VREF

SDA

ALERT

DCAP

SCLAS1AS0

VIN7VIN6VIN5VIN4VIN3VIN2VIN1VIN0

VDRIVE

PD_N/RST_N

D





AC


2

SCALE

DDDSIZE

D

REV

SHEET

1

1

A

234

35

8

D

7

678

A

B

C C

D

5

4

APPROVED

B

6

DESCRIPTION

REVISIONS

OF

OL GE


EAN

V

OF ANALOG DEVICES.

SCHEMATIC

S

PTD ENGINEER

DESIGN VIEW

REV DATE

jp# jun-2014...04-november-2016 jun-2014 r.getz module (daughter bd) initial release 27jul17...

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