jump and branch instructions

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Jump and Branch Instructions Jump instruction. Symbolic address. Conditional Branches. Textbook P&H: Chapter 3.5.Instructions for making decisions. Central Connecticut State University, MIPS Tutorial. Chapters 17,18.

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Repeat and Alter actions The power of computers is: their ability to repeat actions and their ability to alter their operation depending on data. Modern programming languages express these abilities using control structures. Repeated action (iteration) is done with a while structure. Altered operation (alteration) is done with an if-then-else structure.

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Page 1: Jump and Branch Instructions

Jump and Branch Instructions

• Jump instruction.• Symbolic address.• Conditional Branches.

Textbook P&H: Chapter 3.5.Instructions for making decisions.Central Connecticut State University, MIPS Tutorial. Chapters 17,18.

Page 2: Jump and Branch Instructions

The power of computers is: their ability to repeat actions and their ability to alter their operation

depending on data.Modern programming languages express these abilities using control structures. Repeated action (iteration) is done with a

while structure. Altered operation (alteration) is done with

an if-then-else structure.

Repeat and Alter actions

Page 3: Jump and Branch Instructions

The machine instructions of the processor mainly do not have Repeat and Alter structures (Intel has loops).

Consequentially Assembly language does not have these structures.

When you program in assembly language you must build these structures out of basic assembly instructions.

These basic instructions are the jump instructions and the conditional branch instructions.

Assembly builds the structures

Page 4: Jump and Branch Instructions

The effect of a jump instruction is to put a new address into the PC.

Now the next machine cycle fetches the instruction at the new address.

Instead of executing the instruction that follows the jump instruction in memory, the processor "jumps" to an instruction somewhere else in memory.

What does Jump

[0x0040000c] jump 0x0040 0020 [0x00400010] other instructions . . . . . . [0x00400020] ori $8, $0, 4

Program Counter 0x0040 0004 Control Point

0x0040 0000

Control Flow

Page 5: Jump and Branch Instructions

Jump syntax

main: sll $0,$0,0 sll $0,$0,0 sll $0,$0,0 sll $0,$0,0 j main addiu $8,$8,1

j target # after a delay of one # machine cycle,

# processor jumps to target

• This is endless loop.• Is there anything changed in this

loop ?

$8=$8+1

Branch delay slot

Page 6: Jump and Branch Instructions

The intent of the jump instruction is to put the address 0x00400000 into the PC.

However, PC changes only after the instruction in the branch delay slot has executed.

How does a 32-bit instruction specify a 32-bit address? What does mean this machine code 0x08100000 ? How the assembler forms it ? How the computer translates that instruction back into

the address ?

Jump Machine Instruction[0x00400000] 0x00000000 nop ; 8: sll $0,$0,0[0x00400004] 0x00000000 nop ; 9: sll $0,$0,0[0x00400008] 0x00000000 nop ;10: sll $0,$0,0[0x0040000c] 0x00000000 nop ;11: sll $0,$0,0[0x00400010] 0x08100000 j 0x00400000 [main] ;12: j main[0x00400014] 0x25080001 addiu $8, $8, 1 ;13: addiu $8,$8,1

Page 7: Jump and Branch Instructions

Addressing mode – One of several addressing regimes delimited by their varied use of operands and or addresses.

Addressing Modes

5. Jump uses the Pseudodirect addressing mode, where the jump address is the 26 bits of the instruction concatenated with the upper bits of the PC

Page 8: Jump and Branch Instructions

Some of the instruction's bits must be used for the op-code.

There is room in the instruction for a 26-bit address.

The 32-bit target address is transformed by compiler into a 26-bit address and is written into the instruction.

During execution the 26-bit target address field is transformed back into a 32-bit jumping address by computer.

How this is done ?

Jump instruction format

6 26000010 00000000000000000000000000 opcode target

Page 9: Jump and Branch Instructions

Instructions always start on an address that is a multiple of four (they are word-aligned).

So the low order two bits of a 32-bit instruction address are always "00".

0-0000 4-0100 8-1000 C-1100 No need to keep the last 2 zeros in 26 bits of

instruction. They could be restored later during jump time

26 bits keep instruction number (not byte’s address)

[0x00400000] 0x00000000 nop[0x00400004] 0x00000000 nop[0x00400008] 0x00000000 nop[0x0040000c] 0x00000000 nop[0x00400010] 0x08100000 j 0x00400000 [main][0x00400014] 0x25080001 addiu $8, $8, 1

6 26 27,28000010 00000000000000000000000000 00

Page 10: Jump and Branch Instructions

We cannot do “jump to absolute address”. Because we cannot keep more than 28 bits

of address in the jump instruction But if we have some base address

then we can construct the full absolute address and jump by that address.

That base is the PC’s high order 4 bits.

We have 28 bits. What with the 4 remaining bits to have a full absolute

address ?

6 26 27,28000010 00000000000000000000000000 00 PC0000 0000 0100 0000 0000 0000 0000 0000

Page 11: Jump and Branch Instructions

Shifting the 26-bit target left two places results in a 28-bit word-aligned address.

Now the high-order four bits in the PC are concatenated to the high-order end of the 28-bit address to form a 32-bit address.

How is formed the absolute address

Page 12: Jump and Branch Instructions

A jump instruction can't jump to any arbitrary location in the full 32-bit address space

It must jump to an address within the following range:

Relative addressing causes the jumps to be local

wxyz 0000 0000 0000 0000 0000 0000 0000 .

.wxyz 1111 1111 1111 1111 1111 1111 1100

The program is compact and mainly the most jumps and branches are to nearby addresses.

If no other memory allocation technique (paging, relocation, segmentations) is being used then OS should place the program in the WXYZ segment in the way that the program’s start and the end remain in that segment

Page 13: Jump and Branch Instructions

Jump Example

Address Machine Instruction Assembly Instruction

00400000 0000 0000 0000 0000 0000 0000 0000 0000 sll $0,$0,0

00400004 0000 0000 0000 0000 0000 0000 0000 0000 sll $0,$0,0

00400008 0000 0000 0000 0000 0000 0000 0000 0000 sll $0,$0,0

0040000C 0000 0000 0000 0000 0000 0000 0000 0000 sll $0,$0,0

00400010 000010 00 0001 0000 0000 0000 0000 0000 j firstInstruction

00400014 0000 0000 0000 0000 0000 0000 0000 0000 sll $0,$0,0

1. Full 32-bit jump address:0x00400000 0000 0000 0100 0000 0000 0000 0000 0000

2. The 26-bit field of the jump instruction: 00 0001 0000 0000 0000 0000 0000

3. Shift it left two positions: 0000 0100 0000 0000 0000 0000 0000

4. What are the high-order four bits of the PC? 0000

5. Copy (4) to the left of (3): 0000 0000 0100 0000 0000 0000 0000 0000

6. Is (5) the same as (1)? Yes

Page 14: Jump and Branch Instructions

Unconditionally jump to the instruction whose address is in register rs.

Jump to absolute address

.text .globl __start __start: sll $0,$0,0here: sll $0,$0,0 sll $0,$0,0 lui $5,0x0040 ori $5,0x0004 jr $5 # Jump to 0x0040 0004 addiu $8,$8,1

Page 15: Jump and Branch Instructions

Mips states that placing branch instruction in to a branch delay slot leads to undefined results.

Unpredictable result

__start: sll $0,$0,0lbl1: sll $0,$0,0 sll $0,$0,0lbl2: sll $0,$0,0 j __start # OK

j lbl1 # Incorrectj lbl2 # Incorrect

addiu $8,$8,1