key dsp operations

15
KEY DSP OPERATIONS

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These are the Key Digital Signal Processing Operations, from the important process of sampling a signal, to converting a signal from analog to digital

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Page 1: Key DSP Operations

KEY DSP OPERATIONS

Page 2: Key DSP Operations

OVERVIEW OF REAL-TIME SIGNAL PROCESSING

DSP technology is the core of many new and emerging digital information products and applications that support the information society. Such products and applications often require the collection, processing, analysis, transmission, display, and/or storage of real world information, sometimes in real time. The ability of DSP technology to handle real-world signals digitally has made it possible to create affordable, innovative, and high quality products and applications for large consumer markets.

Page 3: Key DSP Operations

TYPICAL REAL TIME DSP SYSTEMS

x(t) x(n) y(n) y(t)

Block Diagram of a simplified, generalized real rime digital signal processing system

Analog Input filter

ADC w/ sampling and hold

Digital Processor

DAC Output filter

Page 4: Key DSP Operations

Analog Input filter- used to bandlimit the analog input signal prior to digitization to reduce aliasing.

ADC – converts the analog input signal into a digital form. For wide bandwidth signals or when a slow ADC is used, it is necessary to precede the ADC with a sample and hold circuit, although newer ADCs now have built-in sample and hold circuits.

Digital Processor – it is the heart of the system which may be based on a general, a digital signal processor chip such as the Texas Instruments TMS320C50, or the Motorola DSP56000 or some other piece of hardware.

DAC – converts the processed signal back into analog form.

Output Filter – smooths out the outputs of the DAC and removes unwanted high frequency components.

Page 5: Key DSP Operations

ANALOG TO DIGITAL CONVERSION

PROCESS

Page 6: Key DSP Operations

STEPS: The (bandlimited) signal is first sampled, converting the analog signal into a discrete-time continuous amplitude signal.

The amplitude of each signal sample is quantized into one of 2B levels, where B is the number of bits used to represent a sample in the ADC.

The discrete amplitude levels are represented or encoded into distinct binary words each of length B bits.

Page 7: Key DSP Operations

DIGITAL TO ANALOG CONVERSION

PROCESS

Page 8: Key DSP Operations

BLOCK DIAGRAM:

y(nT) y(t) y(t)

Digital Processor DAC LPF

nT T t t

y(nT) y(t) y(t)

Digital to Analog Converter (ADC) -used to recover the analog signal after digital processing

Low Pass Filter (LPF) – also known as smoothing, reconstruction, or anti-imaging

Page 9: Key DSP Operations

DIGITAL PROCESSORS

Page 10: Key DSP Operations

It is used to insert or interpolate between the actual sample points applied to the DAC. This helps to smooth out the analog signal and gives a substantially better result than the zero-order hold.

The architectures of standard microprocessors are unsuited to the DSP characteristics and this has led to the development of a new kind of processor whose architecture and instruction set are tailored to DSP operations. The new processors or DSP chips have features that include the following:

Page 11: Key DSP Operations

Built-in hardware multiplier(s) to allow fast multiplications.

Separate busses/memories for program and data.

Cycle-saving instructions for branching or looping

Very fast raw speed

Use of pipelining which reduces instruction time and increase speed.

Page 12: Key DSP Operations

CONSTRAINTS OF REAL TIME SIGNAL PROCESSING

WITH ANALOG INPUT/OUTPUT SIGNALS

Page 13: Key DSP Operations

The following are the constraints and errors introduced by the analog-to-digital and digital-to-analog conversion processes in real-time DSP.

The use of a finite number of bits to represent data introduces an intrinsic error, the quantization error, which is propagated into subsequent signal processing.

Solution:

Increase the resolution of the ADC and to oversample the signal followed by a further DSP to improve the SNR.

Page 14: Key DSP Operations

High resolution ADC and DAC are in general slow. The ADCs/DACs are subject to a variety of errors which include temperature effects and nonlinearities. The output of the sample and hold is wideband and will increase the noise at the ADC input. Aliasing error from signal energy outside the band of interest is always present.Solution: To reduces to an acceptable level, bandlimit the signal before sampling, and oversample if possible.

Page 15: Key DSP Operations

The use of a zero-order DAC introduces the sin x/x effect which progressively reduces the high frequency components of a signal.

Solution:

This can be compensated for by using a digital filter with an x/sin x response.

Errors are introduced by the anti-aliasing filters.

Sample and hold errors include acquisition time, aperture uncertainty, droop errors during the conversion interval, and feedthrough in the hold mode.