KOREAN R&D ON THE 6KOREAN R&D ON THE 6--PULSE CONVERTER UNIT PULSE CONVERTER UNIT FOR ITER AC/DC CONVERTERSFOR ITER AC/DC CONVERTERS

SOFE 2011

2011. 06. 27

J. S. Oh1), J. Choi1), J. H. Suh1), H. Liu2), S. Lee2), H. Park2), W. Jung2),

S. Jo2), H. Tan3), J. Tao3), P. Fu4)

1) ITER Korea, National Fusion Research Institute, Republic of Korea

2) Dawonsys Corp., Republic of Korea

3) ITER Organization, France

4) Academy of Sciences Institute of Plasma Physics, China

ITERITER

AC/DC ConvertersAC/DC Converters

1

ITER Coil Power Supply System

French Power

Transmission

Grid (400 kV, 500 MW)

66 kV

AC

DC

SwitchingNetwork

Unit

CS SYSTEM

AC

DC

Fast Discharge

Unit

TF SYSTEM

Fast Discharge

Unit

CN/KOCN/KO

22 kV AC

DC

CC SYSTEM

RPC

RPC SYSTEM

3 x 300 MVA

3 x 250 MVA

AC

DC

Fast Discharge

Unit

PF SYSTEM

RFRF

2

Block Diagram of Coil Power Supplies

TF

PF1

CS3U

CS2U

CS1U

CS1L

CS2L

CS3L

PF6

PF5

PF4

PF3

PF2

PF

CS

CS

CS

CS

PF

CS

CS

TC

CCB1

CCB2

CCB3

CC

CC

CC

CCT1

CCT2

CCT3

CC

CC

CC

CCS1

CCS2

CCS3

CCS

CCS

CCS

PF PF

PF PF

PF PF

PF PF

VS

PF

CS

CS

CS

CS

PF

CS

CS

PF

PF

PF

PF

VS VS VS VS VS

CS 1.35 kV/45 kA, 6 ea(+6ea)

PF 1.35 kV/55 kA/, 14 ea(+2ea)

VS 1.35 kV/22.5 kA, 2ea(+4ea)

TC 0.7 kV/68 kA, 1 ea

CC 0.1 kV/10 kA, 6 ea

CCS 0.45 kV/10 kA, 3 ea

Total 32 ea (+12ea: Phase-2)

DL1

DL2

RPC1

RPC2

RPC3

Building 32Building 33

Building 38/39

CN-DA

KO-DA

Phase-2

3

AC/DC Converter Building

4

Main DC Bus

Bars Reactors

Converter

HV

Transformer

Interconnecting Bus BarsHVAC

Installation

Corridors

31 m x 149 m

13m×11m×7m

KOREAN R&D ON ITERKOREAN R&D ON ITER

AC/DC ConvertersAC/DC Converters

5

Korean Package

No. Item Set InputMax On-load

Output VoltageMax Current

1 TF Converter 1 66kV/50Hz ±650V, ±160V 68kA

2 CS Converters 6 66kV/50Hz ±1050V ±45kA

3 VS Converters 2 66kV/50Hz ±1050V ±22.5kA

4 CCU/L Converters 6 22kV/50Hz ±65V ±10kA

5 CCS Converters 3 22kV/50Hz ±325V ±10kA

6 Dummy Load 1 6.73mH, 45kA(30s)/55kA(20s)/68kA(14s)/7.75kA

7 Master Controller 1 Integrated Controller of Coil Power Supply System

9 Spare 1 For Converters, Master Controllers, Transformers

10 Technical Support during Commissioning

6

Project Schedule and R&D PlanProject Schedule and R&D Plan

20082008 20092009 20102010 20112011 20122012 20132013 20142014 20152015 20162016 20172017 20182018 20192019

1st Delivery1st Delivery

(’14.5)(’14.5)Contract Contract

(’11.7)(’11.7)

Group 1Group 1

(CC/VS/DL)(CC/VS/DL)

Group 1Group 1

(CC/VS/DL)(CC/VS/DL)

Last DeliveryLast Delivery

(’16.12)(’16.12)

Key Key

Milestone Milestone

Key Key

Milestone Milestone

ProcurementProcurement

Schedule Schedule

ProcurementProcurement

Schedule Schedule

PAPA

(’11.3)(’11.3)

R&DR&DR&DR&D

BuildingBuilding

Integrated TestIntegrated TestInstallationInstallation

Manufacturing/FATManufacturing/FAT

CDCD

CACA

PDPD FDFD

FD/MD(1)FD/MD(1)

FD/MD(2)FD/MD(2)

FATFAT

SATSAT

FATFAT

FATFAT

FATFAT

CC / VSCC / VS

CSCS

CS / TFCS / TF

CC/VS/DLCC/VS/DLPDPD

SATSATINSTALL.INSTALL.

Group 2Group 2

(CS/TF)(CS/TF)

Group 2Group 2

(CS/TF)(CS/TF)

PA: Procurement Arrangement

CD: Concept Design

CA: Contract Award

PD: Preliminary Design

FD: Final Design

MD: Manufacturing Design

FAT: Factory Acceptance Test

SAT: Site Acceptance Test

PA: Procurement Arrangement

CD: Concept Design

CA: Contract Award

PD: Preliminary Design

FD: Final Design

MD: Manufacturing Design

FAT: Factory Acceptance Test

SAT: Site Acceptance Test

11stst PlasmaPlasma

(’19.11)(’19.11)

Industry WorksIndustry Works

R&DR&D--11 R&DR&D--22

PCRPCR--187187

(’10.9)(’10.9)

SATSAT

(’18.2)(’18.2)

MasterMaster

ControllerController

MasterMaster

ControllerControllerMaster ControllerMaster Controller

7

R&D-1 and R&D-2

R&D-1R&D-2

R&D-1 R&D-2

8

AC/DC ConverterAC/DC Converter

R&DR&D--11

9

R&D-1: Issues

Mechanical Structure

Clamping Design

Current Sharing of Parallel Devices

Fault Suppression Capability (FSC)

10

6 Pulse Converter Rating

Max. Load Voltage: 1.55 kV

DC Current: 11.25 kA

Converter Capacity: 24 MVA

Maximum Fault Current 175 kA (FDR2001)

Number of Thyristors

per arm7+1

Thyristor Type 5 inches

Thyristor Peak

Forward/Reverse Voltage5.2 kV

R&D-1: Design PARAMETERS

11

Mechanical Structure for AC/DC Bus Bar

R&D-1: Mechanical Structure

AC BusAC Bus

DC Bus

AC Bus

DC Bus

DC Bus

DC Bus

DC Bus

AC Bus

DC Bus

DC Bus

AC Bus

12

R&D-1: Clamping Design

Double-side clamping design (left) and pressure distribution (right)

Single-side clamping design (left) and pressure distribution (right)

Thyristor Clamping Pressure

110kN±15% (9~12.18MPa)

115 mm (Diameter)

13

R&D-1: Fabricated Unit

Single Phase Thyristor Rectifier (1:6 Scale)

Size: 2.1(W)x1.5(D)x2.7(H) m

Weight: 2.5 ton

14

3D Design Fabricated Unit

1.0

1.1

1.2

1.3

1.4

1.5

1.6

0 50 100 150 200

Cu

rren

t Im

ba

lan

ce F

act

or

Peak Current (kA)

R&D-1: Current Sharing

A

B

B: Detail Waveform of FSC condition

A: Current Imbalance of 1.5 at rated value

B: Current Imbalance of 1.1 at FSC value

15

R&D-1: FSC Test

16

Thyristor I2t = 50-55 MA2s

Thyristor Surge Current > 100 kA

Measured Data

- Arc Voltage : 2.24 kV

- I2t (melting) = 6.25 MA2s

- I2t (total) = 9.11 MA2s

- Breaking Current = 83.5 kA

- Pre-arc RMS Current = 44.1 kA

- Melting time = 3.2 ms

- Clearing time = 5.1 ms

Ferraz Fuse

1550 V, 2800 A, 17.8 MA2s

AC/DC ConverterAC/DC Converter

R&DR&D--22

17

R&D-2: Issues

Current Sharing Improvement

Structural Design for Full Scale Unit

Rated Current Test for 6-Pulse Converter

Installation and Maintenance

18

R&D-2: Design Parameters

6 Pulse Converter Rating

Max. Load Voltage: 1.35 kV

DC Current: 25 kA

Converter Capacity: 32 MVA

FSC Level 150 kA (DC terminal short)

No. of Thyristors per arm 9+1

Thyristor Type 5 inches

Thyristor Peak

Forward/Reverse Voltage5.2 kV

19

R&D-2: Current Sharing Improvement

20

[9 kA, CH1~8: 200 A/div, CH9~10: 2 kA/div]

9 kA

[21 kA, CH1~8: 500 A/div, CH9~10: 5 kA/div]

21 kA

Transformer for Test

R&D-2: Structural Design for Full Scale Unit

Horizontal Layer (2011)

~2.8x4x3m

Stacked 2 Layers (2010)

~4x3x6m

Integrated 2 layers (2009)

~2.5x1.5x3.9m

For Ease of Fabrication and Maintenance!

21

R&D-2: Structural Cooling Design

AC Bus Bar Cooling Path DC Bus Bar Cooling Path

22

R&D-2: Structural Seismic Analysis

Natural Frequency (Mode 1) = 11.558Hz > 1.3×(6~7Hz)

Mode 1Mode 2

23

R&D-2: Structural EM Force

Max. Stress at Tie Rod = 20 MPa < 111.8 MPa

(σmax=20 MPa, δmax=0.35 mm)

EM Force @ 500 kA

d

LIIF

21

7102

24

R&D-2: Fabricated Converter Module

Full Scale 6-Pulse Converter Unit

25

R&D-2: Rate Current Test Circuit

26

R&D-2: Rated Current Test Configuration

30 kA Current Test Configuration of 6-Pulse Converter Unit

27

R&D-2: Rated Current Test Result

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05-500

0

500

1000

1500

2000

2500

3000

3500

4000

4500

Time [sec.]

Curr

ent

[A]

data1

data2

data3

data4

data5

data6

data7

data8

data9

data10

< R phase Current>

< R Phase Imbalance>

1 2 3 4 5 6 7 8 9 10700

750

800

850

900

950

1000

1050

1100

1150

1200

1250

Channel

Curr

ent

[A]

120%

80%

< S Phase Current>

< S Phase Imbalance>

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05-500

0

500

1000

1500

2000

2500

3000

3500

4000

4500

Time [sec.]

Curr

ent

[A]

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

CH9

CH10

1 2 3 4 5 6 7 8 9 10700

750

800

850

900

950

1000

1050

1100

1150

1200

1250

Channel

Curr

ent

[A]

120%

80%

< T Phase Current>

< T Phase Imbalance>

0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05-500

0

500

1000

1500

2000

2500

3000

3500

4000

4500

Time [sec.]

Curr

ent

[A]

CH1

CH2

CH3

CH4

CH5

CH6

CH7

CH8

CH9

CH10

1 2 3 4 5 6 7 8 9 10700

750

800

850

900

950

1000

1050

1100

1150

1200

1250

Channel

Curr

ent

[A]

120%

80%

28

R&D-2: Installation Plan

29

R&D-2: Maintenance Plan

30

KOREAN R&D ON KOREAN R&D ON

THE CONVERTER CONTROLLER FOR THE CONVERTER CONTROLLER FOR

ITER AC/DC CONVERTERSITER AC/DC CONVERTERS

WED Poster SP3WED Poster SP3--3838

31

ITER Converter Controller R&D

260μsec80μsec

T2T1

Double DSP interrupt timing

1msec

T3

1 kHz Fast Control Test

Circulation Current Simulation and Test

32