Combinational Logic Circuits

1. The two general forms for logic expressions are the sum-of-products form and the product-of-

sums form.

2. One approach to the design of a combinatorial logic circuit is to (1) construct its truth table, (2)

convert the truth table to a sum-of-products expression, (3) simplify the expression using

Boolean algebra or K mapping, (4) implement the final expression.

3. The K map is a graphical method for representing a circuit’s truth table and generating a

simplified expression for the circuit output.

4. And exclusive-OR circuit has the expression 𝑥 = 𝐴�̅� + 𝐴̅𝐵. Its output 𝑥 will be HIGH only when

inputs 𝐴 and 𝐵 are at opposite logic levels.

5. And exclusive-NOR circuit has the expression 𝑥 = 𝐴̅�̅� + 𝐴𝐵. Its output 𝑥 will be HIGH only when

inputs 𝐴 and 𝐵 are at the same logic levels.

6. Each of the basic gates (AND, OR, NAND, NOR) can be used to enable or disable the passage of

an input signal to its output.

7. The main digital IC families are the TTL and CMOS families. Digital ICs are available in a wide

range of complexities (gates per chip), from the basic to the high-complexity logic functions.

8. To perform basic troubleshooting requires—at minimum—an understanding of circuit

operation, a knowledge of the types of possible faults, a complete logic-circuit connection

diagram, and a logic probe.

9. A programmable logic device (PLD) is an IC that contains a large number of logic gates whose

interconnections can be programmed by the user to generate the desired logic relationship

between inputs and outputs.

10. To program a PLD you need a development system that consists of a computer, PLD

development software, and a programmer fixture which does the actual programming of the PLD chip.

Flip-Flops and Related Devices

1. A flip-flop is a logic circuit with a memory characteristic such that its 𝑄 and �̅� outputs will go to

a new state in response to an input pulse and will remain in that new state after the input pulse

is terminated.

2. A NAND latch and a NOR latch are simple FFs that respond to logic levels on their SET and CLEAR

inputs.

3. Clearing (resetting) a FF means that its output ends up in the 𝑄 = 0/�̅� = 1 state. Setting a FF

means that it ends up in the 𝑄 = 1/�̅� = 0 state.

4. Clocked FFs have a clock input (CLK, CP, CK) that is edge-triggered, meaning that it triggers the

FF on a positive-going transition (PGT) or a negative-going transition (NGT).

5. Edge-triggered (clocked) FFs can be triggered to a new state by the active edge of the clock

input according to the state of the FF’s synchronous control inputs (S, C or J, K or D).

6. Most clocked FFs also have asynchronous inputs that can set or clear the FF independently of

the clock input.

7. The D latch is a modified NAND latch that operates like a D flip-flop except that it is not edge-

triggered.

8. Some of the principal uses of FFs include data storage and transfer, data shifting, counting, and

frequency division. They are used in sequential circuits that follow a predetermined sequence

of states.

9. A one-shot is a logic circuit that can be triggered from its normal resting state (𝑄 = 0) to its

triggered state (𝑄 = 1) where it remains for a time interval proportional to an RC time constant.

10. Circuits that have a Schmitt-trigger type of input will respond reliably to slow-changing signals

and will produce outputs with clean, sharp edges.

11. A variety of circuits can be used to generate clock signals at a desired frequency including

Schmitt-trigger oscillators, a 555 timer, and a crystal-controlled oscillator.

12. A complete summary of the various types of FFs can be found on the inside front cover.

13. Programmable logic devices can be programmed to operate as latching circuits and sequential circuits.