EE-321 N

Lecture-16

Digital Firing Scheme

Functional Block Diagram

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Oscillator fc

N-bit counter

Flip Flop

Logic Control

Unit

Driver Stage

Preset input

Clock

Overflow set

Enable

B

B Reset

Zero Crossing Detector

Reset

A A X

To Thyristor Gate

(Ā)

(T2)

(A)

Logic control driver block

Waveforms

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Operation

• Above figure shows the basic block diagram of a digital firing scheme

• It can be used to trigger single ph controlled rectifiers or AC regulators

• Same principle can be extended to inverters & choppers

• It consists of a presettable counter, oscillator, ZCD, F/F & a logic control unit with NAND/AND functions

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Operation...contd

• The counter is preset to the decimal equivalent value N of the control signal at each zero crossing of the supply voltage

• Then the counter starts counting down @ fc per second

• When the count becomes zero it gives overflow signal which sets the F/F & its o/p states B & B change accordingly

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Operation...contd

• With the help of F/F & a logic control & driver stage, the trigger pulses for thyristors T1 & T2 are produced

• By varying the preset i/p, it is possible to control the firing angle

• The logic variable X = 0 or 1 enables to select the pulse duration either from α to π or α to π + α (Above waveforms are for X = 0)

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Expression for firing angle

Let

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t1 = overflow instant

Th = Duration of half cycle of AC supply

n = No. of bits in the binary counter

N = Decimal equivalent of control signal

fc = Oscillator frequency

Contd...

The total no. of possible states of the counter is 2n

To cover the entire range of α from 0°-180° it is required that

fcTh = 2n

Also t1 = (N/2n)Th, so firing angle is given by

α = (N/2n) 180°

But this is valid only when oscillator is synchronized with ZCD otherwise the max. possible error in α is

emax = 180°/2n

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