l320-diffoutputopamps-2up

Lecture 320 – Differential Output Op Amps (3/27/02) Page 320-1

ECE 6412 - Analog Integrated Circuit Design - II © P.E. Allen - 2002

LECTURE 320 – DIFFERENTIAL OUTPUT OP AMPS(READING: AH – 384-393, GHLM – 808-857)

ObjectiveThe objective of this presentation is:1.) Design and analysis of differential output op amps2.) Examine the problem of common mode stabilizationOutline• Advantages and disadvantages of fully differential operation• Six different differential output op amps• Techniques of stabilizing the common mode output voltage• Summary



Why Differential Output Op Amps?

• Cancellation of common mode signals including clock feedthrough

• Increased signal swing

v1

v2

v1-v2t

t

t

A

-AA

-A

2A

-2A Fig. 7.3-1

• Cancellation of even-order harmonics

Symbol:

-

+vin vout+

-

-

+

-

+

Fig. 7.3-1A



Common Mode Output Voltage StabilizationIf the common mode gain not small, it may cause the common mode output voltage to

be poorly defined.Illustration:

VDD

vod

t

Fig. 7.3-2

VSS

0

VDD

vod

t

VSS

0

VDD

vod

t

VSS

0

CM output voltage = 0

CM output voltage =0.5VDD

CM output voltage =0.5VSS



Two-Stage, Miller, Differential-In, Differential-Out Op Amp

vi1 M1 M2

M3 M4

M5

M6M8

VDD

VSS

VBN+-

Cc

M9

Cc

VBP+-

vi2

vo1vo2RzRz

M7

Fig. 7.3-3

Output common mode range (OCMR) = VDD+ |VSS| - VSDP(sat) - VDSN(sat)

The maximum peak-to-peak output voltage ≤ 2·OCMRConversion between differential outputs and single-ended outputs:

vod CL

+

-+-+

-vid

+

-vo1 2CL

+

-+-+

-vid

+

-

vo2+

-2CL

Fig. 7.3-4

Lecture 320 – Differential Output Op Amps (3/27/02) 20-5


Differential-Output, Folded-Cascode, Class-A Op Amp

VDD

VSS

R1

M14

R2

M8

M10VBias

vi1 vi2 vo1vo2M1 M2

M3

M4 M5

M7M6

M9

M11

M12

M13

M15

M16

M17Fig. 7.3-5

OCMR = VDD + |VSS| - 2VSDP(sat) -2VDSN(sat)



Two-Stage, Miller, Differential-In, Differential-Out Op Amp with Push-Pull Output

vi1M1 M2

M3 M4

M5

M6

M7

VDD

VSS

VBN+

-

Cc

M9

Cc

VBP+-

vi2

vo1 vo2RzRz

M8

Fig. 7.3-6

M10 M12

M13

M14

Comments:• Able to actively source and sink output current• Output quiescent current poorly defined



Two-Stage, Differential Output, Folded-Cascode Op Amp

VDD

VSS

R1

M16 M8

M10

VBias

vi1 vi2vo1vo2 M1 M2

M3

M4 M5

M7M6

M9

M11

M14 M15

M12 M13

CcRz CcRz

M17

M18

M19

M20

Fig. 7.3-7A

Note that the followers M11-M13 and M10-M12 are necessary for level translation to theoutput stage.



Unfolded Cascode Op Amp with Differential-Outputs

VDD

VSS

VBias

R2 M22

M23

R1

M19

M20

M1 M2

M3 M4M5 M6M7 M8

M9 M10

M11

M12M13

M14

M15 M16M17

M18

M21

vo1vi1 vi2

vo2

Fig. 7.3-8



Cross-Coupled Differential Amplifier StageOne of the problems with some of the previous stages, is that the quiescent output currentwas not well defined.The following input stage solves this problem.

M1 M2

M3 M4

VGS2

VSG4

VGS1

VSG3

i1

i1i2

i2

vi1 vi2

Fig. 7.3-9

vGS1+

-

vSG4+

-vSG3

+

-

vGS2+

-

Operation:Voltage loop vi1 - vi2 = -VGS1+ vGS1 + vSG4 - VSG4 = VSG3 - vSG3 - vGS2 + VGS2

Using the notation for ac, dc, and total variables gives,vi2 - vi1 = vid = (vsg1 + vgs4) = -(vsg3 + vgs2)

If M1 = M2 = M3 = M4, then half of the differential input is applied across each transistorwith the correct polarity.

∴ i1 = gm1vid

2 = gm4vid

2 and i2 = -gm2vid

2 = -gm3vid

2



Class AB, Differential Output Op Amp using a Cross-Coupled Differential InputStage

M1 M2

M3 M4

M5 M6

M7

VDD

VSS

VBias+

-

R1

M24

M25

R2

M27

M28

M8M9 M10

M11 M12

M13

M14

M15

M16

M17 M18

M19 M20

M21 M22

M26

M23

vo2

vi2vi1

vo1

Fig. 7.3-10

Quiescent output currents are defined by the current in the input cross-coupleddifferential amplifier.



Common-Mode Output Voltage Stabilization

VDD

VSS

io2(source)

io2(sink)

io1(source)

io1(sink)

Ro1

Ro3

Ro2

Ro4

M1 M2Common-modefeedback circuit

vo1 vo2

Fig. 7.3-11

Model of output of differentialoutput op amp

Operation:M1 and M2 sense the common-mode output voltage.If this voltage rises, the currents in M1 and M2 decrease.This decreased current flowing through Ro3 and Ro4 cause the common-mode outputvoltage to decrease with respect to VSS.



Two-Stage, Miller, Differential-In, Differential-Out Op Amp with Common-ModeStabilization

vi1 M1 M2

M3 M4

M5

M6M7

VDD

VSS

VBN+-

Cc

M9

Cc

VBP

+

-

vi2

vo1vo2RzRz

M8

Fig. 7.3-12

M10 M11

Comments:• Simple• Unreferenced



A Referenced Common-Mode Output Voltage Stabilization Scheme

VDD

VSS

M1 M2M3 M4

M5 M6

Vocm To correctioncircuitry

vo1 vo2

I5I6

Iocm

Fig. 7.3-13

Operation:1.) The desired common-mode output voltage, Vocm, creates Iocm.

2.) The actual common-mode output voltage creates current I5 which is mirrored to I6 .

3.) If M1 through M4 are matched and the current mirror is ideal, then when Iocm = I6the actual common-mode output voltage should be equal to the desired common-mode output voltage.

4.) The above steps assume that a correction circuitry exists that changes the common-mode output voltage in the correct manner.



Common Mode Feedback CircuitsImplementation of common mode feedback circuit:

v1M1 M2

M3 M4

M5

VDD

VSS

IBias

VCM

v4v3

v2

MC2A

MC2B

MC1

MC3

MC4

MC5MB

I3 I4

IC4IC3

Fig. 7.3-13A

Common-mode feed-back circuit

Self-resistancesof M1-M4

This scheme can be applied to any differential output amplifier.Caution:

Be sure to check the stability of common-mode feedback loops, particularly those thatare connected to op amps that have a cascode output. The gain of the common-modefeedback loop can easily reach that of a two-stage amplifier.



Common Mode Feedback Circuits – ContinuedThe previous circuit suffers in performance when the differential output voltage becomestoo large and one of the MC2A-MC2B transistors shuts off.The following circuit alleviates this disadvantage:

v1M1 M2

M3 M4

M5

VDD

VSS

IBias

VCM

v4v3

v2MC2MC1

MC3

MC4

MC5MB

I3 I4

IC4IC3Common-mode feed-back circuit

RCM1 RCM2

Fig. 7.3-15New



External Common-Mode Output Voltage Stabilization Scheme for Discrete-TimeApplications

Ccm+

-+-+

-vid

vo1

vo2CMbias

φ1 φ2

Ccm Vocm

φ1 φ2

φ1

φ1

φ1 Fig. 7.3-14

Operation:1.) During the φ1 phase, both Ccm are charged to the desired value of Vocm and CMbias

= Vocm.

2.) During the φ2 phase, the Ccm capacitors are connected between the differentialoutputs and the CMbias node. The average value applied to the CMbias node will beVocm.



SUMMARY• Advantages of differential output op amps:

- 6 dB increase in signal amplitude

- Cancellation of even harmonics

- Cancellation of common mode signals including clock feedthrough• Disadvantages of differential output op amps:

- Need for common mode output voltage stabilization

- Compensation of common mode feedback loop

- Difficult to interface with single-ended circuits• Most differential output op amps are truly balanced• For push-pull outputs, the quiescent current should be well defined• Common mode feedback schemes include,

- Unreferenced

- Referenced

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