lab manual seq detector

7/31/2019 Lab Manual Seq Detector

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Sequence Detector

Introduction

This lab includes implementation of a sequence detector on the Spartan-3E starter board. The

sequence detector will look for the input series 10010. LEDs will show how much of the series hasbeen detected and when the entire series has been entered an additional LED will come on. Circuit

input will be controlled with a reset button, a button that sends a clock pulse and a switch that will

enter a 1 or a0.

ISE Version:9.2i or 10.1i

Objective

The objective of this tutorial is to introduce the use ofsequential logic. The sequence is a sequential

circuit. In sequential logic the output depends on the current input values and also the previousinputs.

When describing the behavior of a sequential logic circuit we talk about the state of the circuit. Thestate of a sequential circuit is a result of all previous inputs and determines the circuits output and

future behavior. This is why sequential circuits are often referred to as state machines.

Most sequential circuits (including our sequence detector) use a clock signal to control when thecircuit changes states. The inputs of the circuit along with the circuits current state provide the

information to determine the circuits next state. The clock signal then controls the passing of thisinformation to the state memory. The output depends only on the circuits state, this is known as a

Moore Machine. Figure 1 on the next page shows the schematic of a Moore Machine.

Figure 1 Schematic of a clocked synchronous state machine (Moore Machine).


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Project Location click the button with the three dots and navigate to where you want the project tobe located. Under Top-Level Source Type: make sure HDL is selected and then click Next>.

2. In the Device Properties window copy the settings from figure 3 and then click Next>.

Figure 3 New Project Wizard - Device Properties settings.

3. Click Next> on the Create New Source window. Click Next>.4. Click Ok and click Finish on the Project Summary window. You have created the project

and in the workspace window of ISE you should see a project summary. You can close the

project summary by going under the File menu and selecting Close.

5. In the Sources window, right click on the small box with the - symbol and click new source toopen a new VHDL Source file in your project. Write your source code here and save it. One can

add as many files required in the project by the same process.

6. After saving your project click Synthesis in the process window. Once synthesis is donesuccessfully. Next step is to check the functionality of your design.

7. Right click on your project file and click new source, add test bench waveform and associate itwith your design file. This will open a waveform associated with your design. Force the valid

input values and save it.

8. Go to the pulldown menu in the Sources window and select Behavioral Simulation.


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Figure 4 Pulldown menu in Sources window.

9. Highlight the .tbw file in the Sources window by clicking on it. In the Processes window, click on

the small box with the + symbol that is next to the Xilinx ISE Simulator toolbox and then

double click Simulate Behavioral Model to start the simulation. When you are done, closeSimulation Window.

9. Go to the Source window pulldown menu and select Synthesis/Implementation and then clickon source file (VHDL Design File) to highlight it. In the Processes window expand the User

Constraints toolbox and double click Edit Constraints (Text). This will open.ucf in the ISE

workspace.

Figure 5 Opening the UCF file.


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The user constraints file has been notated to show what board features have been connected to the

inputs and outputs of VHDL Design File.

Figure 6 The UCF file displayed in the ISE workspace.

10.It is time to program the Spartan 3E board. In the Processes window you have to run theSynthesize - XST, Implement Design, and Generate Programming File processes. Insteadof doing each one separately, you can double click on Generate Programming File. This willrun all the processes.

Figure 7 Running processes


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As the processes finish running they will be marked with a green checkmark to indicate no

problems were encountered. The Implement Design process may generate warnings (yellow

triangle with an exclamation point), warnings can be ignored.

11.Connect the Spartan 3E board to the computer and turn the boards power on. Expand theGenerate Programming File process and double click on Configure Device (iMPACT). This

will launch the iMPACT program. Click Finish on the Welcome to iMPACT window.

Figure 8 Starting iMPACT

iMPACT will perform a boundary scan and will display three devices in the ISE workspace.

Pictures of Xilinx IC packages represent the devices. In figure 9 you can see that no files areassociated with the packages.

Figure 9 Devices shown in boundary scan

You have to assign the .bit file to the Spartan 3Es FPGA. The FPGA is represented in the

workspace by the picture of the Xilinx package labeled xc3s500e. The package should already

be highlighted (as in figure 9).


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Click on top_sequence.bit in the Assign New Configuration File window and then click theOpen button. The file is now associated with the FPGA and the next device is highlighted.

Figure 10 Assigning *.bit file to xc3s500e.

Click Bypass for the next two devices since we are not programming them and then click on anempty area inside the ISE workspace. Now right click on the xc3s500e and select Program

from the drop down menu.

Figure 11 Programming the FPGA.

Click Ok on the Programming Properties window (nothing needs to be selected for thistutorial). After the FPGA is programmed a Program Succeeded message will be displayed in

the ISE workspace and a yellow LED will show the Spartan 3E has been configured.

12.The Spartan 3E is programmed as a sequence detector. The board will hold this program until thepower is turned off, the reset button near the yellow LED is pressed, or you reprogram the board.

lab manual seq detector

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