lecture 17 given
TRANSCRIPT
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8/13/2019 Lecture 17 Given
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EL 511 VLSI Design1
EL 511VLSI Design
Instructor:Mazad S. Zaveri
Faculty Block 4, Room 4206
Email: [email protected]://intranet.daiict.ac.in/~mazad_zaveri/
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8/13/2019 Lecture 17 Given
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EL 511 VLSI Design2
CMOS Inverter Complementary (pair) of NMOS and
PMOS transistor The PMOS and NMOS will be in some
region of operation depending on V in andVout values Conditions for finding out various regions of
operation shown in the table
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EL 511 VLSI Design3
Inverter - VTC
Voltage Transfer Characteristics
Also called DCcharacteristics How the input and output
voltage are related Vout = f (Vin)
We divide the VTC intosome regions, based on
PMOS and NMOSregions of operation See table in next slide
The VTC shown here is forPMOS and NMOS (withideal IV characteristics),and also:
Vtn = - Vt p n=p
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EL 511 VLSI Design4
Vgsp = -0.9
Vgsn = 0.9
Maximum current
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EL 511 VLSI Design5
Summary of CMOS inverter operation
For ideal transistors, region C will exist only for one particular value ofVin=Vdd/2, and slope of VTC may be infinite at this point But real transistors, (in SAT), in region C, will have channel length modulation,
and have some resistance So region C will be broader, and have some finite slope
In regions A and E, either the NMOS or PMOS is OFF, and hence zerocurrent will flow through the inverter This feature is the most important when assuming CMOS technology has
(ideally) zero static power In regions B, C, D, the inverter has a direct current path from V DD to GND,
and consumes static power The point where V in = Vout is called the inverter input threshold
The input threshold of the gate is weakly sensitive to temperature Because both mobility and threshold voltage of the transistors will decrease with
temperature
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EL 511 VLSI Design6
Simulated VTC Notice region C here, it has broadened Inverter threshold voltage (V TH)
The intersection of Vin=Vout line (slope = 1), with the VTC characteristics
To obtain V TH=Vin=Vout =VDD/2 The W/L of PMOS has to be 2 times larger than W/L of the NMOS
To take care of the relative difference in hole/electron mobilities
Also assume Vt n = -(Vt p)
S l o p e = 1
Inverter ThresholdVoltage (V TH)
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EL 511 VLSI Design7
NMOS-OFFPMOS-LIN
NMOS-SATPMOS-LIN
NMOS-SATPMOS-SAT
NMOS-LINPMOS-SAT
NMOS-LINPMOS-OFF
VDD+VtpVtn
NMOS SAT-LIN Boundary
PMOS LIN-SAT Boundary
E q u a t i o
n o f t h
i s l i n e
V o u t = V i
n - V t p
E q u a t i o n
o f t h i s
l i n e
V o u t = V i
n - V t n
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EL 511 VLSI Design8
NMOS-OFFPMOS-LIN
NMOS-SATPMOS-LIN
NMOS-SATPMOS-SAT
NMOS-LINPMOS-SAT
NMOS-LINPMOS-OFF
VDD+VtpVtn
NMOS SAT-LIN Boundary
PMOS LIN-SAT Boundary
P1 P2
P3
P4 P5
0.9
Trace these pointson the NMOS andPMOS IVcharacteristics
(see next slide)
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8/13/2019 Lecture 17 Given
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EL 511 VLSI Design9
Inverter:Tracing Operating Points on NMOS I-V Characteristics
The NMOS in the inverter goes though the various regions of operation of the inverter How to interpret the same in the NMOS IV Characteristics?
Try to plot the various point on this plot, after assuming the corresponding points on the earlier slide
P1
Vgs = 0.3
P2
P3
P4P5
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8/13/2019 Lecture 17 Given
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EL 511 VLSI Design10
Inverter:Tracing Operating Points on PMOS I-V Characteristics
P1
P2P3
P4P5
50
300
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EL 511 VLSI Design11
Topics from book 2.5.1 (This is from the djvu e-book that I
uploaded on daiictpdc) You can find the equivalent topic no. in the
Indian edition of the book
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8/13/2019 Lecture 17 Given
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EL 511 VLSI Design12
Transfer Characteristics of Skewed Inverters
For equal betas (and Vt n= -Vt p) Inverter threshold = Vdd/2 Allows a capactive load to charge and discharge in equal times
High Skew Inverter Stronger PMOS If input is Vdd/2, then output is
greater than Vdd/2 Inverter input threshold is higher PMOS opposes the falling of the
output! As Vin goes from 0 to Vdd
Low Skew Inverter Stronger NMOS If input is Vdd/2, then output is
less than Vdd/2 Inverter input threshold is lower NMOS opposes the rising of the
output As Vin goes from Vdd to 0
Skewing is generally done bychanging W, and fixing L to aminimum
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EL 511 VLSI Design13
Other type of inverters?
Resistive load NMOS inverter Always ON (PMOS) load NMOS inverter
Gate-drain shorted (NMOS) load NMOS inverter Biased (NMOS) load NMOS inverter Gate-drain shorted (PMOS) load NMOS inverter
Problem with these inverters? Power consuming (static power) Current flows whenever the lower NMOS is ON
Such inverters are also called ratio-ed inverters Because their VTC depends on the ratio of the strength of thepull-up device to the strength of the pull-down NMOS