lecture 25: cs, cd and cg circuitsee105/sp04/handouts/lectures/lecture25.pdf · eecs 105 spring...

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Department of EECS University of California, Berkeley

EECS 105 Spring 2004, Lecture 25

Lecture 25: CS, CD and CG circuits

Prof J. S. Smith


EECS 105 Spring 2004, Lecture 25 Prof. J. S. Smith

Context

In today’s lecture, we will discuss the various ways that a transistor can be used as a component in active linear circuits, to amplify, act an impedance buffer, and so on.

These simple circuits will then be used as building blocks for building more complex circuits.

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Reading

For about a week, we will continue with chapter 8 in the text, single stage amplifiers. We will focus primarily on FET circuits, Common Source(CS) , Common Gate (CG), and Common Drain(CD), sections: 8.1,8.3, 8.4, 8.5, 8.8, 8.9

Following single transistor configurations, we will start discussing multistage and cascaded circuits, which are in chapter 9 of the text.



Lecture Outline

MOS Common Source AmpCurrent Source Active LoadCommon Gate AmpCommon Drain Amp

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Common-Source Amplifier

Isolate DC level



Configurations (CS)

Since the transistor is a three terminal device, we can make a two port device (input and output) but one of the terminals is going to have to be used for both the input and the output ports. The terminology follows…Common Source (CS)

– Provides current and voltage gain– Example: an NMOS device with the source grounded,

the input being a voltage between the gate and ground, and the output being a voltage between the drain and ground.

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CD

Common Drain (CD): high impedance input and low impedance output. Low voltage gainExample: An NMOS transistor with its Drain at +rail, with an input applied between the gate and (ground/+rail, the same for small signal analysis), and the output taken from the source with reference to ground.Example: A PMOS transistor with its Drain at ground, the input applied between the gate and ground, and the output taken from the source with reference to ground



CG

Common Gate, provides a low impedance input, and a high impedance output. (converts a weak current source to a strong current source)The gate is held at small signal ground, while the input is applied at the source, and the output is taken at the drain.Low current gain

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Common source

In the common source amplifier, the input is used to modulate the GS voltage, and the DS voltage is the output, giving a voltage gain depending on the load line:



Load-Line Analysis to find Q

Q

D

DD outR

D

V VIR−

=

110k

slope =

0V10kDI =

5V10kDI =

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Small-Signal Analysis

inR = ∞



sv

sR

inRoutR LRm inG v

inv+

−

Two-Port Parameters:

Find Rin, Rout, Gm

inR = ∞

m mG g= ||out o DR r R=

Generic Transconductance Amp

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Two-Port CS Model

Reattach source and load one-ports:



Maximize Gain of CS Amp

Increase the gm (more current)Increase RD (free? Don’t need to dissipate extra power)Limit: Must keep the device in saturation

For a fixed current, the load resistor can only be chosen so largeTo have good swing we’d also like to avoid getting to close to saturation

||v m D oA g R r= −

,DS DD D D DS satV V I R V= − >

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Current Source Supply

Solution: Use a current source!Current independent of voltage for ideal source



CS Amp with Current Source Supply

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Load Line for DC Biasing

Both the I-source and the transistor are idealized for DC bias analysis



Two-Port Parameters

From currentsource supply

inR = ∞

||out o ocR r r=

m mG g=

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P-Channel CS Amplifier

DC bias: VSG = VDD – VBIAS sets drain current –IDp = ISUP



Two-Port Model Parameters

Small-signal model for PMOS and for rest of circuit

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Common Gate Amplifier

DC bias:

SUP BIAS DSI I I= =



CG as a Current Amplifier: Find Ai

out d ti i i= = −

1iA = −

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CG Input Resistance

At input:

Output voltage:

t outt m gs mb t

o

v vi g v g vr

⎛ ⎞−= − + + ⎜ ⎟

⎝ ⎠( || ) ( || )out d oc L t oc Lv i r R i r R= − =

gs tv v= −

( )||t oc L tt m t mb t

o

v r R ii g v g v

r⎛ ⎞−

= + + ⎜ ⎟⎝ ⎠



Approximations…

We have this messy result

But we don’t need that much precision. Let’s start approximating:

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||1

m mbt o

oc Lin t

o

g gi r

r RR vr

+ += =

+

1m mb

o

g gr

+ >> ||oc L Lr R R≈ 0L

o

Rr

≈

1in

m mb

Rg g

=+

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CG Output Resistance

( ) 0s s tm gs mb s

S o

v v vg v g vR r

−− − − + =

1 1 ts m mb

S o o

vv g gR r r

⎛ ⎞+ + + =⎜ ⎟

⎝ ⎠



CG Output Resistance

Substituting vs = itRS

1 1 tt S m mb

S o o

vi R g gR r r

⎛ ⎞+ + + =⎜ ⎟

⎝ ⎠

The output resistance is (vt / it)|| roc

|| 1oout oc S m o mb o

S

rR r R g r g rR

⎛ ⎞⎛ ⎞= + + +⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

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Approximating the CG Rout

The exact result is complicated, so let’s try tomake it simpler:

Sgm µ500≈ Sgmb µ50≈ Ω≈ kro 200

][|| SSombSomoocout RRrgRrgrrR +++=

][|| SSomoocout RRrgrrR ++≅

Assuming the source resistance is less than ro,

)]1([||][|| SmoocSomoocout RgrrRrgrrR +=+≈



CG Two-Port Model

Function: a current buffer• Low Input Impedance• High Output Impedance

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Common-Drain Amplifier

21 ( )2DS ox GS T

WI C V VL

µ= −

2 DSGS T

ox

IV V WCL

µ= +

Weak IDS dependence



CD Voltage Gain

Note vgs = vt – vout||

outm gs mb out

oc o

v g v g vr r

= −

( )||

outm t out mb out

oc o

v g v v g vr r

= − −

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CD Voltage Gain (Cont.)

KCL at source node:

Voltage gain (for vSB not zero):

( )||

outm t out mb out

oc o

v g v v g vr r

= − −

1|| mb m out m t

oc o

g g v g vr r

⎛ ⎞+ + =⎜ ⎟

⎝ ⎠

1||

out m

inmb m

oc o

v gv g g

r r

=+ +

1out m

in mb m

v gv g g

≈ ≈+



CD Output Resistance

Sum currents at output (source) node:

|| || tout o oc

t

vR r ri

= t m t mb ti g v g v= +

1out

m mb

Rg g

≈+

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CD Output Resistance (Cont.)

ro || roc is much larger than the inverses of the transconductances ignore

1out

m mb

Rg g

≈+

Function: a voltage buffer• High Input Impedance• Low Output Impedance



lecture 25: cs, cd and cg circuitsee105/sp04/handouts/lectures/lecture25.pdf · eecs 105 spring...

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