lecture 5 logical vector

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Rajiv Kumar Rajiv Kumar 1 Distributed Computing Logical Clock Causal Ordering Rajiv Kumar Computer Science & Engineering Department School of Engineering & Technology Gr. Noida

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Page 1: Lecture 5 Logical vector

8/7/2019 Lecture 5 Logical vector

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Rajiv Kumar Rajiv Kumar 11

Distributed ComputingLogical Clock

Causal Ordering

Rajiv Kumar 

Computer Science & Engineering DepartmentSchool of Engineering & Technology

Gr. Noida

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Rajiv Kumar Rajiv Kumar 22

Theoretical AspectsTheoretical Aspects

� Logical Clocks

� Vector Clocks

� Causal Ordering

� Global State Recording� Termination Detection

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Why do we need global clocks?Why do we need global clocks?

� For causally ordering events in a distributedsystem

� Example:

� Transaction T transfers Rs 10,000 from S1 to S2

� Consider the situation when:

� State of S1 is recorded after the deduction andstate of S2 is recorded before the addition

� State of S1 is recorded before the deduction andstate of S2 is recorded after the addition

� ± � � ± ±

Rajiv Kumar Rajiv Kumar 33

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Rajiv Kumar Rajiv Kumar 44

� Happened before relation:

± a -> b : Event a occurred before event b. Events in the same

process.

± a -> b : If a is the event of sending a message m in a

process and b is the event of receipt of the same messagem by another process.IO

± a -> b, b -> c, then a -> c. ³->´ is transitive.

� Causally Ordered Events

± a -> b : Event a ³causally´ affects event b

� Concurrent Events

± a || b: if a !-> b and b !-> a

Lamport¶s ClockLamport¶s Clock

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Ordering of Events

Ordering of Events

Lamport¶s Happened Before relationship

For two events a and b, a b if 

� a and b are events in the same processand a occurred before b, or 

� a is a send event of a message m and b is

the corresponding receive event at thedestination process, or 

� a c and c b for some event c 

Rajiv Kumar Rajiv Kumar 55

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Causally Related versus ConcurrentCausally Related versus Concurrent

Rajiv Kumar Rajiv Kumar 66

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Rajiv Kumar Rajiv Kumar 77

Logical ClocksLogical Clocks

� Conditions satisfied:± Ci is clock in Process Pi.

± If a -> b in process Pi, Ci(a) < Ci(b)

± Let a: sending message m in Pi; b : receiving message m inPj; then, Ci(a) < Cj(b).

� Implementation Rules:± R1: Ci = Ci + d (d > 0); clock is updated between two

successive events.

± R2: Cj = max(Cj, tm) + d; (d > 0); When Pj receives amessage m with a time stamp tm (tm assigned by Pi, the

sender; tm = Ci(a), a being the event of sending messagem).

� A reasonable value for d is 1

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Lamport¶s Logical ClockLamport¶s Logical Clock

Rajiv Kumar Rajiv Kumar 88

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How Lamport¶s clocks advanceHow Lamport¶s clocks advance

Rajiv Kumar Rajiv Kumar 99

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Points to noteP

oints to note

� if a b, then C(a) < C(b)

� is a partial order 

Rajiv Kumar Rajiv Kumar 1010

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Limitation of Lamport¶s ClockLimitation of Lamport¶s Clock

� a b implies C(a) < C(b)

BUT� C(a) < C(b) doesnµt imply a b

S o not a true clock !! 

Rajiv Kumar Rajiv Kumar 1111

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Rajiv Kumar Rajiv Kumar 1212

Limitation of Lamport¶s ClockLimitation of Lamport¶s Clock

Time

Space P1

P2

e11 e12 e13

e21 e22 e23

P3 e31 e32 e33

(1) (2) (3)

(1)

(1) (2)

(3) (4)

C(e11) < C(e32) but not causally related.

This inter-dependency not reflected in Lamport¶s Clock.