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Lecture 9Chemical Engineering for Micro/Nano Fabrication

Nanoimprint Lithography NIL

Matt Colburn Steve Johnson S.V. Sreenivasan

Eigler, et al IBM Almaden

Xe on Nickel

Ultimate limit of high resolution patterning!!

1 atom 0,438 nm

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Atomic Resolution…atom by atom

Don Eigler

IBM Almaden Research

Center

Resolution:

1 atom ~ 0.3–0.5nm

Throughput:

one atom per minute

~ 0.02

pixels/second

Great Science but

not yet practical

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Production Lithography• 193nm step and scan

exposure

• Chemically Amplified Resist

• Water immersion lithograpy

• Cost > $60 million/tool

Resolution: 40 nm /5

Throughput: 100 wafers/hr

>300 gigapixels/sec!!!

OK…Serial Processes are Simply too Slow

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Resolution vs. Throughput

1.00

10.00

100.00

1000.00

10000.00

1. 00 E- 05 1. 00 E- 03 1. 00 E- 01 1. 00 E+0 1 1. 00 E+0 3 1. 00 E+0 5 1. 00 E+0 7 1. 00 E+0 9 1. 00 E+1 1 1. 00 E+1 3

10-6 10-4 10-2 100 10 2 104 106 108 1010 1012

STM- atom manipulation

AFM (single tip with

Silicon as resist)

E-beam lithography

(inorganic resists)

Other Gaussian E-beam

lithography (high speed resists)

Gaussian E-beam

lithography

(PMMA resist)

Res

olu

tio

n (

An

gst

rom

)

Area Throughput (μm2/hr)Don Tennant: Cornell University

Shaped & cell projection E-beam lithography

Imprint

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600 AD Imprint Lithography

Tang Dynasty Templates Mesopotamian Templates

Minoan Signet Ring

From the Bronze Age

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15th Century Imprint Lithography

JOHANNES GUTENBERG

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1980’s Nanoimprint for CDs

Phillips 2P process

– UV sensitive “lacquer”

sandwiched between

mold and thin

polycarbonate substrate

– UV light shown through

substrate to cure lacquer

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90’s Soft LithographybSoft Lithography

1. PDMS template with thiol

2. Imprint stamp

3. Transfer molecules

4. Pattern TransferAnnu. Rev. Mater. Sci. 1998. 28:153–84

Younan Xia and George M. Whitesides

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90’s Thermal Imprint Lithography

Science 5 April 1996:

Imprint Lithography with 10 -Nanometer Resolution

Stephen Y. Chou, * Peter R. Krauss, Preston J. Renstrom

NIL Process

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Pattern Density Effects

Easiest… Easy… Very Difficult!

“Residual layer”

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• S-FIL fluid dispenser

• Ink jet systemPlanarization layer

SubstrateStep 1: Dispense drops

Step 2: Lower template

and fill pattern

Step 3: Polymerize S-FIL

fluid with UV exposure

Step 4: Separate template

from substrate

Template

Substrate

Substrate

Template

Step & Repeat

Substrate

Planarization layer

Planarization layer

Planarization layer

Fused silica template, coated with

release layer

2000 Step and Flash Imprint Lithography

• Template filling driven by

capillary action

• low imprint pressure and

room temperature process

Template

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“Issues” with SFIL are:

S.V. Sreenivasan

Residual Layer

• Templates

• Orientation control

• Making 1X templates

• Residual layer control

• Defects

• Template wear

• Alignment

• Throughput

• Templates

• Orientation control

• Making 1X templates

• Residual layer control

• Defects

• Template wear

• Alignment

• Throughput

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Self-Leveling Scheme using Template Flexure

Z head

Wafer

Wafer Tip/Tilt stage

Theta stage

XY stage

Template

flexureTemplate

chuck

Template

calibration stage

Template

Remote center

of rotation

TemplateTemplate-

substrate

interface

Flexure Schematic

B. J. Choi, S. Johnson, M. Colburn, S.V. Sreenivasan, C. G.

Willson, “Design of Orientation Stages for Step and Flash

Imprint Lithography,” Journal of Int. Societies for

Precision Engineering and Nanotechnology, Volume 25,

No. 3, pp. 192-199, July, 2001.

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S-FIL vs. Optical Lithography Schematic

Greatly simplified and lower cost process

Standard Optical LithographyImprint Lithography

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First Publication of SFIL

Matt Colburn, et. al

Colburn, et.al “Step and Flash Imprint Lithography: A New Approach to

High-Resolution Patterning,” Proc. SPIE 3676 379-389 (1999)

First SFIL tool

40 nm images

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SFIL tool decade later

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Residual layer needs to be thin and uniform

Residual Layer is due to the undisplaced liquid

Residual Layer Thickness Control

ThickWedged Wavy ThickWedged WavyWavy

Residual Layers

Residual Layer

Avoid: Non-uniformities

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Focus on Continuous Process Improvement

– Minimize mean and

standard deviation of

residual layer

– Key drivers: chuck

flatness, inkjet drop

volume and location

controls, evaporation.

1. 3.

4.

2.

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Residual Layer Thickness MeasurementsEarly Results

Residual layer mean

<20nm and thickness

variation to < 6 nm TIR

0

5

10

15

20

25

1 10 19 28 37 46 55 64 73 82 91 100 109 118 127 136 145 154 163 172 181 190 199 208 217

Position #

Resid

ual

Layer

Th

ickn

ess (

nm

)

Average 18.760

Std Dev 1.103

Min 16.156

Max 21.853

Range 5.696

Residual layer thickness fully populated wafer

28 nm HP

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Residual Layer Control Today• Software and hardware has been developed to correctly jet resist, and

control the spreading of the resist in a similar fashion to full fields

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SFIL Lithography2nm Replication

(Rogers et al, Illinois)

26 nm metal 1Line and 100 nm via

11nm lines and spaces 14 nm posts

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1) Why do you think 1X projection lithography

replaced contact printing in the early 80’s??

Don’t you learn from history??

2) Do you propose attempt to do lithography

without a pellicle??!!

Defects

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Template Before and After Imprints

All visible defects disappear from

the template.

Printing is the best way to clean

an SFIL template!

This is our “Pellicle”

Template prior

to imprint

Template after second

imprint

Filthy

Template

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Cohesive vs Adhesive Separation

Material with poor mechanical properties

Cohesive Failures call for stronger materials

Fouled Templates due to

Bad Materials Properties

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First Etch Barrier Formulation “E4”

Well defined,

stable structures:

Low viscosity:

1.9cPs/20CRapid cure to high

conversion:

Si-containing monomer EGDA t-BuAc Darocur 1173

O

O

Si OTMS

OTMS

OTMS

O

O

O

OH

O

O

O

O

40nm 30nm

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Role of Evaporation in Imprint Process

Thin residual layers and ease of filling require low

viscosity & small drops.

High evaporation can lead to:

– Variable mechanical properties of imprint material

– Variation in film thickness

Evaporation of an 80pL Drop of Monomer

Initial

Drop

10

seconds

20

seconds

30

seconds

40

seconds

50

seconds

70m

~ 42%

material

loss

~ 56%

material loss

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Working etch barrier formulation

O Si

O

OTMS

OTMS

OTMS

O

O

O

O

O

O

SIA0210 44%

EGDA 15%

iBA 37%

Irgacure 4%

HO

O

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0.0E+00

2.0E+06

4.0E+06

6.0E+06

8.0E+06

1.0E+07

1.2E+07

1.4E+07

1.6E+07

1.8E+07

0 5 10 15 20 25 30 35

Elongation (%)

Str

es

s (

Pa

)0.0E+00

1.0E+05

2.0E+05

3.0E+05

4.0E+05

5.0E+05

6.0E+05

7.0E+05

8.0E+05

9.0E+05

1.0E+06

0 1 2 3 4 5 6 7 8 9 10

Elongation (%)

Str

es

s (

Pa

)

Old Stuff New Stuff

Elongation at break 1-2% Elongation at break 30-35%

Tensile Modulus 80 MPa Tensile Modulus 500 MPa

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• Break stress of new stuff is 16 MPa

Many fold improvement in Mechanical Properties

0 5 10 15 20 25 30 35

5.0x106

1.0x107

1.5x107

Old Stuff

Str

ess

(P

a)

Elongation (%)

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Separation Failures

Fluorinated Self Assembly Monolayer (F-SAM)

FSi Cl

F F

FF

FF

FF

FF

FF

OH

OSi

OSi

OSi

OSi

OSi

OH OHO

OSi

OSi

OSi

OSi

OSi

O OSi

FF F

FFF

F

Si

FF F

FFF

F

Si

FF F

FFF

F

Solution?

Separation process

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Fluorosurfactants

2-(Perfluorodecyl)ethyl acrylate (R)

Methyl perfluorooctanoate (NR)

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Adhesion Test Tool

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Instron Experiment

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Bad News!

81 shots maximum

Wa

ter

co

nta

ct

an

gle

(d

eg

ree

)

The numbers of imprints

0

20

40

60

80

100

120

0 10 20 30 40 50 60 70 80 90 100

ChE 384T / 323

We have a “wear” problem

Fluorinated Self Assembly Monolayer (F-SAM)

FSi Cl

F F

FF

FF

FF

FF

FF

OH

OSi

OSi

OSi

OSi

OSi

OH OHO

OSi

OSi

OSi

OSi

OSi

O OSi

FF F

FFF

F

Si

FF F

FFF

F

Si

FF F

FFF

F

Current solution & a problem

OH

OSi

OSi

OSi

OSi

OSi

OH OSi

FF F

FFF

F

Imprints

Degradation & defects !!

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Potential Solution to the “wear” problem

SiN

Si

H

SiN

Si

F F

F F

F F

F F

F F H

F

FF

F

F F

F F

F F

F F

F F

F

F

HMDSFluorinated silazane

Comparable structure to F-SAM !!!

Replenish !!!

O

OSi

OSi

OSi

OSi

OSi

O OSi

FF F

FFF

F

Si

FF F

FFF

F

Si

FF F

FFF

F

Imprints w/ F-silazaneF

Si ClF F

FF

FF

FF

FF

FF

OH

OSi

OSi

OSi

OSi

OSi

OH OHO

OSi

OSi

OSi

OSi

OSi

O OSi

FF F

FFF

F

Si

FF F

FFF

F

Si

FF F

FFF

F

OH

OSi

OSi

OSi

OSi

OSi

OH OSi

FF F

FFF

F

Imprints

F-SAM

FSi Cl

F F

FF

FF

FF

FF

FF

Degraded …

Concept

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Multiple Imprints Results

0

20

40

60

80

100

120

0 10 20 30 40 50 60 70 80 90 100

Standard fluid

+ 5 % F-silazane

81 shotshard more imprints

100 shotspossible more imprints

Wa

ter

co

nta

ct

an

gle

(d

eg

ree

)

The numbers of imprints

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10,000 non-stop Imprints for one Template

Features: Metal-1 and

Contact arrays

– 350 nm minimum CD M1

– 400 nm contacts

– 90 nm minimum CD M1

– 80 nm minimum CD M1

– 70 nm minimum CD M1

– 120 nm contacts

– 100 nm minimum CD M1

– Program defects: 100 nm

minimum CD M1

Features: Metal-1 and

Contact arrays

– 350 nm minimum CD M1

– 400 nm contacts

– 90 nm minimum CD M1

– 80 nm minimum CD M1

– 70 nm minimum CD M1

– 120 nm contacts

– 100 nm minimum CD M1

– Program defects: 100 nm

minimum CD M1

Defect Template Wafer layout

Imprinted 82,200 mm wafers with 124 fields per wafer

Wafers were imprinted with 13 mm X 13 mm mask fields

The imprints had no unprinted streets between the imprints

No process disruptions due to particles were observed

Do not know of any limitations, we could have printed more fields

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Field-To-Field Alignment

One of Eight Interferometric Moiré

Alignment Technique (i-MAT) Cameras

Imprint

Mask

Wafer

Imprint

area

Alignment Marks

One of Eight Interferometric Moiré

Alignment Technique (i-MAT) Cameras

Imprint

Mask

Wafer

Imprint

area

Alignment Marks

Moiré metrology originally developed for X-Ray litho (Smith, Moon)

Sub-nanometer resolution, inclined optics

Insensitive to film thickness variations

Alignment and scale/shape correction are performed “in-liquid” which is

typically a 15nm residual layer

43

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Overlay: Scale/Shape Correction Mechanism

SiC Chuck &

Template

Loadcell

Gimbal

Pads

44

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1) Why do you think 1X projection lithography

replaced contact printing in the early 80’s??

Don’t you learn from history??

2) Do you propose attempt to do lithography

without a pellicle??!!

Defects

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Defect Density Trend Similar to Immersion

• Data measured on imprinted wafers – includes all sources of defects

• Steady improvement in defect density –

• Rate approximately one order of magnitude per year

• very similar to immersion lithography learning curve

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The Claims of the Detractors/Competitors

The stated “facts”…..SFIL cannot:

– Control RLT

– Align

– Defectivity, etc….

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Mask Life: Wafer Fall-On Particle Trend

100

10

0.4

0.1

0.020.01

0.003

0.0005

0.0001

0.001

0.01

0.1

1

10

100

2012 2013 2014 2015 2016

Change of number of particles on wafer[pcs/Wafer]

Hard particle reduction prolongs mask life

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Gate Level: 38nm Half Pitch

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Canon, Toshiba and SK hynix going forward

with SFIL

Revolutionizing the Semiconductor

Industry - Nanoimprint Lithography

Report: Toshiba adopts imprint litho for NAND productionJune 07, 2016 // By Peter Clarke

Toshiba will adopt nanoimprint lithography (NIL) as a way of reducing the cost of production of

NAND flash memory, according to a Nikkei report. Toshiba plans to allocate part of an 860 billion

yen (about $8 billion) budget for spending on semiconductors over the next three years on

introducing NIL into flash memory production lines, the report said. Production is set to begin in

fiscal 2017 in Yokkaichi.

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News Release

Canon provides nanoimprint lithography manufacturing

equipment to Toshiba Memory's Yokkaichi Operations

plant

TOKYO, July 20, 2017—Canon Inc. announced today that

the company has provided the FPA-1200NZ2C,

semiconductor lithography equipment that utilizes

nanoimprint lithography (NIL) technology which Canon has

been continuously developing since 2004, to leading

provider of semiconductor memory solutions Toshiba

Memory Corporation's Yokkaichi Operations plant. The

provision of this equipment represents significant progress

toward semiconductor device mass production that employs

nanoimprint technology.

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“Back end of the line” is a lot of the process

!

Transistor

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Traditional

Dual Damascene Process

Dual Damascene Process

with Imprint Litho

Dual Damascene Process

resist

etch stop

substrate

ILD

ILD

Initial stack Trench litho Trench etch

Resist ashBARC / resistVia litho

Via etch Resist Ash

Barrier

Cu metal

CMP

Initial stack

Imprint

Breakthru etch

Cure

dielectric precursor

etch stop

substrate

Barrier

Cu metal

CMP

184 steps for 8 levels of Cu72 steps for 8 levels

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Dispense SIM Material

SFIL Damascene Process (SIM)

# of process steps:

Multi-Tier Template

Position templateFlashRelease

SFIL IMPRINTING

M1

1

Deposit barrier

Deposit CVD dielectric (BD)CVD Dielectric

23

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SFIL Damascene Process

# of process steps: 0

Sacrificial Imprint Material (SIM)

4

M1

CVD Dielectric

Etch Transfer

5

Strip (SIM)

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M1

Etch Diffusion Barrier

Copper Seed

Copper Plate

SFIL Damascene Process

# of process steps: 6789

184 – 72 = 112

Saved steps ?

x 8

72

CMP

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BEOL Multilevel Imprint Cost Saving

20% overall saving at 30 wph

Cost analysis courtesy of Sergei V. Postnikov, Infineon Technologies; presented at Semicon Europa 2007, Stuttgart, Germany

0%

20%

40%

60%

80%

100%

120%

140%

wph = 5 wph = 10 wph = 20 wph = 30 wph = 40 wph = 50

V1/M2

base line

DD:

44steps

V1/M2 Dual Damascene by NIL in resist: 27 steps

rela

tiv

e c

os

t (%

)

20%

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Damascene Swords and Jewelry

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Damascene Swords and Jewelry

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Damascene Swords and Jewelry

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Chemical Mechanical Polishing

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CMP Tools

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Via Chain Test Structure

M2

V2

M1

2.5um1.5um

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Via Chain Structures

100nm vias 100nm via100nm vias

M2 by SFIL M1 by

Photolithography

Via chain

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Via chain test site

Template

now a commercial product

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Imprinting

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Pattern Transfer Demonstration

Trench

Etch

CF4/C4F8/N 2

Ash

N2/H2

Both Coral® and Black Diamond® were processed

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Wiring Level Complete

After etch After metal

After metal

If this works, it saves more than 100 unit process

steps from the manufacturing of a modern

microprocessor and provides a saving of 20-50%

(per studies by Infineon and SEMATECH)

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Wiring Level Complete

After etch After metal

After metal

ChE 384T / 32371

Completed Via Chains

M2

V2

M1

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Via Chain – 120 nm 1000 Contacts

Yield statistics (6 valid and identical chains

tested)– Overall yield of 1000-contact chains with via CD 120 nm

(nominal) / 115 nm (final) – 96.83%

– Individual contact yield – 99.9968%

Template CD = 120 nm

Final CD = 115 nm

0

20

40

60

80

100

0 2 4 6 8 10 12 14 16

Via Chain Resistance (Ohm per contact)C

um

ula

tive P

rob

ab

ilit

y (

%)

Chain #1

Chain #2

Chain #3

Chain #4

Chain #5

Chain #6

Cu (M2)

Coral

Cu (M1)

Ta