EE141

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EE141 EECS141 1 Lecture #11

EE141 EECS141 2 Lecture #11

HW 5 posted – due in two weeks

Lab this week

Midterm graded

Project to be launched in week 7

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EE141 EECS141 5 Lecture #11

What do digital IC designers

need to know?

EE141 EECS141 6 Lecture #11

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EE141 EECS141 7 Lecture #11

Pinch-off

0< VGS

- VT < V

DS

EE141 EECS141 8 Lecture #11

For (VGS – VT) < VDS, the effective drain voltage

and current saturate:

’

Of course, real drain current isn’t totally

independent of VDS

For example, approx. for channel-length modulation:

’

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EE141 EECS141 9 Lecture #11

Cutoff:

VGS

-VT< 0

Linear (Resistive):

VGS

-VT > V

DS

Saturation:

0 < VGS

-VT < V

DS

’

’

EE141 EECS141 10 Lecture #11

Quadratic

Relationship

0 0.5 1 1.5 2 2.5 0

1

2

3

4

5

6 x 10

-4

VGS

= 2.5 V

VGS

= 2.0 V

VGS

= 1.5 V

VGS

= 1.0 V

Resistive Saturation

VDS = VGS - VT

VDS (V)

I D (

A)

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EE141 EECS141 11 Lecture #11

Linear

Relationship

-4

0 0.5 1 1.5 2 2.5 0

0.5

1

1.5

2

2.5 x 10

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

Early

Saturation

VDS (V)

I D (

A)

EE141 EECS141 12 Lecture #11

(V/μm)

n (

m / s

)

sat = 10 5

Constant mobility (slope = μ)

Constant velocity

c

Velocity saturates due to carrier scattering

effects

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EE141 EECS141 13 Lecture #11

I D

Long-channel device

Short-channel device

V DS V DSAT V GS - V T

V GS = V DD

EE141 EECS141 14 Lecture #11

0 0.5 1 1.5 2 2.5 0

1

2

3

4

5

6 x 10

-4

V GS (V)

I D (A

)

0 0.5 1 1.5 2 2.5 0

0.5

1

1.5

2

2.5 x 10

-4

V GS (V)

I D (A

) quadratic

quadratic

linear

Long Channel(L=2.5μm)

Short Channel(L=0.25μm)

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EE141 EECS141 15 Lecture #11

Approximate velocity:

Continuity requires that:

Integrating to find the current again:

EE141 EECS141 16 Lecture #11

-4

0 0.5 1 1.5 2 2.5 0

0.5

1

1.5

2

2.5 x 10

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V

VGS= 1.0 V

0 0.5 1 1.5 2 2.5 0

1

2

3

4

5

6 x 10

-4

VGS= 2.5 V

VGS= 2.0 V

VGS= 1.5 V VGS= 1.0 V

Resistive Saturation

VDS = VGS - VT

VDS (V) VDS (V)

I D (

A)

I D (

A)

Resistive

Velocity

Saturation

Long Channel(L=2.5μm)

Short Channel(L=0.25μm)

W/L=1.5

VDSAT

VGS

-VT

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EE141 EECS141 17 Lecture #11

Exact behavior of transistor in velocity sat. somewhat

challenging if want simple/easy to use models

So, many different models developed over the years

v-sat, alpha, unified, VT*, etc.

Simple model for manual analysis desirable Assume velocity perfectly linear until sat

Assume VDSAT constant

EE141 EECS141 18 Lecture #11 18

(V/μm)

n (

m / s

)

sat = 10 5

Constant velocity

Assume velocity perfectly linear until hit sat

c = sat/μ

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EE141 EECS141 19 Lecture #11

VGS-VT (V)

Assume VDSAT = cL when (VGS – VT) > cL

cL

VDSAT (

V)

cL

Actual VDSAT

EE141 EECS141 20 Lecture #11

B

D

G

ID

S

for VGT

0: ID = 0

with VDS,eff = min (VGT, VDS, VD,VSAT)

for VGT

0:

define VGT = VGS – VT

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EE141 EECS141 21 Lecture #11

-4

0 0.5 1 1.5 2 2.5 0

0.5

1

1.5

2

2.5 x 10

Velocity

Saturation

VDS (V)

I D (

A)

VDS = VGT

VGT = VD,VSAT

Saturation

Linear

VDS = VD,VSAT

Define VGT = VGS – VT, VD,VSAT = c·L

EE141 EECS141 22 Lecture #11

0 0.5 1 1.5 2 2.5 0

0.5

1

1.5

2

2.5 x 10

-4

V DS (V)

I D (

A)

VDS=VD,VSAT

VDS=VGT

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EE141 EECS141 23 Lecture #11

If device always operates in velocity sat.:

“VT*” model:

Good for first cut, simple analysis

EE141 EECS141 24 Lecture #11 24

Textbook: page 103

V

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EE141 EECS141 25 Lecture #11

-2.5 -2 -1.5 -1 -0.5 0 -1

-0.8

-0.6

-0.4

-0.2

0 x 10

-4

V DS (V)

I D (

A)

• All variables negative

• I prefer to work with absolute values

VGS = -1.0V

VGS = -1.5V

VGS = -2.0V

VGS = -2.5V

EE141 EECS141 26 Lecture #11

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EE141 EECS141 27 Lecture #11

= CGCS + CGSO = CGCD + CGDO

= CGCB = Cdiff

G

S D

B

= Cdiff

EE141 EECS141 28 Lecture #11

Capacitance (per area) from gate across

the oxide is W·L·Cox, where Cox= ox/tox

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EE141 EECS141 29 Lecture #11

Distribution between terminals is complex

Capacitance is really distributed

– Useful models lump it to the terminals

Several operating regions:

– Way off, off, transistor linear, transistor saturated

EE141 EECS141 30 Lecture #11

When the transistor is off, no carriers in channel to form the other side of the capacitor. – Substrate acts as the other capacitor terminal

– Capacitance becomes series combination of gate oxide and depletion capacitance

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EE141 EECS141 31 Lecture #11

When |VGS| < |VT|, total CGCB much smaller than

W·L·Cox

– Usually just approximate with CGCB = 0 in this region.

(If VGS is “very” negative (for NMOS), depletion

region shrinks and CGCB goes back to ~W·L·Cox)

EE141 EECS141 32 Lecture #11

Channel is formed and acts as the other terminal

– CGCB drops to zero (shielded by channel)

Model by splitting oxide cap equally between

source and drain

– Changing either voltage changes the channel charge

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EE141 EECS141 33 Lecture #11 33

Changing source voltage doesn’t change VGC

uniformly

– E.g. VGC at pinch off point still VTH

Bottom line: CGCS 2/3·W·L·Cox

EE141 EECS141 34 Lecture #11

Drain voltage no longer affects channel charge

– Set by source and VDS_sat

If change in charge is 0, CGCD = 0

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EE141 EECS141 35 Lecture #11

Cgate vs. VGS

(with VDS = 0)

Cgate vs. operating region

EE141 EECS141 36 Lecture #11 36

Off/Lin/Sat CGSO = CGDO = CO W

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EE141 EECS141 37 Lecture #11

COV not just from metallurgic overlap – get fringing

fields too

Typical value: ~0.2fF·W(in μm)/edge

n + n +

Cross section

n + n +

Cross section

Fringing fields