lecturer: dr. simon winberg. details boring details
TRANSCRIPT
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Lecturer:Dr. Simon Winberg
Digital Systems
EEE4084F
Lecture 1Introduction
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Class handout
detailsboringdetails
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Lecture Overview
Staff & teaching prac times Relevance to you & objectives Syllabus in brief & textbook info Initial impressions? Course structure Reading task Homework #1
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Teaching staff Lecturer
Dr. Simon Winberg office 6.13Email: [email protected]
TA John-Philip Taylor:
[email protected] Tutors (avail in Blue lab)
No tutors currently signed up
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Consultation times
Simon:Monday: 09h00 – 11h00Thursdays: 12h30 – 13h30Thursday lectures are expandable
from one period to two so the tail end of Thursday lectures double as Q&A / consultation time
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Course WebsitesResources, lectures, etc: www.rrsg.ee.uct.ac.za/courses/EEE4084F/
Vula site used for submitting assignments, announcements, etc.+
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Lecture & Prac times
Day Time
Venue Description
Tuesday 9am LCOM 2G Lecture
Tuesday 3pm LS 2D Seminar
Thursday
2pm LS 5E Lecture / Q&A / class activity / quiz
Lectures
Day Time Venue Description
Mon. 09h00-12h00
Blue lab Prac / Project
Wed. ? 09h00-11h00
Blue lab Prac / Project
Pracs
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When do pracs start?
Would like to make a start on pracs in the first week on Wednesday.
Homework 1 / Prac0 starts now No official pracs this week, but you’re
welcome to use the Blue lab when you can find some free time.
Officially lab pracs start first Monday of the 2nd week of term
Prac vs. Lab? and prac attendance? …
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To answer…
Do I need to attend lab sessions?
To clarify (for my nomenclature):Prac = the assignment you are
tasked to do (not necessarily the place to do it)
Lab / Lab session = the booking of the lab (i.e., Blue Lab)
We know the simple terminology!
To answer: No, you don’t need to attend lab sessions. Work where you want, when you want. You just might have to use the lab in order to access the required hardware.NB: But you do need to complete all the pracs.
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Change Wed time?
Wed 10am might have few attendees (due to DSP lecture)
If you want an alternate time, get together and decide a better time. Use Chat for example on Vula. Then (the class rep can) email me a request.
An example of the‘emergence’ phenomenon in birds
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Objectives & …
EEE4084F Digital Systems
Relevance of EEE4084F to You
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The Objectives Equip you with expertise and
knowledge of the state-of-the-art. Apply and build on knowledge from
previous courses, taking it to a new level.
Work on exciting andinteresting projects thatwill help to…
Prepare you for a high-flying high-tech career!!
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Relevance to you…
If you’re in the ECE programme, you’ll be expected to graduate with good knowledge of the fundamental + some experience with the latest techniques and technology.
But more than that…intent as a “capping course”, that draws on prior knowledge; provide an “upwards push” towards taking things further on your own inyour future career or studies.
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Some harsh realities
Where is there work for computer engineers?
(Most especially high-paid ones!)
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Map of the world – where are the EC jobs?
You are here
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Where the jobs are…
USAEurope
Asia/PacificCanada
South AmericaAfrica
0%
5%
10%
15%
20%
25%
30%
35%
40%
45%
50% 46%
22%20%
8%
3%2%
Note: in the case of continent the flag represents the country with the largest electronics industry
& other NorthAmerican nations
(incl. Australia)
Data based on: Cass, S. 2007. “Where the jobs are”, In IEEE Spectrum: 44(2). pp 51-57
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2013 values (suggestion) as to developers stay:
US & Canada: 61%Europe: 20%South America: 3%Asia: 12.7%Australia: 1.8%Africa & Near East: 1.3%
Survey of 1914 engineers
Data from Embedded Market Survey 2013, UBM
14.5%
http://e.ubmelectronics.com/2013EmbeddedStudy/index.html
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Some realities Where is work for computer engineers?
Most in: USA, Europe (& UK), China and India But opportunities in RSA are growing…
Good news: – if you’re skilled Outsourcing: 40% * (esp. consumer/custom products) World shortage of good skills in embedded and high-
performance developers Worldwide desire for electronic products and faster
processing Increase in specialized/embedded computer systems,
getting increasingly complex & interconnected, rather than becoming simplified and easier…
* based on statistics of survey done by: Cass, S. 2007. “Where the jobs are”, In IEEE Spectrum: 44(2). pp 51-57
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Are these job statisticssomething to worry about?
That depends…Graduate that did well generally seem to
find EC-related work wherever they would like to be (with some obvious limitations*).
Although many of our graduates end up doing nothing related to computer engineering (e.g. financial consultancy), it doesn’t mean there aren’t plenty jobs out there that would use the skills you have learned in the programme.
In all, getting your BSc in ECE will most likely be worth all the effort * Certain countries have next to zero, or less, work going on related to computer system development.
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Suggested reading
The Job Market of 2045 - IEEE Spectrum
See folder Supplementary Readings on Vula site:
IEEESpectrum_2013.01.22_16Jobs2045.mp3 podcast
http://images.content.ubmtechelectronics.com/Web/UBMTechElectronics/%7Ba7a91f0e-87c0-4a6d-b861-d4147707f831%7D_2013EmbeddedMarketStudyb.pdf
Other view based on where embedded engineers work:
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Back toClass business…
EEE4084F Syllabus in brief…
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Embedded Systems (EEE3074W)
Digital Logic, etc.(from EEE2039W)
Microprocessor and digital circuit design & tools
(EEE3017W/EEE3064W)
Software Engineering, Programming, etc.
(CS courses)
Digital Systems
High Performance Embedded Computing
(HPEC) Systems
Parallel Computing
TERM 1 THEME:Microprocessor-based
parallelism & supercomputer design
TERM 2 THEME:Reconfigurable
Computing using FPGAs
Your
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& pr
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Not for the timid.
EEE4084F Syllabus in brief
Project 1 Project 2
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EEE4084F Pracs & Project
Prac1:PThreads
Prac 2:CUDA
Prac 3:OpenMP
Conceptual assignment. E.g. think andwriting about a DNA seeker algorithmthat runs on a cluster.
Prac4:FPGA Prac
Project “YODA”Your Own Digital Accelerator (YODA) implemented on a FPGA kit / acc. board
Running test
Report
(short)
Project
Report
Project files
TE
RM
1T
ER
M 2
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TextbookMartinez, Bond & Vai, 2008. High Performance Embedded Computing Handbook. CRC Press.The book should already be available from the UCT bookshop, local Rondebosch bookshops and Jutas bookstore in Claremont. (The local bookshops should be selling it for a lot less than the new book price shown on Amazon).
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Class Activity
Quiz #0 - “Initial impressions” 10 minutes to complete a few
simple survey questions and prerequisite tests.
This quiz is not for marks Name & student number voluntary
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Marking of Quiz0?
Please hand back your Quiz0 Next lecture I’ll show you the
correct solutions (or if you are impatient, which is partly why I set the quiz, you can search for answers online and at the same time probably encounter other interesting computing terms).
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Course StructureEEE4084F Digital Systems
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Course structure outline
Weekly routine Tuesday 9am = regular lecture Tuesday 3pm = seminar Thursday 2pm = lecture + activity OR quiz
Approx. Every 2nd week: Quiz* (~ 30min)Will be announced ahead of timeCovers: recent lectures, seminars, prac,
project Assessment: pracs, projects, homework
See next slide…
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Item Number % Final mark
Lab pracs 4 10%
Projects 1.5 20%
Quizzes / tests 6 * 20%
Final (June) exam 1 40%
Seminar (other) 1 + n ** 5%
Homework (other)
A few 5%* Actual number may vary ** 1 x group presentation, n x to be part of the audience
Assessment
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Projects
Conceptual asgn.: Term 1 Design report detailing a parallel
processing system, infrastructure / network, algorithm(s) and costing
Project: Term 2 YODA (Your Own Digital Accelerator) Using Xilinx & FPGA dev. Boards OCTAVE PC-based app for showing results
Yoda Project Demo (40%), Report (45%), Blog (15%) Need to submit code to get mark
15% of
course
mark
5% of course
mark
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Prac Num Title (draft name)
0 OCTAVE testing. Login trials, test machines (optional) See Homework 1
1 Pthreads + performance benchmarking techniques
2 CUDA (acceleration using GPUs)
3 Cluster – Graphics + OpenMP
4 Xilinx ISE, FPGA Kits
Lab Practicals
Links to recommended C / C++ tutorials if you haven’t used C much before
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2 Types of Groups
Seminar Facilitation Group (SFG) Need to be formed ASAP Topics are chapters of the textbook
Yoda Project group (YPG) Formed prior to starting a project Can comprise the same or different
individuals as to the SFG Pracs
Independently or as a team of 2
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Tuesday Seminars &The Readings
One seminar will be held per week Each seminar group required to:
Facilitate one seminar sessionSubmit PPT summary slides and/or notes to
lecturer on the day or in advance First seminar is next week (by lecturer) Sign up on the roster Reward for being first: leniently marked
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Seminar Groups Try to start on formalizing groups
Group Date Members Chapter
TERM1 Microprocessor-based parallel systems1 24 Feb 2014 S. Winberg (done by lecturer) The landscape of parallel computing research: a view from
Berkeley
2 CH1 A Retrospective on High Performance Embedded Computing and CH2Representative Example of a High Performance Embedded Computing System
3 CH3 System Architecture of a Multiprocessor System
4 CH5 Computational Characteristics of High Performance Embedded Algorithms and Applications (optional additional reading: CH15 Performance Metrics and Software Architecture)
5 CH13 Computing Devices
TERM2 FPGA / Reconfigurable parallel systems6 CH9 Application-Specific Integrated Circuits and CH10 Field
Programmable Gate Arrays
7 CH7 Analog-to-Digital Conversion
8 CH14 Interconnection Fabrics
9 CH24 Application and HPEC System Trends NOTE: this last seminar is on a Thursday as the Tues is a holiday
10 CH20 Radar Applications(probably discard)
Will be posted as
Sign-up on Vula
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Seminar plan
Each seminar run by a seminar group Everyone expected to read each
assigned reading for the week I recommend making notes to yourself
or underlining important points (in pencil)
Write down questions or comments. Your classmates running the seminar would probably welcome these.
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Seminar plan
Class register passed around Depending on discussion and
participation, lecturer or presenters may ask specific individuals to comment on a particular issue related to the reading
Suggestion:Students sit in their seminar groups
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Seminar marking
Presentation mark (60%)Group members get the same mark
Participation mark (40%)Group members contributing to
seminarsAttendance at seminars
Individuals who regularly don’t attend seminars may get 0 for the seminar (and thus loose their DP)
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Seminar presentation timing & marking guideStructure of Seminar Presentation Mark
Introduction of group and topic (~1 min) 5
Summary presentation (~10 min) 20
Visual aids / use of images / mindmaps / etc. 20
Reflections (5 – 10 min)Including group’s viewpoints / comments / critique
15
Facilitation and direction of class discussion & response to questions (10 min)
15
Quality of questions posed by the presenters 10
Wrapping up / conclusion (2 min) 5
Participation of all members 10
TOTAL: 100
See seminar_marking.pdf on website in Assignments & Resources.
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TO DO for next week…EEE4084F Digital Systems
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Reading task No seminar session this week Next week’s seminar facilitated by me
(group facilitated start in 2 weeks) Reading to be done for next week:
See Resources/Readings on Vula site R01 handed out:
Asanovic et al. “The Landscape of Parallel Computing Research: A View from Berkeley”
R01b – supplementary (voluntary) readingDiscusses Berkeley parallel computing lab
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Homework 1 / Prac0:OCTAVE & Correlations See Assignments on the course
website
See you all on Thursday 2pm
rem.to doh/w