li han, sam huh, and neal h. clinthorne university of michigan, ann arbor, mi, usa

1
Li HAN, Sam Huh, and Neal H. Clinthorne University of Michigan, Ann Arbor, MI, USA A VLSI Design for Energy Extraction and Pileup Prevention for High Count-Rate Scintillation Signals I. Goal and Design Rationale • Design a Very Large Scale Integration (VLSI) full digital processor to recover photon energy deposited in a NaI scintillation detector for high event rates where multiple scintillation pulses overlap. • Digital solutions offer more flexibility and higher noise immunity than digital-analog hybrid active pileup prevention energy (PPE) circuits. • The full digital PPE algorithm and circuit design not only increases working frequency up to 400MHz, but also avoids floating point multiplication, which could be implemented by the Application Specific Integrated Circuit (ASIC) procedure or Field Programmable Gate Arrays (FPGA) chip. • The layout of the chip has been implemented using the method of ASIC design flow with the TSMC 0.18um standard cell CMOS technology on CAD system. II. Methods and Algorithms The active pileup prevention energy (PPE) method: 1 • Integrate the present event dynamically until the next is detected. • Estimate a weighted-value to represent the total energy inside the scintillation detector which includes both the energy from present event and the remnant energy from all the previous events • Calculate the energy of the latest event by subtracting the residual energy, i.e. a decay- weighted sum of the previous total energy based on the present total energy Fig.1 The full digital PPE Technology acquired data from 100MHz A/D converter, sampled from NaI scintillation detector (τ = 230ns) at at every 10ns (T s ). 1 1 1 1 3 1 1 1 exp[ ( ) /] 10{ exp[ ( ) / ]} (2 2) { (10 exp[ ( ) / ]) 1} j j j j j s j j j j s j j j j s E S S n n T SE SE n n T SE inv SE n n T 1 1 ( 3) ( 1) ({ 80 exp[ ( )/23]} 3) 1 j j j j j E SE SE inv SE n n Fig.3 Pipelined Energy Extractor with Look up Table Eq.(2) Sampled Data at point n for pileup events The discrete weighted sum S j and S j-1 for the j th , (j-1) th gamma ray (4) Variable SE j is 10 times less then S j Eq.(5) Extract the total energy E j for the j th pileup gamma ray Eq.(6) Digital PPE uses shifter and look-up-table to calculate energy III. PPE-CHIP Architecture IV. Experimental Results Eq.(1) Sampled Data at point n for non-pileup events Fig.2 PPE-CHIP Architecture and Features Fig.4 PPE-CHIP Internal Structure and Virtuoso CAD Layout [] ( / )exp[ ( ) /] j s en E n n T 1 1 [] ( / )exp[ ( ) /] ( / )exp[ ( ) /] j j s j j s qn E n nT E n n T 0 1 0 1 1 [] [] =( )[ ] [] exp[ ( ) /] m j s n m s n j j j j s S qm T qn Ts q m T qn E E n n T 1 1 j j S E s 1 0 1 0 1 4 3 0 1 0 /10 (for =230 , T =10) ( ) [ ]/10 [ ]/10 24 [] [] 2 []2 [] [] ([ ] 4) ([ ] 3) [] j j m s s n m n m n m i SE S T qm T qn qm qn qm qm qn qm qm qi Contact: Li HAN ( [email protected] ) Fig. 6 Comparison of Energy Spectra at Different Count Rates and Different Methods ,i.e. D-PPE (l), DLC (m), DI (r) Fig. 5 Comparison of Dynamic and Conventional Fixed Threshold 1 Wong, W-H., et al. IEEE Trans. Nucl. Sci, 45(3):898–902, 1998

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A VLSI Design for Energy Extraction and Pileup Prevention for High Count-Rate Scintillation Signals. Li HAN, Sam Huh, and Neal H. Clinthorne University of Michigan, Ann Arbor, MI, USA. Eq.(6) Digital PPE uses shifter and look-up-table to calculate energy. I. Goal and Design Rationale - PowerPoint PPT Presentation

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Page 1: Li HAN, Sam Huh, and  Neal H. Clinthorne University of Michigan, Ann Arbor, MI, USA

Li HAN, Sam Huh, and Neal H. ClinthorneUniversity of Michigan, Ann Arbor, MI, USA

A VLSI Design for Energy Extraction and Pileup Prevention for High Count-Rate Scintillation Signals

I. Goal and Design Rationale• Design a Very Large Scale Integration (VLSI) full digital processor to

recover photon energy deposited in a NaI scintillation detector for high event rates where multiple scintillation pulses overlap.

• Digital solutions offer more flexibility and higher noise immunity than digital-analog hybrid active pileup prevention energy (PPE) circuits.

• The full digital PPE algorithm and circuit design not only increases working frequency up to 400MHz, but also avoids floating point multiplication, which could be implemented by the Application Specific Integrated Circuit (ASIC) procedure or Field Programmable Gate Arrays (FPGA) chip.

• The layout of the chip has been implemented using the method of ASIC design flow with the TSMC 0.18um standard cell CMOS technology on CAD system.

II. Methods and AlgorithmsThe active pileup prevention energy (PPE) method:1

• Integrate the present event dynamically until the next is detected.• Estimate a weighted-value to represent the total energy inside the

scintillation detector which includes both the energy from present event and the remnant energy from all the previous events

• Calculate the energy of the latest event by subtracting the residual energy, i.e. a decay-weighted sum of the previous total energy based on the present total energy

Fig.1 The full digital PPE Technology acquired data from 100MHz A/D converter, sampled from NaI scintillation detector (τ = 230ns) at at every 10ns (Ts).

1 1

1 1

3 1

1 1

exp[ ( ) / ]

10{ exp[ ( ) / ]}

(2 2 )

{ (10 exp[ ( ) / ]) 1}

j j j j j s

j j j j s

j

j j j s

E S S n n T

SE SE n n T

SE

inv SE n n T

1 1

( 3) ( 1)

({ 80 exp[ ( ) / 23]} 3) 1

j j

j j j

E SE SE

inv SE n n

Fig.3 Pipelined Energy Extractor with Look up Table

Eq.(2) Sampled Data at point n for pileup events

Eq.(3) The discrete weighted sum Sj and Sj-1 for the jth, (j-1)th gamma ray

Eq.(4) Variable SEj is 10 times less then Sj

Eq.(5) Extract the total energy Ej for the jth pileup gamma ray

Eq.(6) Digital PPE uses shifter and look-up-table to calculate energy

III. PPE-CHIP Architecture

IV. Experimental Results

Eq.(1) Sampled Data at point n for non-pileup events

Fig.2 PPE-CHIP Architecture and Features

Fig.4 PPE-CHIP Internal Structure and Virtuoso CAD Layout

[ ] ( / ) exp[ ( ) / ]j se n E n n T

1 1

[ ] ( / ) exp[ ( ) / ]

( / ) exp[ ( ) / ]

j j s

j j s

q n E n n T

E n n T

0

1

0

1 1

[ ] [ ]

=( ) [ ] [ ]

exp[ ( ) / ]

m

j sn

m

sn

j j j j s

S q m T q n

Ts q m T q n

E E n n T

1 1j jS E

s

1

0

1

0

14 3

0

1

0

/10 (for =230 , T =10)

( ) [ ] /10 [ ] /10

24 [ ] [ ]

2 [ ] 2 [ ] [ ]

( [ ] 4) ( [ ] 3) [ ]

j j

m

s sn

m

n

m

n

m

i

SE S

T q m T q n

q m q n

q m q m q n

q m q m q i

Contact: Li HAN ([email protected])

Fig. 6 Comparison of Energy Spectra at Different Count Rates and Different Methods ,i.e. D-PPE (l), DLC (m), DI (r)

Fig. 5 Comparison of Dynamic and Conventional Fixed Threshold

1Wong, W-H., et al. IEEE Trans. Nucl. Sci, 45(3):898–902, 1998