lic manual

DEPARTMENT OF ELECTRONICS AND COMMUNICATION

ENGINEERING

EC 2258 – LINEAR INTEGRATED CIRCUITS LAB

IV – SEMESTER, ECE

LIST OF EXPERIMENTS:

DESIGN AND TESTING OF 1. OPERATIONAL AMPLIFIER CHARACTERISTICS USING OP-AMP IC

LM/NE/ΜA741

2. INTEGRATOR AND DIFFERENTIATOR CIRCUITS USING OP-AMP IC LM/NE/ΜA741

3. ACTIVE LOW PASS FILTER USING OP-AMP IC LM/NE/ΜA741

4. ACTIVE HIGH PASS FILTER USING OP-AMP IC LM/NE/ΜA741

5. ACTIVE BAND PASS FILTER USING OP-AMP IC LM/NE/ΜA741

6. ASTABLE MULTIVIBRATORS USING OP-AMP IC LM/NE/ΜA741

7. SCHMITT TRIGGER USING OP-AMP IC LM/NE/ΜA741

8. INSTRUMENTATION AMPLIFIER USING OP-AMP IC LM/NE/ΜA741

9. PHASE SHIFT OSCILLATOR USING OP-AMP IC LM/NE/ΜA741

10. WIEN BRIDGE OSCILLATOR USING OP-AMP IC LM/NE/ΜA741

11. MONOSTABLE USING OP-AMP IC LM/NE/ΜA741

12. PRECISION FULL WAVE RECTIFIER USING OP-AMP IC LM/NE/ΜA741

13. ASTABLE USING LM/NE/ΜA555 TIMER IC

14. MONOSTABLE USING LM/NE/ΜA555 TIMER IC

15. PLL CHARACTERISTICS USING PLL IC NE/LM565

16. FREQUENCY MULTIPLIER USING PLL IC NE/LM565

17. DC POWER SUPPLY USING REGULATOR IC LM317

18. DC POWER SUPPLY USING REGULATOR IC LM723 (LOW VOLTAGE & HIGH VOLTAGE TYPE)

Linear Integrated Circuits Lab 1 / 117

19. STUDY OF SMPS (PULSE WIDTH MODULATION & LINEAR TYPE)

20. STUDY OF FUNCTION GENERATOR IC 8038

21. SIMULATION OF INSTRUMENTATION AMPLIFIER CIRCUIT BY USING OP-AMP IN PSPICE NETLIST

22. SIMULATION OF LOW PASS, HIGH PASS AND BAND PASS FILTER CIRCUITS BY USING OP-AMP IN PSPICE NETLIST

23. SIMULATION OF ASTABLE MULTIVIBRARTOR, MONOSTABLE MULTIVIBRATOR AND SCHMITT TRIGGER CIRCUITS BY USING OP-AMP IN PSPICE NETLIST

24. SIMULATION OF WIEN BRIDGE AND RC PHASE SHIFT OSCILLATOR CIRCUITS BY USING OP-AMP IN PSPICE NETLIST

25. SIMULATION OF ASTABLE AND MONOSTABLE MULTIVIBRATOR CIRCUITS BY USING TIMER CHIPS IN PSPICE NETLIST


OPERATIONAL AMPLIFIER CHARACTERISTICS

Exp. No : 1 Date :

AIM : To design and find the characteristics of operational amplifier circuits

i) Inverting Amplifier

ii) Non-inverting Amplifier

iii) Input Offset Voltage

iv) Input Offset Current

v) Voltage Follower

vi) Slew Rate

APPARATUS REQUIRED:

Sl. No: Apparatus Name Range Qty.

1 Operational Amplifier IC 741 1

2 Resistors 1 KΩ 1

3 Bread Board 1

4 Regulated Power Supply + 15V, Dual 1

5 Function Generator (1Hz – 1MHz.) 1

6 Cathode Ray Oscilloscope 20 / 40MHz, Dual Trace 1

7 Connecting Wires & CRO Probes

THEORY:

Inverting Amplifier:If the signal is applied to the inverting input terminal and the circuit is

shown in fig. This is most widely used of all the Op-amp circuits. The output voltage (Vo) is fed

back to the inverting input terminal through the Rf - R1 network where Rf is feedback resistor.

Input signal (Vi) is applied to the inverting input terminal through R1 and the non-inverting input

terminal is grounded.

The gain of the inverting amplifier is


Gain (Av) = Vo / Vi = - Rf / R1

Negative Sign indicates a phase shift of 180 between Vi and Vo.

Therefore Vo is equal to

Non-inverting Amplifier:If the signal is applied to the Non-inverting input terminal and the feedback is given shown in fig.

The circuit amplifies without inverting the input signal. Such a circuit is called Non-inverting

amplifier. It is also called as negative feedback system as output is being fed back to the inverting

terminal. The gain of the inverting amplifier is

The gain can be adjusted to unity or more, by proper selection of resistors R f and R1. Therefore

Vo is equal to

Compared to the inverting amplifier, the input resistance of the Non-inverting amplifier

is high as the op-amp draws negligible current from the signal source.

Input Offset Voltage and Input Bias Current:The input offset voltage can range from micro volts to milli volts and can be either

polarity. The Input Offset Voltages across R1 and R2 should be same Voltages VR1= VR2. Bipolar

Op amps have lower offset voltages than JFET or CMOS types. The offset voltage is modeled in

series with one of the Op amp input terminals.

Depending on the type of input transistor, the bias current can flow in or out of the input

terminals. The input current is modeled as current sources, Ib1 and Ib2, in parallel with the

negative and positive input terminals respectively. The magnitudes can range from μA down to

pA. Generally speaking, JFET or CMOS op amps have smaller bias currents than BJT types.

Although Ib1 and Ib2 are similar in magnitude, there not exactly the same. This average, called

the Average Input Bias current, is described by


Gain Av = Vo / Vi = 1 + (Rf / R1)

Vo = -(Rf / R1 )Vi

Vo = [1 + (Rf / R1)] Vi

Ib1= Input Offset Voltage across R1 / R1

Ib2= Input Offset Voltage across R2 / R2

The average of the current entering in to the (-) input and (+) input is referred to as input bias

current. It is 200na maximum for IC 741.

Voltage Follower:Used as a buffer amplifier, to eliminate loading effects or to interface impedances

(connecting a device with a high source impedance to a device with a low input impedance)

Zin = infinitive. (Realistically, the differential input impedance of the op-amp itself, 1 MΩ to 1 TΩ)

In voltage follower, the output voltage is equal to input voltage both in magnitude and

phase. It is also defined as that the output voltage follows the input voltage exactly. It is also

referred as unity gain amplifier. If Rf = 0 and R1 = in the non inverting amplifier, we get the

modified circuit of voltage follower. It is used as buffer for impedance matching.

Slew Rate:Slew rate is defined as the maximum rate of change of output voltage caused by a step

input voltage. Slew rate limits the response speed of all large signal wave shapes. Slew rate

causes remarkable distortion for non sinusoidal waveform of higher frequencies. Limitations in

slew rate capability can give rise to non linear effects in electronic amplifiers. It is usually

specified in V/ s.

Where, ‘f’ is frequency and ‘V’ is amplitude of the signal.

PIN DIAGRAM:

2LM 741

4

3

1

6

5

Offset Null 8

7

-Vcc

Non Inv. Input

Inv. Input +Vcc

No Connection

Offset Null

Output


Average Input Bias Current = [(Ib1) + (Ib2)] / 2

SLEW RATE = 2пfV (V/ s)

Vo = Vi

http://en.wikipedia.org/wiki/Input_impedance

http://en.wikipedia.org/wiki/Source_impedance

http://en.wikipedia.org/wiki/Buffer_amplifier

DESIGN & CALCULATIONS IF ANY:

Inverting Amplifier: Non-inverting Amplifier:

For Gain of For Gain of

Let, Ri = 1KΩ Let, Ri = 1KΩ

Av = - (Rf / Ri) Av = 1 + (Rf / Ri)

Rf = Rf =

CIRCUIT DIAGRAM:


CRO

+

-LM741

+12V

-12V

2

36

741V (p-p)

Sine I/P

Output

Rf =

FG, 1KHz

Ri = 1K

INVERTING AMPLIFIER

FG, 1KHz

NON-INVERTING AMPLIFIER

Sine I/P1V (p-p)

+

-LM741

+12V

-12V

2

36

74

Rf =

OutputRi = 1K

CRO


+

-LM741

+12V

-12V

2

36

74

10KVR1

INPUT OFFSET VOLTAGE & BIAS CURRENT

VR2

Output

10K

CROFG, 1KHz

VOLTAGE FOLLOWER

+

-LM741

+12V

-12V

2

36

74

Sine I/P

Output

1V (p-p)

CRO100KHz & Above

Square I/P

SLEW RATE

+

-LM741

+12V

-12V

2

36

741V (p-p)

Output

MODEL GRAPH:

1. Inverting Amplifier 2. Non-inverting Amplifier

Input Signal Input Signal

Amplitude Amplitude (Volts) (Volts)

Time (ms) Time (ms)

Output Signal (amplified and out of phase) Output Signal (amplified and in phase)


Time (ms) Time (ms)


MODEL GRAPH: 4. Slew RateInput Signal

3. Voltage Follower Amplitude

Input Signal (Volts)

Amplitude (Volts)

Time (ms)

Time (ms)

Output Signal (around 100 KHz Freq.)

AmplitudeOutput Signal (Volts)(in phase and same magnitude)

Time (ms)

Time (ms) Output Signal (above 100 KHz Freq.)

Amplitude (Volts)

Time (ms)


TABULAR COLOUMN:

1. Inverting Amplifier:

Input Voltage (V) Output Voltage (V) Gain = - (Rf /Ri) Vin

2. Non-inverting Amplifier:

Input Voltage (V) Output Voltage (V) Gain =[ 1 + (Rf /Ri)] Vin

3. Input Offset Voltages and Input Offset Current:

Offset Voltage

across R1

Offset Voltage across R2

Input Bias Current

(Ib1 / Ib-)

Input Bias Current

(Ib2 / Ib+)

Avg. Bias Current = [(Ib1) + (Ib2)] / 2

4. Voltage Follower:

Input Voltage (V) Output Voltage (V) Gain = Vout / Vin

5. Slew Rate:

Input Voltage (V) Output Voltage (V) Slew Rate = 2пfV (V/ s)


PROCEDURE:1. Inverting Amplifier:

i) Connections are made as per circuit diagram.ii) Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V (p-

p) and 1 KHz respectively.iii) Observe the input and output waveform simultaneously using Dual Trace CRO.iv) Tabulate the readings and verify it using theoretical calculations.v) Draw the input and output waveforms in Graph sheet.

2. Non-inverting Amplifier: i) Connections are made as per circuit diagram.ii) Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V

(p-p) and 1 KHz respectively.iii) Observe the input and output waveform simultaneously using Dual Trace CRO.iv) Tabulate the readings and verify it using theoretical calculations.v) Draw the input and output waveforms in Graph sheet.

3. Input Offset Voltage and Input Offset Current: i) Connections are made as per circuit diagram.ii) Measure the Input offset Voltages across the input resistance R1 and R2, which

are connected in input terminals of the Op-amplifier IC using DMM. iii) The Voltages across R1 and R2 are in range of some milli volts or microvolts.iv) Find the Input Bias Current using the Formula and tabulate the readings.

4. Voltage Follower: i) Connections are made as per circuit diagram.ii) Set sine wave input voltage at any fixed voltage and fixed frequency say, 1V

(p-p) and 1 KHz respectively.iii) Observe the input and output waveform simultaneously using Dual Trace CRO.

(Both input and output waveforms are should be same phase and same magnitude)

iv) Draw the input and output waveforms in Graph sheet.

5. Slew Rate: i) Connections are made as per circuit diagram.ii) Set square wave input voltage at any fixed voltage and fixed frequency say, 1V

(p-p) and 1 KHz respectively.iii) Vary the Frequency, at high frequency (around 100KHz and above) square wave

get change to Trapezoidal and further increase of frequency it change to triangle waveform.

iv) Calculate the Slew Rate from the waveform and verify it using theoretical formula.

v) Draw the input and output waveforms in Graph sheet.

RESULT:


VIVA VOCE:1. What do you mean by input offset current and input offset voltage?

Input offset current:The algebraic difference between the current into the inverting and non-inverting

terminals is referred to as input offset current Iio. Mathematically it is represented as Iio = |IB

+- IB-|

Where IB+ is the current into the non-inverting input terminals.

IB- is the current into the inverting input terminals.

Input offset voltage: This is the voltage required to be amplified at the input for making output voltage to zero volts.

2. For the difference amplifier shown in fig. Calculate Vc1 and Vc2 if V1 = V2 = 0V.Assume Vbe = 0V.

10K

Vcc=10V

V2

Vc1

1K

500 Ohm

Vee = -10V

1K

FG

50 Ohm

V1

Vc2

3. In response to square wave input, the output of an op-amp changed from –3V to +3V over a time interval of 0.25μs. Determine the slew rate of the op-amp.

(May 06/08)Slew rate = dvc/dt / max

= ∆Vo/∆t

= 6V / 0.25µS

= 24 V/µS

4. What is an operational amplifier? The operational amplifier is a multi-terminal device, which is quite complex

internally. An operational amplifier is a direct coupled high gain amplifier usually consisting of one or more differential amplifiers and usually followed by a level translator and an output stage. An operational amplifier is available as a single integrated circuit package. It is a versatile device that can be used to amplify dc as well as ac input signals and was originally designed for computing such mathematical functions.

5. Define CMRR of an operational amplifier? The common mode rejection ratio (CMRR) can be defined as the ratio of differential

gain to common mode gain.CMRR = |Ad/Ac|


6. Write down the characteristics of ideal operational amplifier? a. Open loop voltage gain, (AOL) = ∞b. Input impedance (Ri) = ∞c. Output impedance (Ro) = 0d. Bandwidth (BW) = ∞e. Zero offset Vo = 0, when V1 = V2 = 0

7. Define slew rate? Slew rate can be defined as the maximum rate of change of output voltage of op-

amp with respect to time. It is expressed as S = (dVo / dt) max in V/Sec.Where slew rate S = 2П f Vm in V/Sec.

8. What is the cause for slew rate and how it can be made faster?

There is a capacitor within or outside an op-amp to prevent oscillation. It is this capacitor which prevents the output voltage from responding immediately to a fast changing input .The slew rate can be made faster by having a higher current or a small compensating capacitor.

9. What are the methods to improve slew rate?

The slew rate can be improved with higher closed-loop gain and dc supply voltage. But the slew rate also varies with temperature. i.e., slew rate decreases with increase in temperature.Another method for improving slew rate is, the rate at which voltage across the capacitor increases is gain by,dVc/dt = I / C.

Where, I is the maximum current furnished by the op-amp to the capacitor C. From the equation it is clear that for a higher slew rate, op-amp should have either a higher current or a small value of capacitor.

10. What are the AC characteristics of an op-amp?

i. Frequency responseii. Slew rate

11. What are the DC characteristics of an op-amp? Give the typical values for an IC741?

i. Input bias current : 500 nAii. Input offset current : 200 nA

iii. Input offset voltage : 6mViv. Thermal drift


INTEGRATOR AND DIFFERENTIATOR USING OP-AMP.

Exp. No : 2 Date : AIM:

To construct the Integrator and Differentiator circuits using Op-amp. IC and study

the output waveforms.

APPARATUS REQUIRED:



2 Resistors 1 KΩ

10 KΩ

2

1

3 Capacitor 0.1μF

4 Bread Board 1





THEORY:

Integrator produces a voltage output proportional to the product (multiplication) of

the input voltage and time; and the differentiator (not to be confused with differential)

produces a voltage output proportional to the input voltage's rate of change.

Differentiator:

Capacitance can be defined as the measure of a capacitor's opposition to changes in

voltage. The greater the capacitance, the more the opposition. Capacitors oppose voltage

change by creating current in the circuit: that is, they either charge or discharge in

response to a change in applied voltage. So, the more capacitance a capacitor has, the


greater its charge or discharge current will be for any given rate of voltage change across it.

The equation for this is quite simple:

The dv/dt fraction is a calculus expression representing the rate of voltage changes

over time.

Capacitor current moves through the feedback resistor, producing a drop across it,

which is the same as the output voltage. A linear, positive rate of input voltage change will

result in a steady negative voltage at the output of the Op-amp. Conversely, a linear,

negative rate of input voltage change will result in a steady positive voltage at the output of

the op-amp. The faster the rate of voltage changes at the input (either positive or negative),

the greater the voltage at the output.

The formula for determining voltage output for the differentiator is as follows:

Integrator:

Here, the op-amp circuit would generate an output voltage proportional to the

magnitude and duration that an input voltage signal has deviated from 0 volts. Stated

differently, a constant input signal would generate a certain rate of change in the output

voltage: differentiation in reverse. To do this, all we have to do is swap the capacitor and

resistor in the previous circuit:

A simple low pass RC circuit can also work as an Integrator when time constant is

very large. This requires very large values of R and C. The components R and C cannot be

made infinitely large because of practical limitations. However in the op-amp integrator by

Miller’s theorem, the effective input capacitance becomes Cf (1-Av), where Av is the gain of

the Op-amp. The Gain (Av) is the infinite for an ideal Op-amp, so the effective time

constant of the Op-amp Integrator becomes very large which results perfect integration.


i = C (dv/dt)

Vout = -RC d/dt (Vin)

The integrator produces a voltage output proportional to the product (multiplication) of the

input voltage and time

However, if we apply a constant, positive voltage to the input, the Op-amp output

will fall negative at a linear rate, in an attempt to produce the changing voltage across the

capacitor necessary to maintain the current established by the voltage difference across the

resistor. Conversely, a constant, negative voltage at the input results in a linear, rising

(positive) voltage at the output. The output voltage rate-of-change will be proportional to

the value of the input voltage.

The formula for determining voltage output for the integrator is as follows:


Integrator: Differentiator:

CIRCUIT DIAGRAM:


FG , 1 K H z

O u tp u t

I N T E G R A T O R C I R C U I T

1 K

0 .1 µ F

1 V (p -p )

1 K

S q u a r e I /P

1 0 K

+

-L M 7 4 1

+ 1 2 V

-1 2 V

2

36

74

C R O

0 .1 µ F

1 0 K

D I FFE R E N T I A T O R C I R C U I T

O u tp u t

FG , 1 K H zC R O1 V (p -p )

1 K

+

-L M 7 4 1

+ 1 2 V

-1 2 V

2

36

74S q u a r e I /P

MODEL GRAPH:


Integrator Differentiator

Input Signal (1 KHz Freq.) Input Signal (1 KHz Freq.)


Time (ms) Time (ms)

Output Signal (1 KHz Freq.) Output Signal (1 KHz Freq.)

Amplitude Amplitude(Volts) (Volts)

Time (ms) Time (ms)

TABULAR COLOUMN:

INTEGRATOR DIFFERENTIATOR

Input Signal Output Signal

Amplitude

Time Period

Frequency

PROCEDURE:


1. Construct the circuit as per Circuit diagram shown in figure.

2. Select the Square waveform in Function Generator and set fixed amplitude and

fixed frequency say 1V (p-p) and 1 KHz respectively.

3. The resistance Rcomp is also connected to the Non-inverting input terminal to

minimize the effect of the input bias current.

4. Note the corresponding input and output signals (refer model graph) for both

Circuits.

5. Note the gain of the integrator decreases with increasing frequency.

6. Tabulate the noted readings and draw the input and output waveforms in Graph

sheet.

RESULT:

VIVA VOCE:


1. What are the main drawbacks of ideal differentiator? At high frequency, differentiators may become unstable and break into oscillation. The input impedance i.e. (1/ωC1) decreases with increase in frequency, thereby making the circuit sensitive to high frequency noise.

2. What are the steps to be followed while designing a good differentiator?

Choose fa equal to highest frequency of the input signal. Assume a practical value of C1 (<1µF) and then calculate Rf.Choose fb=10fa (Say). Now calculate the values of R1 and C1.R1C1 = RfCf.

3. What are the main drawbacks of ideal integrator circuit?

At low frequencies such as dc (ω ≈ 0) the gain becomes infinite.When the op-amp saturates i.e. the capacitor is fully charged it behaves like an open circuit.

SECOND ORDER ACTIVE LOW PASS FILTER.


Exp. No : 3

Date : AIM:

To Design and Construct a second order low pass filter having upper cut off

frequency 1 KHz using Op-amp. IC and also determine its frequency response.

APPARATUS REQUIRED:



2 Resistors 10 KΩ

1.5 KΩ

5.6 KΩ

1

21

3 Capacitor 0.1μF 2

4 Bread Board 1





THEORY:An improved filter response can be obtained by using a Second order Active

Filter. A second order filter consists of two RC pairs and has a roll-off rate of -40

dB/decade. A general second order filter (Sallen Kay filter) is used to analyze

different LP, HP, BP and BSF. A first order filter can be converted to second order

type using an additional RC network as shown in circuit diagram. The cut off

frequency fH for the filter is now decided by R and C. The gain of the filter is usual

decided by op-amp i.e. the resistance R3 and Rf.


Given: fH = 1 KHz = 1/ (2RC)


Let C = 0.1 F, R = 1.6 KFor n = 2, (damping factor) = 1.414,Pass Band Gain = Ao = 3 - =3 – 1.414 = 1.586.

Transfer function of second order Butter worth LPF as:

1.586 H(s) = --------------------------------------

S2 + 1.414 s + 1

Now Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586

Let Ri = 10 K, then Rf = 5.86 K

CIRCUIT DIAGRAM:

1V (p-p)Sine I/P

(1Hz - 100 KHz)

0.1µF0.1µF

Output

Ri = 1.5K

SECOND ORDER ACTIVE LOW PASS FILTER

R = 1.5K +

-LM741

+12V

-12V

2

36

74

R1= 10 K

CRO

Rf = 5.6 K

MODEL GRAPH:


Gain in dB3dB

(fH = Cut off Freq.) Log Frequencies in Hz.

TABULAR COLOUMN: Vin =

Sl.No. Frequency (Hz) Vout (V) Gain = Vo / Vin Gain in dB = 20 log Gain1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

PROCEDURE:



2. Select the Sine waveform in Function Generator and set fixed amplitude and fixed

frequency say 1V (p-p) and 1 KHz respectively.

3. Observe the output waveform for different frequency ranges (start from 50 Hz to

beyond some value of cut of frequency)

4. Note the readings observed on CRO and find its gain for different frequency ranges.

5. Draw the graph for its Gain in dB Vs. Frequency and find its Cut off frequency.

RESULT:

VIVA VOCE:


1. What are the main drawbacks of ideal differentiator? At high frequency, differentiators may become unstable and break into oscillation. The input impedance i.e. (1/ωC1) decreases with increase in frequency, thereby making the circuit sensitive to high frequency noise.

2. What are the steps to be followed while designing a good differentiator?

Choose fa equal to highest frequency of the input signal. Assume a practical value of C1 (<1µF) and then calculate Rf.Choose fb=10fa (Say). Now calculate the values of R1 and C1.R1C1 = RfCf.

3. What are the main drawbacks of ideal integrator circuit?

At low frequencies such as dc (ω ≈ 0) the gain becomes infinite.When the op-amp saturates i.e. the capacitor is fully charged it behaves like an open circuit.


SECOND ORDER ACTIVE HIGH PASS FILTER.

Exp. No : 4

Date : AIM:


frequency 1 KHz using Op-amp. IC and also determine its frequency response.

APPARATUS REQUIRED:



2 Resistors


4 Bread Board 1








different LP, HP, BP and BSF. A first order filter can be converted to second order

type using an additional RC network as shown in circuit diagram. The cut off

frequency fL for the filter is now decided by R and C. The gain of the filter is usual

decided by op-amp i.e. the resistance R3 and Rf.



Given: fL = 1 KHz = 1/ (2RC)

Let C = 0.1 F, R = 1.6 KFor n = 2, (damping factor) = 1.414,Pass Band Gain = Ao = 3 - =3 – 1.414 = 1.586.

Transfer function of second order Butter worth HPF as:

1.586 H(s) = --------------------------------------

S2 + 1.414 s + 1

Now Ao = 1 + (Rf / R1) = 1.586 = 1 + 0.586

Let Ri = 10 K, then Rf = 5.86 K

CIRCUIT DIAGRAM:SECOND ORDER ACTIVE HIGHPASS FILTER CIRCUIT DIAGRAM

2

36

74

+

-

+Vcc

O/P

-Vcc

NI

INV741

R =

R f =1 0 KR 3 =1 K

(1Hz-1MHz)

FG

C=0.1µF

-12V

+12V

R =

C=0.1µF

CRO

MODEL GRAPH:


Gain in dB 3dB

(fL = Cut off Freq.) Log Frequencies in Hz.



2

3

4

5

6

7

8

9

10

11

12

13

14

15

PROCEDURE:






beyond some value of cut of frequency, observe the output signal which pass beyond

the higher cut of frequency)



RESULT:

ACTIVE BAND PASS FILTER.

Exp. No : 5


Date : AIM:


frequency 400 Hz and lower cut of frequency for 2 KHz using Op-amp. IC and also

determine its frequency response.

APPARATUS REQUIRED:



2 Resistors


4 Bread Board 1








different LP, HP, BP and BSF. Band pass filter is a combination of High pass and

Low pass filter. A Band pass filter is basically a frequency selector. It allows one

particular band of frequencies to pass. Its pass band between two cut off frequencies

fH and fL. The pass band which is between fH and fL is called Bandwidth of the filter

denoted as BW.



Bandwidth = fH - fL

Given: fH = 400Hz = 1/ (2RC)

Let C = 0.1 F, R =

Similarly, for LPF fL = 2KHz = 1/ (2RC)

Let C = 0.1 F, R =

CIRCUIT DIAGRAM:

2

36

74

+

-

+Vcc

O/P

-Vcc

NI

INV741

2

36

74

+

-

+Vcc

O/P

-Vcc

NI

INV741

R 1 =

R f =1 0 K

R 2 =

R 3 = 1 K

C2=0.1µF

R f =1 0 K

FG(1Hz-1MHz)

CRO

ACTIVE BANDPASS FILTER CIRCUIT DIAGRAM

C1=0.1µF

R 4 = 1 K

-12V

+12V+12V

-12V

MODEL GRAPH:


Gain in dB 3 dB

Pass Band

(fL = Cut off Freq.) (fH = Cut off Freq.) Log Freq. in Hz.



2

3

4

5

6

7

8

9

10

11

12

13

14

15

PROCEDURE:






beyond some value of cut of frequency, observe the output signal which pass beyond

the higher cut of frequency and it attenuates from lower cut of frequency)



RESULT:

VIVA VOCE:

1. State the disadvantages of passive filters? At audio frequencies inductors becomes problematic, as the inductors become

large, heavy and expensive. For low frequency application, more number of turns of wire must be used which in turn adds to the series resistance degrading inductors

performance.

2. Derive the expression for voltage gain of an inverting operational amplifier?

ACL = Vo/Vi = -Rf / R1

ASTABLE MULTIVIBRATOR USING OP-AMP IC

Exp. No : 6


Date : AIM:

To Design and Construct an Astable Multivibrator using Op-amp 741 IC.

APPARATUS REQUIRED:



2 Resistors 1 KΩ

4.7 KΩ

2

1

3 Capacitor 0.1 F 1

4 Bread Board 1




THEORY:A simple op-Amp square wave generator is also called as free running oscillator; the

principle of generation of square wave output is to force an op-amp to operate in the

saturation region. A fraction =R2/(R1+R2) of the output is fed back to the (+) input

terminal. The output is also fed to the (-) terminal after integrating by means of a low pass

RC combination in Astable Multivibrator both the states are quasi stables.

The frequency is determined by the time taken by the capacitor to charge from -Vsat to

+Vsat.

CIRCUIT DIAGRAM:


SQUARE WAVE GENERATOR

Output

1K

CRO

1K0.1µF

Rf = 4.7 K

+

-LM741

+12V

-12V

2

36

74

MODEL GRAPH:

+ Vsat

+ Vsat

Amplitude (V)

Time (ms) - Vsat

- Vsat

Time

DESIGN & CALCULATIONS IF ANY: Let R1=R2=1K then,


= R2 / (R1+R2)

= 1K / (1K+1K) = 0.5

Given, Frequency say 1KHz then T = 1ms.

Let C = 0.1F.

T = 2RC ln[(1+) / (1-)]

1ms = 2*R*0.1* ln[(1+0.5) / (1-0.5)]

R = 4.7 KΩ

TABULAR COLOUMN:

OUTPUT WAVEFORM AT PIN NO: 6 WAVEFORM ACROSS CAPACITOR

Square wave Signal Ramp wave Signal

Amplitude (V) Amplitude (V)

Time Period (Ton+Toff)


Frequency (1/T) Frequency (1/T)

PROCEDURE:



2. Switch ON the RPS and CRO.

3. Observe the Square waveform at output pin of the IC and Ramp waveform across

the capacitor.

4. Note the readings and draw the waveforms in Graph Sheet.

5. Verify the observed frequency with our calculated frequency.

RESULT:

SCHMITT TRIGGER


Exp. No : 7

Date : AIM:

To Construct Schmitt Trigger Circuit using Operational Amplifier 741 IC and

determine its Upper and Lower Threshold Voltages.

APPARATUS REQUIRED:



2 Resistors 2.2 KΩ

220Ω

1

2


4 Bread Board 1




THEORY:

Schmitt trigger is useful in squaring of slowly varying i/p waveforms. Vin is

applied to inverting terminal of Op-amp. Feedback voltage is applied to the non-

inverting terminal. LTP is the point at which output changes from high level to low

level. This is highly useful in triangular waveform generation, wave shape pulse

generator, A/D converter etc.

CIRCUIT DIAGRAM:


4V (p-p)

220

220Output

SCHMITT TRIGGER CIRCUIT

CRO

+

-LM741

+12V

-12V

2

36

74SineI/P

2.2KFG, 1KHz


VUT = (R1 / (R1+R2)) * (+Vsat)

VLT = (R1 / (R1+R2)) * (-Vsat)

+Vsat = +Vcc = +15V and -Vsat = -Vcc = -15V

Let R1 = 2.2 K and R2=220 then

VUT = (2.2K / (2.2K+220)) * (+15)

VLT = (2.2K / (2.2K+220)) * (-15)

MODEL GRAPH:


Input Waveform:

Amplitude

VUT

Time (ms) VLT

VsatAmplitude

Time (ms)

Vsat

TABULAR COLOUMN:


INPUT WAVEFORM OUTPUT WAVEFORM

Sine wave Signal Square wave Signal


Time Period (ms) Time Period (ms)

Theoretically

Practically

VUT = VLT =

VUT = VLT =

PROCEDURE:


2. Switch ON the Equipments and set 4V (p-p), 1 KHz sine wave in Function

Generator.

3. Observe the Input and Output waveforms and find its Upper Threshold and Lower

Threshold Voltages and verify its values with theoretical calculation.


RESULT:

VIVA VOCE:


1. Mention two linear and two non- linear operations performed by an operational amplifier?

Linear operations: Adder, Subtractor, Voltage to current converter, Current to voltage converter, Instrumentation amplifier, Analog computation, and Power amplifier. Non-linear operations: Rectifier, Peak detector, Clipper, Clamper, Sample and hold circuits, Log and antilog amplifier and Multiplier.

2. Mention two application of Schmitt trigger? For eliminating comparator chatter. In ON/ OFF controller.Square wave generation

INSTRUMENTATION AMPLIFIER


Exp. No : 8

Date : AIM:

To design and construct Instrumentation Amplifier Circuit using Op-amp IC.

APPARATUS REQUIRED:



2 Resistors 10 KΩ 7

3 Bread Board 1

4 Regulated Power Supply (Variable) + 15V, Dual 4

5 Multimeter 1


THEORY:

An instrumentation amplifier is a type of differential amplifier that has been

specifically designed to have characteristics suitable for use in measurement and test

equipment. These characteristics include very low DC offset, low drift, low noise, very high

open-loop gain, very high common-mode rejection ratio, and very high input impedances.

They are used where great accuracy and stability of the circuit both short- and long-term

are required.

The most commonly used instrumentation amplifier circuit is shown in the figure. The gain

of the circuit is


http://en.wikipedia.org/wiki/Electrical_network

http://en.wikipedia.org/wiki/Stability

http://en.wikipedia.org/wiki/Accuracy

http://en.wikipedia.org/wiki/Input_impedance

http://en.wikipedia.org/wiki/Common-mode_rejection_ratio

http://en.wikipedia.org/wiki/Open-loop_gain

http://en.wikipedia.org/wiki/Noise_(physics)

http://en.wikipedia.org/wiki/Drift

http://en.wikipedia.org/wiki/Direct_current

http://en.wikipedia.org/w/index.php?title=Test_equipment&action=edit

http://en.wikipedia.org/w/index.php?title=Test_equipment&action=edit

http://en.wikipedia.org/wiki/Differential_amplifier

The ideal common-mode gain of an instrumentation amplifier is zero. In the circuit shown,

common-mode gain is caused by mismatches in the values of the equally numbered resistors

and by the non-zero common mode gains of the two input op-amps. Obtaining very closely

matched resistors is a significant difficulty in fabricating these circuits, as is optimizing the

common mode performance of the input op-amps.


Let R1= R2 = R3 = Rgain = 10 K then

Vout = (1+2) (V2-V1)

Vout = 3 (V2-V1)


http://en.wikipedia.org/wiki/Resistor

CIRCUIT DIAGRAM:

10K

+

-LM741

+12V

-12V

2

36

74

10K

10K10K

+

-LM741

+12V

-12V

2

36

74

Output

DMM

10K

INSTRUMENTATION AMPLIFIER USING 741 IC.

10K

+

-LM741

+12V

-12V

2

36

74

10K

TABULAR COLOUMN:

SL.NO.INPUTS OUTPUT

V1 (V) V2 (V) Theoretically (V) Practically (V)1

2

3

4

5

6

7


PROCEDURE:


2. Switch ON IC Power Supplies and apply the Input Voltages at Non-inverting input

terminals.

3. Observe the Output Voltage using Digital Multimeter for different input voltages.

4. Note the readings and verify its values with theoretical calculation.

RESULT:

RC PHASE SHIFT OSCILLATOR USING OP-AMP 741 IC.

Exp. No : 9

Date : AIM:

To Design and construct RC Phase Shift Oscillator Circuit using IC 741 and observe

its output waveform.

APPARATUS REQUIRED:




2 Resistors


4 Bread Board 1




THEORY:

A phase shift oscillator is a simple sine wave electronic oscillator. It contains an

inverting amplifier, and a feedback filter, which 'shifts' the phase by 180 degrees at the

oscillation frequency.

The filter must be designed so that at frequencies above and below the oscillation

frequency, either more or less than 180 degrees shifts the signal. This results in constructive

superposition for signals at the oscillation frequencies, and destructive superposition for all

other frequencies.

The mathematics for calculating the oscillation frequency and oscillation criteria for this

circuit are surprisingly complex, due to each R-C stage loading the previous ones. The

calculations are greatly simplified by setting all the resistors (except the negative feedback

resistor) and all the capacitors to



http://en.wikipedia.org/wiki/Negative_feedback

http://en.wikipedia.org/wiki/Electronic_filter

http://en.wikipedia.org/wiki/Phase_(waves)

http://en.wikipedia.org/wiki/Feedback

http://en.wikipedia.org/wiki/Electronic_oscillator

http://en.wikipedia.org/wiki/Sine_wave

Given Frequency = 1 KHz

Let C = 0.1F and

R = 1 / (2 * 0.1 * (6) 1/2 * 1K)

R1 = 10R and

Rf = 29R1 or greater.

CIRCUIT DIAGRAM:


R =

RC PHASE SHIFT OSCILLATOR CIRCUIT

CRO

Rf > 29 R1

C = 0.1µF

Output

R1 = 10 R

C = 0.1µF

+

-LM741

+12V

-12V

2

36

74

R =

C = 0.1µF

R =

MODEL GRAPH:

Amplitude

(V)

Time (ms)

TABULAR COLOUMN:


Output signal is Sine wave form AMPLITUDE (V) TIME PERIOD (ms) FREQUENCY (Hz)

Theoretical

Observed value

PROCEDURE:


2. Switch On the Equipments and observe the Output waveform on CRO.

3. Note the readings and verify its frequency with theoretical frequency.

4. Draw the waveform on Graph Sheet.

RESULT:

WIEN BRIDGE OSCILLATOR USING OP-AMP 741 IC.


Exp. No : 10

Date :

AIM:To Design and construct Wien Bridge Oscillator Circuit using IC 741 and observe its

output waveform.

APPARATUS REQUIRED:



2 Resistors


4 Bread Board 1




THEORY:

A Wien bridge oscillator is a type of electronic oscillator that generates sine waves

without having any input source. It can output a large range of frequencies. The bridge

comprises four resistors and two capacitors. The circuit is based on a network originally

developed by Max Wien in 1891.

In Wien bridge oscillator, wien bridge circuit is connected between the amplifier

input terminals and output terminals. The bridge has a series RC network in one arm and

parallel network in the adjoining arm. In the remaining 2 arms of the bridge resistors

R1and Rf are connected. To maintain oscillations total phase shift around the circuit must

be zero and loop gain unity. First condition occurs only when the bridge is balanced.


http://en.wikipedia.org/wiki/Max_Wien

http://en.wikipedia.org/wiki/Capacitor

http://en.wikipedia.org/wiki/Resistor

http://en.wikipedia.org/wiki/Sine_wave

http://en.wikipedia.org/wiki/Electronic_oscillator

Assuming that the resistors and capacitors are equal in value, the resonant frequency of

balanced bridge is given by / the frequency of oscillation is given by:


Given Frequency = 1 KHz

Let C = 0.1F and

R = 1 / (2 * 0.1 * 1K)

R1 = 10R and

Rf = 2R1 or greater.

CIRCUIT DIAGRAM:


CRO

C = 0.1µF

Output

WEIN BRIDGE OSCILLATOR CIRCUIT

C = 0.1µFR =

R =

Rf = 2 R1

+

-LM741

+12V

-12V

2

36

74

R1 = 10 R

MODEL GRAPH:

Amplitude

(V)

Time (ms)

TABULAR COLOUMN:


Input signal is Sine wave form AMPLITUDE (V) TIME PERIOD (ms) FREQUENCY (Hz)

Theoretical

Observed value

PROCEDURE:



3. Note the readings and verify its frequency with theoretical frequency.

4. Draw the waveform on Graph Sheet.

RESULT:

VIVA VOCE:


1. What are the conditions to be satisfied for sustained oscillation? The magnitude conditions are |AV| = 1

AV = 0o or 360o

2. Why there is no phase shift provided in the feedback network in Wein-Bridge oscillator? (Apr 2005)

In Wein-bridge oscillator, the feedback signal is connected to the (+) input terminal so that, the op-amp is working as a non-inverting amplifier, which produces 0 degree or 360 degree phase shift.. Therefore the feedback network need not provide any phase shift.

MONOSTABLE MULTIVIBRATOR USING OP-AMP IC

Exp. No : 11

Date :


AIM:To Design and Construct a Monostable Multivibrator using Op-amp 741 IC. Draw

its input and output signals.

APPARATUS REQUIRED:



2 Resistors

3 Capacitor 0.1 F 1

4 Diode 1N 4007 2

5 Bread Board 1




THEORY:Monostable multivibrator (MMV) has one stable state and one quasi-stable state.

The circuit remains in its stable state till an external triggering pulse causes a transition to

the quasi-stable state. The circuit comes back to its stable state after a time period T. Thus

it generates a single output pulse in response to an input pulse and is referred to as a one-

shot or single shot.

Monostable multivibrator circuit illustrated in figure is obtained by modifying

the astable multivibrator circuit by connecting a diode D1 across capacitor C so as to

clamp vc at vd during positive excursion.

Under steady-state condition, this circuit will remain in its stable state with the output VOUT = +VOUT or +Vz and the capacitor C is clamped at the voltage VD(on-voltage of diode VD = 0.7 V). The voltage VD must be less than β VOUT for Vin < 0. The circuit can be switched to the other state by applying a negative pulse with amplitude greater than β VOUT – VD to the non-inverting (+) input terminal.

When a trigger pulse with amplitude greater than β VOUT – VD is applied, Vin goes positive causing a transition in the state of the circuit to -Vout. The capacitor C now


http://www.circuitstoday.com/square-wave-generator-using-op-amp

charges exponentially with a time constant τ = RfC toward — VOUT (diode Dl being reverse-biased). When capacitor voltage Vc becomes more negative than – β VOUT, Vin becomes negative and, therefore, output swings back to + VOUT (steady- state output). The capacitor now charges towards + VOUT till Vc attain VD and capacitor C becomes clamped at VD. The trigger pulse, capacitor voltage waveform and output voltage waveform are shown in figures respectively.

The width of the trigger pulse T must be much smaller than the duration of the output pulse generated i.e. TP « T. For reliable operation the circuit should not be triggered again before T.

CIRCUIT DIAGRAM:

MONOSTABLE MULTIVIBRATOR USING OP-AMP IC CIRCUIT DIAGRAM

2

36

74

+

-

+Vcc

O/P

-Vcc

NI

INV741

R 3 =2 K 2

FG

(1Hz-1MHz)

+12V

-12VR 4 =1 K

C2=10nF

CRO

R 1 =1 0 K

D 2

D 1

C1=0.1µF1

R 2 =1 0 K


During the quasi-stable state, the capacitor voltage is given as

Vc = – VOUT + (VOUT + VD)e-t/τ

At instant t = T, Vc = – β VOUT


So - β VOUT =- VOUT + (VOUT + VD) e-T/τ or

T = RfC loge (1 + VD/VOUT)/ 1- β

Usually VD << VOUT and if R2 = R3 so that if β = R3/(R2+R3) = ½ then,

T = RfC loge 2 = 0.693 Rf C

MODEL GRAPH:

Input

Amplitude (V)

Time (ms)

Output

Tp

Time (ms)

TABULAR COLOUMN:

OUTPUT WAVEFORM AT PIN NO: 6 WAVEFORM ACROSS CAPACITOR C1

Square wave Signal Sweep wave Signal





Time Constant (TP) Time Constant (TP)

PROCEDURE:


2. Switch ON the RPS and CRO.

3. Observe the Square waveform at output pin of the IC and Ramp waveform across

the capacitor.


5. Verify the observed frequency with our calculated frequency.

RESULT:

VIVA VOCE:

1. Why is the monostable multivibrator circuit called time delay circuit and gating circuit?

Monostable multivibrator circuit called time delay circuit because it generates a fast transition at a predetermined time T after the application of input trigger. It is called as a gating circuit because it generates rectangular waveform at a definite time and could be used as gate parts of a system.


PRECISION FULL WAVE RECTIFIER USING OP-AMP.

Exp. No : 12

Date : AIM:


To Construct a Precision Full wave Rectifier using Op-amp IC. Draw its input and

output waveforms.

APPARATUS REQUIRED:



2 Resistors 10 KΩ 1

3 Bread Board 1





THEORY:The super diode or precision rectifier is a configuration obtained with an

operational amplifier in order to have a circuit behaving like an ideal diode or

rectifier. It can be useful for high-precision signal processing.

In this case, when the input is greater than zero, D2 is ON and D1 is OFF, so

the output is zero. When the input is less than zero, D2 is OFF and D1 is ON, and the

output is like the input with an amplification of − R2 / R1.



http://en.wikipedia.org/wiki/Rectifier

http://en.wikipedia.org/wiki/Diode

http://en.wikipedia.org/wiki/Electrical_network

http://en.wikipedia.org/wiki/Operational_amplifier

CIRCUIT DIAGRAM:

Sine I/P

10 K 10 K

PRECISION FULL WAVE RECTIFIER CIRCUIT

1V (p-p)

10 K

10 KCRO

FG, 1KHz

D11N400710 K

D21N4007

Output+

-LM741

+12V

-12V

2

36

74

+

-LM741

+12V

-12V

2

36

74

MODEL GRAPH:

Input Waveform: Amplitude

(V)


Time (ms)

Time

Output waveform:

Amplitude (V)

Time (ms)

Time

TABULAR COLOUMN:


Sine wave Signal Consecutive Positive Cycles



PROCEDURE:


2. Switch On the Equipments and Set the Sine wave input signal for 1KHz

and 1V(p-p).

3. Observe the input and output waveforms on CRO.

4. Draw the waveforms on Graph Sheet.


RESULT:

VIVA VOCE:

1. Give the output voltage when Vi is positive and negative in a precision diode.

When Vi is positive, diode D1 conducts causing V0 to negative by one diode drop (Vr =0.6v). Hence, diode D2 is reverse biased. The output voltage V0 is zero.

When Vi is negative ie Vi < 0, diode D2 conducts D1 is off. The negative input Vi

forces the op-amp circuit VON positive and causes D2 to conduct. Output V0 becomes positive.

2. What is Precision rectifier?


It is a rectifier circuit which utilities precision diode instead of usual diodes for rectification purpose in order to operate them for cut-in voltages in the order of microvolt.

3. Define precision half wave rectifier with diagram? It is defined as a circuit, which utilizes two precision diodes instead of usual

diodes for rectification purpose in order to operate them for, cut in voltages in the order of micro volts.

1 2

V1

RfD1

+

-

3

26

74Rl

Rl

1 2R

comp

4. Give the output voltage when Vi is positive and negative in a precision diode.

When Vi is positive, diode D1 conducts causing V0 to negative by one diode drop (Vr =0.6v). Hence, diode D2 is reverse biased. The output voltage V0 is zero.

When Vi is negative ie Vi < 0, diode D2 conducts D1 is off. The negative input Vi

forces the op-amp circuit VON positive and causes D2 to conduct. Output V0 becomes positive.

ASTABLE MULTIVIBRATOR USING 555 TIMER IC.

Exp. No : 13

Date : AIM:

To Design and construct Astable Multivibrator using 555 IC. Draw its output

waveforms.


APPARATUS REQUIRED:


1 555 Timer IC NE 555 1

2 Resistors

3 Bread Board 1


5 Capacitor 0.1 F, 0.01 F 1



THEORY:The IC555 timer is an 8 pin IC that can be connected to external components for Astable

operation. The simplified block diagram is drawn. The OP-AMP has threshold and control

inputs. Whenever the threshold voltage exceeds the control voltage, the high output from

the OP –AMP will set the flip-flop. The collector of discharge transistor goes to pin 7. When

this pin is connected to an external trimming capacitor, a high Q output from the flip flop

will saturate the transistor and discharge the capacitor. When Q is low the transistor opens

and the capacitor charges.

The complementary signal out of the flip-flop goes to pin 3 and output. When

external reset pin is grounded it inhibits the device. The on – off feature is useful in many

application. The lower OP- AMP inverting terminal input is called the trigger because of

the voltage divider. The non-inverting input has a voltage of +Vcc/3, the OP-Amp output

goes high and resets the flip flop.


Frequency of Oscillation = 1 / [(Ra+2Rb)*C)]

Let C= 0.1 F and say Frequency = 1KHz.


PIN DIAGRAM:

NE 555

1

2

4

3 6

5

8

7Trigger

Ground

Reset

Output

Discharge

+Vcc

Control Input

Threshold

CIRCUIT DIAGRAM:


MODEL GRAPH:

+ Vsat

+ Vsat

Amplitude (V)

Time (ms) - Vsat

- VsatTime


+VCC = 10V

CRO

IC 555

8

6

2

ASTABLE MULTIVIBRATOR USING 555 IC.

0.1µF

Rb

Ra

5

3 OUTPUT

1C = 0.1µF

4

7

TABULAR COLOUMN:

OUTPUT WAVEFORM AT PIN NO: 3 WAVEFORM ACROSS TIMING CAPACITOR

Square wave Signal Ramp wave Signal




Frequency (1/T) Frequency (1/T)

PROCEDURE:




RESULT:


VIV VOCE:

1. List the application of 555 Timer?

A 555 timer IC is a circuit capable of producing timing intervals therefore it finds application where timing intervals are required if basic application are as follows

iii. Monostable multivibrator.iv. Astable multivibratorv. Bistable multivibrator

vi. Schmitt triggervii. Voltage controlled oscillator.

2. What is the frequency of the output wave form of an astable multivibrator using timer 555?

f = 1.45 / (RA+RB) Cwhere RA and RB are timing resistors and C is timing capacitor.


MONOSTABLE MULTIVIBRATOR USING 555 IC.

Exp. No : 14

Date : AIM:

To Construct Monostable Multivibrator using 555 IC. Draw its input and output

waveforms.

APPARATUS REQUIRED:


1 555 Timer IC NE 555 1

2 Resistors 10K

3 Capacitor 0.1 F, 0.01 F 1 each

4 Bread Board 1





THEORY:A Monostable Multivibrator has one stable state and a quasistable state. When it is

triggered by an external agency it switches from the stable state to quasistable state and

returns back to stable state. The time during which it states in quasistable state is

determined from the time constant RC. When a continuous pulse triggers it it generates a

square wave. A pair of regeneratively coupled active devices, resistance devices and op-

amps can realize Monostable Multi vibrator.



Tp = Stable Pulse width = 1.1 *R*C

Let C = 0.1F and R= 10K

Then, Tp =

MODEL GRAPH:

Input

Amplitude (V)

Time (ms)

Output

Tp

Time (ms)

CIRCUIT DIAGRAM:


Square I/P

2

+VCC = 10V

R

IC 555

3

5

C = 0.1µF

CRO

6

MONOSTABLE MULTIVIBRATOR USING 555 IC.

7

OUTPUT

1

84

0.01µF

TABULAR COLOUMN:


Square wave Signal Tp =

Amplitude Output Pin No. 3

Time Period Across Capacitor

PROCEDURE:




and 1V(p-p).



RESULT:

CHARACTERISTICS OF PLL.


Exp. No : 15

Date : AIM:

To construct and study the operation of PLL IC 565 and determine its

Characteristics.

Apparatus Required:

S.No ComponentsRange Quantity

1 IC 565 - 1

2 Resistors 6.8 K 1

3 Capacitors 0.001 F

0.1 F, 1 F

1 each


5 C.R.O - 1

6 Dual Power Supply 0- 30 V 1

Circuit Diagram:


FG(1Hz-1MHz)

Rt=6.8K C2=

1µF

PLL CHARACTERISTICS USING LM565 IC CIRCUIT DIAGRAM

Demodulated O/P

C1=0.01µF

8102

6

3

4

5

7

+6V

91

Ct=

0.00

1µF

VCO O/P (Fo)

Reference O/P

LM565

-6V

Pin Diagram (IC 565 - PLL)


2

NE 5654

3

1

13

12

11

-Vcc 14

VCO Output

Input

Input

No Connection

5

7

6

10

8

9Reference Output

Phase Comparator VCO Input

External Resistor for VCODemodulated Output

+Vcc

External Capacitor for VCO

No Connection

No Connection

No Connection

Procedure:The connections are given as per the circuit diagram.

Measure the free running frequency of VCO at pin 4, with the input signal Vi set equal to zero. Compare it with the calculated value = 0.25 / (RT CT).

Now apply the input signal of 1 VPP square wave at a 1 KHz to pin 2. Connect one channel of the scope to pin 2 and display this signal on the scope.

Gradually increase the input frequency till the PLL is locked to the input frequency. This frequency f1 gives the lower end of the capture range. Go on increasing the input frequency, till PLL tracks the input signal, say, to a frequency f2.This frequency f2 gives the upper end of the lock range. If input frequency is increased further, the loop will get unlocked.

Now gradually decrease the input frequency till the PLL is again locked. This is the frequency f3, the upper end of the capture range. Keep on decreasing the input frequency until the loop is unlocked. This frequency f4 gives the lower end of the lock range.

The lock range fL = (f2 – f4). Compare it with the calculated value of 7.8 fo /12. Also the capture range is fc = (f3 – f1).Compare it with the calculated value of capture range.

fc = (fL / (2)(3.6)(103) C)1/TABULAR COLOUMN:



Square wave Signal Square wave Signal with Multiple Freq.


Time (ms) Time (ms)

Frequency (Hz) Frequency (Hz)

Model Graph

Vc Slope =1/Kv

fo- fL fo- fc

fo fo+ fc fo+fL IB

2fc = Capture range

2fL = Lock- in range

Result :

FREQUENCY MULTIPLIER USING PLL.


Exp. No : 16

Date :

AIM: To construct and study the operation of frequency multiplier using IC 565.

Apparatus Required:

S.No ComponentsRange Quantity

1 IC 565,IC 7490,2N2222 - 12 Resistors 20 K, 2k,

4.7k,10k1

3 Capacitors 0.001 F 10 F

1 each

4 FunctionGenerator (Digital) 1 Hz – 2 MHz 15 C.R.O - 16 Dual Power Supply 0- 30 V 17.

THEORY:The circuit diagram of a Frequency multiplier using PLL is shown in Figure. A

divide by N network is inserted between VCO Output and Phase comparator input. In the locked stste, the VCO output frequency fO is given by,

fO = N fS

The multiplication factor can be obtained by selecting a proper scaling factor N of the counter. Frequency multiplication can also be obtained by using PLL in its harmonic locing mode.

The output of VCO is given by, fO = fS / m

CIRCUIT DIAGRAM:


Rt=Rt1+Rt2

O/P (Fout = 5Fin)

7490+6V

32 1076 1

115

B C 1 0 7

4 . 7 K

VCO O/P (Fo)

1 0 K

FG(1Hz-1MHz)

C2=

1µF

FREQUENCY MULTIPLIER USING PLL IC LM565 CIRCUIT DIAGRAM

Demodulated O/P

C1=0.01µF

8102 7

6

3

5

4

+6V

91

Ct=

0.00

1µF

Reference O/P

LM565

-6V

R t 1

R t 2

MODEL GRAPH:

Output Signal

Input Signal

Time (sec)

Time (sec)

Amplitude (V)

Amplitude (V)

TABULAR COLOUMN:



Square wave Signal Square wave Signal (Multiples of input freq)



Procedure:

1. The connections are given as per the circuit diagram.2. The circuit uses a 4- bit binary counter 7490 used as a divide-by-5 circuit.3. Measure the free running frequency of VCO at pin 4, with the input signal Vi set

equal to zero. Compare it with the calculated value = 0.25 / (RT CT). 4. Now apply the input signal of 1 Vpp square wave at 500 Hz to pin 2. 5. Vary the VCO frequency by adjusting the 20k potentiometer till the PLL is locked.

Measure the output frequency. It should be 5 times the input frequency.6. Repeat steps 4, 5 for input frequency of 1 kHz and 1.5 kHz.

RESULT :

VIVA VOCE :


1. Define voltage to frequency conversion factor kv? It is given as

Kv = ∆fo / ∆vc

Here Kv is the modulation voltage required to produce the frequency shift ∆fo for a VCO.

2. Give two application of PLL? i. Frequency multiplication and division

ii. Frequency translation.iii. AM detection.iv. FM demodulation

3. What is a voltage-controlled oscillator? A voltage controlled oscillator is an oscillator circuit in which the frequency of

oscillation can be controlled by an externally applied voltage. It provides the linear relationship between the applied voltage and the oscillation frequency.

VCO is a free running multivibrator and operates at a set of frequency fo called free running frequency. This frequency is determined by an external timing capacitor and an external resistor. It can also be shifted to either side by applying a dc control voltage Vc to an appropriate terminal of the IC.The frequency deviation is directly proportional to the dc control voltage and hence it is called a “Voltage Controlled Oscillator”.

4. Define capture range of a PLL? The range of frequency over which the PLL can acquire lock with an input signal is

called capture range. The PLL cannot acquire a signal outside the capture range, but once captured, it will hold on till the signal frequency goes beyond the lock-in range, larger capture range is required.

5. Why an amplifier is also called an error amplifier?An amplifier also called an error amplifier in control theory, which accepts the signal

Xd and yields the output signal X0=a.Xd, where a is the forward gain of the amplifier is called the open-loop gain of the circuit.

3. Explain how frequency doublers can be realized using analog multiplier.

The multiplication of two sine waves of the same frequency, but of possibly different amplitude and phase allows to double frequency and to directly measure real power.

A PLL with a free running frequency of 1KHzis connected to a variable frequency oscillator. The frequency of oscillator is gradually increased and when its frequency was 850 Hz the PLL got locked. The frequency of oscillator was decreased and it went out of lock for the oscillator frequency of 800 Hz.

4. Calculate the lock range and the capture range of the PLL.


Lock in range ∆fL = +/- 7.8 fo / Vfo is free running frequencyCapture range = +/- = [∆fL / (2*∏*R*C)] 1/2

5. The lock range of a certain general purpose PLL with a free running frequency of 50MHz is specified to be +/- 10% what is its lock range?

Lock in range ∆fL = +/- 7.8 fo / V

6. What are the essential building blocks of a PLL? a. The essential building blocks of PLL areb. Phase detectorc. Lowpass filterd. Amplifiere. Voltage Controlled Oscillator

7. What is a four-quadrant multiplier? Draw the circuit diagram of a squaring circuit using multiplier.

It is a multiplier circuit with two inputs being both positive and both negative, then the multiplier is called as four-quadrant multiplier

8. What is a two quadrant multiplier? It is a multiplier one input must be held positive and other can change to positive

or negative it is called two quadrant multiplier.

9. What is compander? The signal is compressed at the transmitter and expanded at the receiver. This is called

as companding. The combination of a compressor and expander is called a compander.

DC POWER SUPPLY USING REGULATOR IC LM317


Exp. No : 17

Date : AIM:

To Construct and Design the Regulator circuits for Voltage and Current regulation

using regulator IC LM317. Tabulates its regulation readings and draw its response curves.

APPARATUS REQUIRED:


1 Regulator IC LM317 1

2 Resistors

Variable Resistor

240

100 - 10K

1

1

3 Capacitor 0.1 F, 1 F 1 each

4 Bread Board 1

5 Regulated Power Supply (0-30)V, 2A 1

6 DC Voltmeter or Multimeter (0-30)V 1

7 DC Ammeter or Multimeter (0-100)mA 1

THEORY:

LM317 is the standard part number for an integrated three-terminal adjustable linear voltage regulator. LM317 is a positive voltage regulator supporting input voltage of 3V to 40V and output voltage between 1.25V and 37V. A typical current rating is 1.5A although several lower and higher current models are available. Variable output voltage is achieved by using a potentiometer or a variable voltage from another source to apply a control voltage to the control terminal. LM317 also has a built-in current limiter to prevent the output current from exceeding the rated current, and LM317 will automatically reduce its output current if an overheat condition occurs under load. LM317 is manufactured by many companies, including National Semiconductor, Fairchild Semiconductor, and STMicroelectronics.

Although LM317 is an adjustable regulator, it is sometimes preferred for high-precision fixed voltage applications instead of the similar LM78xx devices because the LM317 is designed with superior output tolerances. For a fixed voltage application, the


http://en.wikipedia.org/wiki/78xx

http://en.wikipedia.org/wiki/STMicroelectronics

http://en.wikipedia.org/wiki/Fairchild_Semiconductor

http://en.wikipedia.org/wiki/Fairchild_Semiconductor

http://en.wikipedia.org/wiki/National_Semiconductor

http://en.wikipedia.org/wiki/Current_limiter

http://en.wikipedia.org/wiki/Current_limiter

http://en.wikipedia.org/wiki/Potentiometer

http://en.wikipedia.org/wiki/Ampacity

http://en.wikipedia.org/wiki/Ampacity

http://en.wikipedia.org/wiki/Voltage

http://en.wikipedia.org/wiki/Linear_regulator

control pin will typically be biased with a fixed resistor network, a Zener diode network, or a fixed control voltage from another source. Manufacturer datasheets provide standard configurations for achieving various design applications, including the use of a pass transistor to achieve regulated output currents in excess of what the LM317 alone can provide.

LM317 is available in a wide range of package forms for different applications including heatsink mounting and surface-mount applications. Common form factors for high-current applications include TO-220 with part number LM317T and TO-3 with part number LM317K. LM317 is capable of dissipating a large amount of heat at medium to high current loads and the use of a heatsink is recommended to maximize the lifespan and power-handling capability.

LM337 is the negative voltage complement to LM317 and the specifications and function are essentially identical, except that the regulator must receive a control voltage and act on an input voltage that are below the ground reference point instead of above it.

LM317 / LM338 / LM350 Voltage Regulator Calculator

You can use this Voltage Regulator Calculator to vary the value of the program resistor

(R1) and output set resistor (R2) and calculate the output voltage for the LM317 / LM338 /

LM350 family of three terminal adjustable regulators. This Voltage Regulator Calculator

will work for most voltage regulators with a reference voltage (VREF) of 1.25. Typically, the

program resistor (R1) is 240 ohms for the LM117, LM317, LM138 and LM150 regulators.

For the LM338 and LM350 regulators, 120 ohms is typically used for R1. However, other

values such as 150 or 220 ohms can also be used for R1. Refer to the adjustable regulator

data sheets below for more information about these voltage regulators.

To determine the output voltage, enter values for the program (R1) and set (R2) resistors and hit the "Calculate" button.

LM317 / LM338 / LM350 Current Regulator Calculator

You can use this Current Regulator Calculator to vary the value of the program resistor

(R1) and calculate the output current from the LM317 / LM338 / LM350 family of three

terminal adjustable regulators. This Current Regulator Calculator will work for adjustable

regulators with a reference voltage (VREF) of 1.25.


http://en.wikipedia.org/wiki/Ground_(electricity)

http://en.wikipedia.org/wiki/Heatsink

http://en.wikipedia.org/wiki/TO3

http://en.wikipedia.org/wiki/TO-220

http://en.wikipedia.org/wiki/Transistor

http://en.wikipedia.org/wiki/Zener_diode

To determine the output current from the regulator, enter a value for the program

resistor (R1) in ohms and press the "Calculate" button. This will calculate the Output

Current in Amperes and the amount of Power Dissipated across R1 in Watts.

Pin Diagram:


Vout = 1.25V (1+(R2 /R1)) + I ADJ (R2)

Iout = VRef / R1VRef = 1.25V for LM317

CIRCUIT DIAGRAM:


http://en.wikipedia.org/wiki/File:Lm317_front.png

C1=

0.1µ

F

R 1 =2 4 0

LM 317 CURRENT REGULATOR CIRCUIT DIAGRAM

R 2

LM 317

V I N3

A D J1

V O U T2

TABULAR COLOUMN:

Voltage Regulation:


VIN3

ADJ1

VOUT2

LM317

R2

C1=

0.1µ

F R1=240

C2=

1µF

LM 317 VOLTAGE REGULATOR CIRCUIT DIAGRAM

Sl.No Input Voltage (V) Output Voltage (V)

1

2

3

4

5

6

7

8

9

10

Current Regulation: Sl.No Input Voltage (V) Output Current (mA) Power Dissipated (mW)

1

2

3

4

5

6

7

8

9

10

PROCEDURE:




and 1V(p-p).



RESULT:

VOLTAGE REGULATOR LM723.

Exp. No : 18


Date : AIM:

To Construct and Design the Regulator circuits for low Voltage and high Voltage

regulation types using regulator IC LM723. Tabulates its Line and Load regulation

readings for both types and draw its response curves.

Apparatus Required:

Theory:The three terminal regulator discussed on previous experiment have the limitations

are,

1. No short circuit protection

2. Output Voltage (positive or negative) is fixed.

These limitations have been overcome in the 723 general purpose regulators

which can be adjusted over a wide range of both positive and negative regulated

voltage. This IC is inherently low current device, but can be boosted to provide 5

amps or more current by connecting external components.

Low Voltage Type:


S.No.ITEM SPECIFICATION QTY

1 IC 723 12 Resistors 560, 680, 2.2k 13 Capacitors 100 F / 25 V 23 R. P. S (0- 30) V, 1 mA 14 Rheostat (0-350 ), 1.5 A 15 Bread Board and

Connecting Wires

A simple positive Low voltage (2V-7V) regulator can be made using 723 as shown

in Circuit diagram. The voltage at the NI terminal of the error amplifier due to

R1R2 divider is,

VREF = 7V, VOUT = VNI = 7 R2 / (R1+R2), V+ = +Vcc, R3 = R1||R2, V- = Gnd.

High Voltage Type:A simple positive Low voltage (7V-30V) regulator can be made using 723 as

shown in Circuit diagram. The voltage at the NI terminal of the error amplifier due

to R1R2 divider is,

VREF = 7V, VOUT = 7 (1+ (R1 / R2)), V+ = +Vcc, R3 = R1R2, V- = Gnd.

Circuit Diagram:


VNI = VOUT = VREF (R2 / (R1+R2)

VOUT = VREF (1 + (R1 / R2))

R3 =

5

6

12

7

11

10

13

4

LM 723R1 =

R2=

100 pF

+Vcc = Unregulated DC Supply

VOLTAGE REGULATOR USING IC LM723 (LOW VOLTAGE TYPE)

DC Volt Meter

C=100pF

Regulated Output

VOLTAGE REGULATOR USING IC LM723 CIRCUIT DIAGRAM (HIGH VOLTAGE TYPE)

12

5

6

10

4

11

7 13

Unregulated DC Voltage

LM723R

R1

R2

3

2Rsc

PIN DIAGRAM: (IC 723):


LM 723

3

1

2

114

14

13

12Current Sense

Current Limit

No Connection

VcInverting Input

6

5

7

10

8

9Vref

Non Inv. Input

Vz

No ConnectionV-

Freq. Compensation

V+

Vout

No Connection

LM 723 IC Pin Diagram (Dual-in-line Package)

TABULAR COLOUMN:

Low Voltage Type:

Line Regulation: RLoad = (fixed value) Sl.No Input Voltage (V) Output Voltage (V)

1

2

3

4

5

6

7

8

9

10

Load Regulation: Vin = (fixed value)


Sl.No Load Resistance () Output Voltage (V)

1

2

3

4

5

6

7

8

9

10

High Voltage Type:

Line Regulation: RLoad = (fixed value) Sl.No Input Voltage (V) Output Voltage (V)

1

2

3

4

5

6

7

8

9

10

Load Regulation: Vin = (fixed value) Sl.No Load Resistance () Output Voltage (V)


1

2

3

4

5

6

7

8

9

10

RESULT:

VIVA VOCE:

1. Draw the internal block diagram of an IC voltage regulator.


CO

2

3

OUT1

GNDIN

C1

MC7BXXC

2. Define line regulation and load regulation? i. Line regulation: It is defined as the percentage change in the output voltage for a

change in input voltage.ii. Load regulation: It is defined as the change in the output voltage for a change in

load current.

3. Why is it that a switching regulator has a higher efficiency than a series regulator?

Switching regulators, operate the power transistor as a high frequency on/off switch, so that the power transistor does not conduct current continuously. This gives improved efficiency over series regulator.

SIMULATION EXPERIMENTS1.INSTRUMENTATION AMPLIFIER


AIM: To perform simulation of instrumentation amplifier using PSPICE software

APPARATUS REQUIRED: PS ICE 9.1 studentPROCEDURE :1.Call symbol from library2.create new simulation profile and edit simulation setting3.Place marker and making suitable profile active4.Running the simulated circuit.

INSTRUMENTATION AMPLIFIER CIRCUIT

U 2

A D 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

V 3

1 5 V d c

0

R 2

1 k

U 1

A D 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

0

V

0

V 5

1 5 V d c

V

V 41 5 V d c

0

U 3

A D 7 4 1

3

27

4

6

1

5+

-V

+V

-

O U T

O S 1

O S 2

V 9

F R E Q = 3 0 h zV A M P L = 3 vV O F F = 0

V 61 5 V d c

R 5

1 0 0 k

V

R 6

1 0 0 k

R 7

1 k

V 1 0

F R E Q = 3 0 h zV A M P L = 5 vV O F F = 0

V 7

1 5 V d c

R 3

1 k

0

V 81 5 V d c

R 1

1 k0

0

R 4

1 k

0

0


INSTRUMENTATION AMPLIFIER OUTPUT

RESULT: Thus the simulation is performed for instrumentation amplifier

2.ACTIVE LOW PASS FILTERLinear Integrated Circuits Lab 98 / 117

AIM: To perform simulation of active low pass filter using PSPICE software


ACTIVE LOW PASS FILTER CIRCUIT

V 11 V a c0 V d c

V

R 3

1 5 . 9 k U 1

u A 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

C 1

0 . 0 1 u

R 2

1 0 k

R 1

4 0 k

0

0

V 21 2 V d c

V 41 2 V d c

0

ACTIVE LOW PASS FILTER OUTPUT


RESULT: Thus the simulation is performed for active low pass filter


3.ACTIVE HIGH PASS FILTERAIM: To perform simulation of active high pass filter using PSPICE software


ACTIVE HIGH PASS FILTER CIRCUIT

0

U 1

A D 7 41

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2V 2

1 5 v d c

V

V 31 V a c0V d c

V 11 5 v d c

R 1

1 0 k

R 2

1 0 k

0

00

R 3

1 5 . 9 k

C 1

0 . 0 1 u


ACTIVE HIGH PASS FILTER OUTPUT

RESULT: Thus the simulation is performed for active high pass filter


4.ACTIVE BAND PASS FILTERAIM: To perform simulation of activeband pass filter using PSPICE software

APPARATUS REQUIRED : PS ICE 9.1 student

PROCEDURE :1.Call symbol from library2.create new simulation profile and edit simulation setting3.Place marker and making suitable profile active4.Running the simulated circuit.RESULT: Thus the simulation is performed for active band pass filter


5.RC PHASE SHIFT OSCILLATOR

AIM: To perform simulation of RC phase shift oscillator using PSPICE software


RC PHASE SHIFT OSCILLATOR CIRCUIT

C 5

0 . 1 u

V 11 5 v

0V

R 1 3

1 5 k

0 0

V 21 5 v

R 1 0

6 . 49 k

0

C 4

0 . 1 uR 1 4

6 . 9 k

C 6

0 . 1u

U 5

u A 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

R 2

1 0 k

R 1 2

0

0


RC PHASE SHIFT OSCILLATOR OUTPUT

RESULT: Thus the simulation is performed for RC phase shift oscillator


6. WEIN BRIDGE OSCILLATORAIM: To perform simulation of wein bridge oscillator using PSPICE software


WEIN BRIDGE OSCILLATOR USING IC 741 CIRCUIT

1 5 v

0

C 1

0 . 0 1 u

R 6

1 0 K

R 4

3 . 3 k

U 2

uA 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

0

-1 5 v

R 3

3 . 3 k

R 1

4 . 7 k

C 2

0 . 0 1 u

V


WEIN BRIDGE OSCILLATOR USING IC 741 OUTPUT

RESULT: Thus the simulation is performed for wein bridge oscillator


7. ASTABLE MUTIVIBRATOR USING IC 741

AIM: To perform simulation of astable multivibrator using IC741 using PSPICE software


ASTABLE MULTIVIBRATOR USING IC741 CIRCUIT

V 21 2 V d c

V 11 2 V d c

V

0

R 1

1 . 5 5 k

0

R 2

1 . 8 5 k

C 1

0 . 0 5 u f

U 1

u A 7 41

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

R 3

1 0 k

00


ASTABLE MULTIVIBRATOR USING IC741 OUTPUT

RESULT: Thus the simulation is performed for astable multivibrator using IC741


8. MONOSTABLE MUTIVIBRATOR USING IC 741

AIM: To perform simulation of monostable multivibrator using IC741 using PSPICE software


MONOSTABLE USING IC741 CIRCUIT

V 1

TD = 0

TF = 0P W = 0 . 5 m s

P E R = 1 m s

V 1 = 4 v

TR = 0

V 2 = 0

R 6

1 . 5 k

0

0

V 3

15 v

V 5

15 v d c

R 2

1 0 0 k

C 1

1 0 . 0 1 u

R 1

2 8 9 k

D 1 N 4 0 0 1

D 1

D 1 N 4 0 0 1C 2

0 . 01 u

U 2

A D 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2

R 31 0 k

0

V

0

V

R 4

1 0 k


MONOSTABLE USING IC741 OUTPUT

RESULT: Thus the simulation is performed for monostable multivibrator using IC741


9.SCHMITT TRIGGERAIM: To perform simulation of Schmitt trigger using PSPICE software


SCHMITT TRIGGER CIRCUIT

0

R 2

1 k

V 21 5 V

V 11 5 V

R 3

1 k

0

V 3

F R E Q = 1 K H ZV A M P L = 1 VV O F F = 0

U 1

A D 7 4 1

3

2

74

6

1

5+

-

V+

V-

O U T

O S 1

O S 2 V

0

0

R 1

2 3 K


SCHMITT TRIGGER OUTPUT

RESULT: Thus the simulation is performed for Schmitt trigger


10. ASTABLE MUTIVIBRATOR USING IC NE555 TIMER

AIM: To perform simulation of astable multivibrator using NE555 timer using PSPICE software


ASTABLE MULTIVIBRATOR USING NE 555 TIMER CIRCUIT

0

0

R 5

1 0 k

C 4

0 . 1 u

C 3

0 . 0 1 u

U 2

5 5 5 a lt

1

2

3

4

5

6

7

8

G N D

TR I G G E R

O U TP U T

R E S E T

C O N TR O L

TH R E S H O L D

D I S C H A R G EV C C

1 2 v

V

R 42 k


ASTABLE MULTIVIBRATOR USING NE 555 TIMER OUTPUT

RESULT: Thus the simulation is performed for astable multivibrator using NE555 timer


11. MONOSTABLE MUTIVIBRATOR USING IC NE555 TIMER

AIM: To perform simulation of monostable multivibrator using NE555 timer using PSPICE software


MONOSTABLE MULTIVIBRATOR NE555 CIRCUIT

V

C 2

0 . 0 1 u

R 1

1 k

0

C 3

0 . 0 1 u

0 0

V 25 V d c

C 1

1 u

D 2

1 N 4 5 0 012

V

R 2

1 0 k

V 1

TD = 0

TF = 0P W = 0 . 5P E R = 1 0

V 1 = 0

TR = 0

V 2 = -5 v

0

U 1

5 5 5 a lt1

2

3

4

5

6

7

8

G N D

TR IG G E R

O U TP U T

R E S E T

C O N TR O L

TH R E S H O L D

D I S C H A R G EV C C


MONOSTABLE MULTIVIBRATOR NE555 OUTPUT

RESULT: Thus the simulation is performed for monostable multivibrator using NE555 timer


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