VLSI MINI PROJECT LIST (VHDL/Verilog)1. Design of Digital FM Receiver using PLL (Phase Locked Loop) 2. Design of 1Kbyte Dual Port SRAM (Static Random Access Memory) 3. Computation of DFT (Discrete Fourier Transform) using Rader Algorithm 4. Design of Signed Distributed Arithmetic FIR (Finite Impulse Response) Digital Filter 5. Design of 16 Point Radix-4 FFT (Fast Fourier Transform) Algorithm 6. Design of AN ATM (AUTOMATED TELLER MACHINE) CONTROLLER 7. Design of Circular CORDIC Core Algorithm 8. Design of Universal Asynchronous Receiver Transmitter (UART) 9. Design of Generic FIFO (First In First Out) using Gray Coding Technique 10. Design of JPEG (Joint Photographic Experts Group) Compression Standard 11. Design of Ethernet MAC (Medium Access Control) Transmitter Block 12. Design of 16-bit QPSK (Quadrature Phase Shift Keying) 13. Design of Lossless 2-D DWT (Discrete Wavelet Transform) using Lifting Scheme Architecture 14. Design of Manchester Encode and Decoder 15. Design of CRC (Cyclic Redundancy Check) Generator 16. Design of Dual Elevator Controller 17. Determinant of a Matrix using Sarrus Algorithm 18. Design of Efficient CIC (Cascade Integrator Comb) Architecture for High Decimation Rate Filters 19. Design of AES (Advanced Encryption Standard) Encryption Algorithm with 128-bits Key Length 20. Design of IIR (Infinite Impulse Response) Digital Filter 21. Design of Stepper Motor Controller 22. Generation of Cipher Text using RSA Encryption Algorithm 23. Transformation of Image using DCT Technique 24. Design of Digital Watch 25. Design of High Speed DDR SDRAM (Dual Data Rate Synchronously Dynamic RAM) Controller 26. Design OF AN OPEN CORE PROTOCOL (OCP) IP BLOCK 27. Design of Data Encryption Standard (DES) 28. Design of Inverse Fast Fourier Transform (IFFT) 29. Design of Floating-Point Multiplier using IEEE-754 Standard 30. Design of Keyboard Controller 31. Design of Linear Feedback Shift Register (LFSR) Counter Generator 32. Design of Ethernet MAC (Medium Access Control) Receiver Block 33. Design of Poly-Phase Decimation Filter Technique for FIR Filter 34. Design of LCD (Liquid Crystal Display) Controller 35. Design of an AMBA-Advanced High performance Bus (AHB) Protocol IP Block 36. Design of QAM (Quadrature Amplitude Modulation) Modulator 37. Design of Reversible Watermarking Algorithm using DWT Technique 38. Design of Universal Transceiver Macro-cell Interface (UTMI) in USB 2.0 39. Design of Efficient Systolic Array Architecture for DWT (Discrete Wavelet Transform) 40. Design of Lossless 2-D IDWT (Inverse Discrete Wavelet Transform) using Lifting based Algorithm 41. Design of Bluetooth Security Encryption Algorithm 42. Design of 15-Bit Pipelined Adder 43. Design of an ATP (Any Time Payment) Machine for Electricity Bill Payment Application 44. Design of Radix-2 Butterfly Processor to Prevent Overflow in the Arithmetic Design of Triple Data Encryption Standard (TDES VLSI Mini Projects 1. Design and implementation of Error Detector and Corrector (EDAC) Unit using HDL. 2. Design and implementation of different adders using HDL. 3. FIFO design and implementation using HDL. 4. Design and implementation of Linear feed back Shift register using HDL. 5. Design and implementation of RAM and ROM using HDL. 6. Design and Implementation of UART using HDL. 7. Design and implementation of Carry Save Array Arithmetic Multiplier. 8. Design and implementation of Content Addressable Memory using HDL. 9. Design and implementation of SPI (Serial Peripheral Interface) using HDL. 10. Design and implementation of Seen Segment decoder and bi-directional shift register. 11. Design and implementation of Look Ahead Carry Generator using HDL. 12. Prototyping of Embedded processor using HDL.13. Design and implementation of Sequence Detector using HDL.14. Design and implementation of Digital Code Converters using HDL. 15. Design and implementation of Electronic voting Machine design using HDL. 16. Design and implementation of Baurdrate Generator using HDL. 17. Design and implementation of unsigned serial divider using HDL. 18. Design and implementation of signed adder, subtractor using HDL. 19. Design and implementation of ALU using HDL. 20. HDL Design of central processing unit(CPU).