lmece204 unified electronics-i lab manual

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LABORATORY MANUAL

COURSE CODE: ECE 204COURSE TITLE: UNIFIED ELECTRICAL LAB-I

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LIST OF PRACTICALS

S. No. Description

1 To design an implement a function generator to generate

1) Square,2) triangular and3) sinusoidal waveforms using IC741 and simulate using pSpice

2 To find gain of the transistor in CE, CB and CC configuration on breadboard

3 To Design and implement1) Astable multivibrators using IC555 Timer on breadboard. And simulate using pSpice

4 To Design and Plot Frequency response of1) LPF

2) HPF3) BPF and

BRF using IC741 on breadboard and simulate using pSpice

5 To design and implement an CLIPPER, CLAMPER circuit on breadboard and simulate usingpSpice

6 To study the gain of differential amplifier by varying the value of RF

1) RF= 4.1k ohms2) RF= 82k ohms on breadboard and and simulate using pSpice

MTE

7 To implement Full Adder using NAND gates and using pSpice

8 To study flipflops(SR,JK,D,T) (IC 7410,7400 etc...)

9 To implement adder using 4:1 mux

10 To realize D/A converters using IC 7411) R-2R ladder2)Weighted Ladder, compare the results obtained on breadboard and simulate using

pSpice

11 To realize a 7-segment code converter on breadboard

12To design and realize MOD-10

1) Up counter2) Down counter on breadboard

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EXPERIMENT NO. 1 - Sine Wave Oscillator

Sinusoids are useful waveforms, because they are convenient basis functions foranalyzing the response of (linear) systems involving time derivatives and/or integrals of

signals. Any sufficiently well-behaved signal can be represented by a linear combinationof sinusoids (through Fourier transforms) and derivative and integral operations on anyof the basis functions yields another basis function. In fact, sinusoids are the onlyfunctions that retain their original shape during processing by a linear system, whichmakes it easy to characterize the effect of the system by specifying only the amplitudeand phase change. In mathematical language, sinusoids, or rather imaginaryexponentials are the eigenfunctions of linear systems.

Consequently, sine wave generators are useful tools for circuit testing and diagnosis (asyou have already seen in the previous labs). In this lab, you will design a variablefrequency sine wave generator. Although the approach you use cannot yield a sine

wave of sufficient purity (i.e. low harmonic content) for use in a high quality generator,the quality of its waveform is sufficient for many less demanding applications. This is afairly inexpensive way of producing a versatile waveform generator (sine, triangle andsquare waves simultaneously) over a broad frequency range.

The approach you will use involves the generation of a triangle wave followed by aconversion of the triangle wave to a sine wave using a nonlinear conversion circuit. It isrelatively easy to generate a high-quality variable frequency triangle wave using an opamp integrator circuit with a variable input resistor. (Alternatively, it is easy to convert avariable frequency square wave to a triangle wave using an integrator). The trianglewave generator will be made using a combination of an integrator and a Schmitt trigger

as shown in the figure below.

Although in practice the integrator and Schmitt trigger functions can be integrated into asingle fairly simple circuit, the approach outlined in this lab will give you exposure to twoopamp applications (integrators and Schmitt triggers separately). A circuit having theblock diagram shown on the next page can generate a triangle wave. When the Schmitttrigger output is negative, the integrator output ramps positive.

When that output reaches the positive-going threshold of the Schmitt trigger, theSchmitt trigger output goes positive. This causes the integrator output to rampdownward until the Schmitt triggers negative going threshold is reached. This sends the

Schmitt trigger output negative, and the cycle repeats. The symmetry of the trianglewave depends on two things. First the negative and positive outputs of the Schmitttrigger must be equal in magnitude to obtain equal slopes for the positive and negativegoing parts of the triangle wave. Second, thePositive and negative switching points of the Schmitt trigger, which must be equalmagnitude, control the positive and negative peaks of the triangle wave. Although anopamp-based

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Schmitt trigger will not precisely meet these two conditions; the accuracy will beacceptable for the purpose of this experiment. Your task is to determine how toimplement the integrator and Schmitt trigger in such a way as to yield a triangle wavegenerator having a frequency range of at least 100Hz to 10 kHz. You will be allowedone 10 k potentiometer for adjusting

the oscillator frequency. The amplitude of the square wave need only be greater than 5voltspp, however, the triangle amplitude should be as near a practicable to 5 volts pp. Thetriangle to sine conversion circuit you will use is an example of a class of nonlinearcircuits. It utilizes the nonlinear I-V characteristics of the base-emitter junctions ofbipolar transistors. Attached is a copy of the original journal article (W.M.C. Sansen, S.Lui, S. Peters, and Robert G. yer, The Differential Pair as a Triangle-Sine WaveConverter, IEEE J. Solid-State Circuits, Vol. SC-11, June 1976, pp. 418-420) describingthis triangle to sine conversion technique. Using a single CA3086 NPN transistor arraychip, design and construct a circuit following the technique outlined by Meyer, et al. It isalmost certainly easiest to use the collector output option rather than the emitter option

that they also mention. The combination of this circuit with your triangle wave generatorwill be a variable frequency sine wave generator. You probably have to put somethingbetween the triangle output and the sine-converter input to reduce the signal amplitudeto an appropriate value. The output sinusoid shall be 5 volts pp too and have a zeromean value. The output source impedance shall not exceed 100 ohms. (This does notmean you could load the circuit with 100 ohms! You may meet this requirement bydesign.) You very likely need another opamp to do this. It is probably best touse it as a differential amplifier, taking the difference in potential between the twocollectorsof the sine converter. This reduces distortion and saves a capacitor. As a differenceamplifieris a little harder to design, I will reserve points on the lab grade specifically for doing thissuccessfully.

In demonstrating your circuit to the TA, you must show reasonably distortion-free sinewave generation from 100 Hz to 10 kHz. Distortion must be reduced by proper selectionof passive components in the triangle wave oscillator. To establish a quantitativemeasure of the distortion of the sine wave, use an oscilloscope to capture the signalwhen your generator frequency is about 1 kHz. Use a sampling rate of at least 100 kHzand try to adjust for as nearly ten cycles of the waveform on screen as practicable. Fillthe vertical scale as much as possible without clipping. Use Excel to calculate the FFTand from the peaks in that transform calculate the ratios of the second through fourthharmonics to the fundamental. To meet the requirements of the lab, the amplitudes ofthe second and third harmonics must be at least 23 DB below the fundamental. Alsocapture the square and triangle outputs of your circuit at 1 KHz.

In your report, overlay them with the sine wave data all on the same time axis. As inlab 1,the TA will either initial a printout of your waveforms or give you an electronic signatureto

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include on your graph when you demonstrate your triangle and square wave outputs tohim.In the section of your report that has the tabulation of measured and designed values,please include at least:

1. Amplitudes of all waveshapes at 100 Hz, 1 kHz, and 10 KHz.2. Distortion of the sine wave -- FFT printout and the derived ratio of the second andthird harmonics to the fundamental amplitude. Make your FFT printout have a DBscale and normalize so that the fundamental is at 0 DB.3. Waveshapes of all outputs at 1 KHz overlaid on the same time axis.4. Maximum and minimum frequencies.5. Quiescent values of the voltages in the sine converter6. DC or mean value of the sinusoidal output -- i.e. is it really zero mean?

Hints:

1. Bypassing the power supplies with small ceramic capacitors on the breadboard willhelpavoid spurious oscillations.2. Keep the bias currents in the CA3086 transistors below 1mA for best results.3. One technique for realizing a variable time-constant integrator is shown below:

Variable Time Constant Integrator

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Function Generator Block Diagram: the Schmitt trigger and integrator form a squareand triangle generator. The waveshaping circuit uses a differential pair with currentsourcebiasing and an emitter resistor. (See attached article.) You should have an opampbuffer

in that circuit to minimize distortion and lower the output impedance.

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AIM: Design a square wave generator and study its performance using 741 Op-Amp

EQUIPMENTS REQUIRED:

COMPONENTS REQUIRED:Resistors, Capacitors, Op-Amp IC 741, Connecting wires and CRO probes.

THEORY:Square Wave Generator:A simple op-amp square wave generator is shown in fig. Also called a free runningoscillator, the principal of generation of square wave output is to force an opamp tooperate in the saturation region. In fig. (a) Fraction _ = R2/ (R1 + R2) of the output is fedback to the (+) input terminal. Thus the reference voltage Vref is _Vo and may take

values as + _Vsat or - _Vsat. The output is also fed back to the (-) input terminal afterintegrating by means of a low-passs RC combination. Whenever input at the (-) inputterminal just exceeds Vref, switching takes place resulting in a square wave output. Inastable multivibrator, both the states are quasi stable.

Consider an instant of time when the output is at +Vsat. The capacitor now startscharging towards +Vsat through resistance R.The voltage at the (+) input terminal isheld at + _Vsat by R1 & R2 combination. This condition continues as

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the charge on C rises, until it has just exceeded + _Vsat, the reference voltage. Whenthe voltage at the (-) input terminal becomes just greater than this reference voltage, theoutput is driven to Vsat. At this instant, the voltage on the capacitor is + _Vsat. Itbegins to discharge through R, that is, charge toward Vsat. When the output voltageswitches to Vsat, the capacitor charges more & more negatively until its voltage just

exceeds _Vsat. The output switches back to +Vsat. The frequency is determined bythe time it takes the capacitor to charge from _Vsat to + _Vsat and vice versa.

CIRCUIT DIAGRAM:

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PROCEDURE:1. Rig up the circuit as shown in the Fig.on the breadboard.2. Observe the output on CRO.3. Calculate the amplitude & frequency of the output.4. Plot the outputs waveforms on the graph paper.5.Compare the theoretical frequency with the practical frequency of the output.

OBSERVATION TABLE:

CONCLUSION:The theoretical and practical

frequency of the outputs isasand the

output is plotted on the graph paper.REFERENCE:1. Op Amps & Linear Integrated circuits by Ramakant Gayakwad, Chapter 7, pp-301-305QUESTIONS:Q.1 What is the other name of square wave generator?

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Q.2.What is the maximum output voltage values?Q.3 What is the operating frequency of square wave generator?Q.4 Under what condition the fo=1/2 _RC?

Ex. No. 2a: CHARACTERISTICS OF CE CONFIGURATION USING BJT

AIM: To plot the transistor characteristics of CE configuration.

THEORY:

A BJT is a three terminal two junction semiconductor device in which the conduction isdue to both the charge carrier. Hence it is a bipolar device and it amplifier the sinewaveform as they are transferred from input to output. BJT is classified into two types NPN or PNP. A NPN transistor consists of two N types in between which a layer of P issandwiched. The transistor consists of three terminal emitter, collector and base. Theemitter layer is the source of the charge carriers and it is heartily doped with a moderatecross sectional area. The collector collects the charge carries and hence moderatedoping and large cross sectional area. The base region acts a path for the movement of

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the charge carriers. In order to reduce the recombination of holes and electrons thebase region is lightly doped and is of hollow cross sectional area. Normally thetransistor operates with the EB junction forward biased. In transistor, the current issame in both junctions, which indicates that there is a transfer of resistance between thetwo junctions. One to this fact the transistor is known as transfer resistance of transistor.

PROCEDURE:

INPUT CHARECTERISTICS:1. Connect the circuit as per the circuit diagram.

2. Set VCE ,vary VBE in regular interval of steps and note down the corresponding IBreading. Repeat the above procedure for different values of VCE.

3. Plot the graph: VBE Vs IB for a constant VCE.

OUTPUT CHARECTERISTICS:1. Connect the circuit as per the circuit diagram.

2. Set IB, Vary VCE in regular interval of steps and note down the corresponding ICreading. Repeat the above procedure for different values of IB.

3. Plot the graph: VCE Vs IC for a constant IB.

PIN DIAGRAM:

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RESULT: The transistor characteristics of a Common Emitter (CE) configuration were

plotted and uses studied.

hie =

hfe =

hre =

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hoe =

Ex.No.2b: CHARACTERISTICS OF CB CONFIGURATION USING BJT

AIM: To plot the transistor characteristics of CB configuration.

THEORY:In this configuration the base is made common to both the input and out. The emitter isgiven the input and the output is taken across the collector. The current gain of thisconfiguration is less than unity. The voltage gain of CB configuration is high. Due to thehigh voltage gain, the power gain is also high. In CB configuration, Base is common toboth input and output. In CB configuration the input characteristics relate IE and VEB fora constant VCB. Initially let VCB = 0 then the input junction is equivalent to a forward

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biased diode and the characteristics resembles that of a diode. Where VCB = +VI (volts)due to early effect IE increases and so the characteristics shifts to the left. The outputcharacteristics relate IC and VCB for a constant IE. Initially IC increases and then itlevels for a value IC = IE. When IE is increased IC also increases. proportionality.Though increase in VCB causes an increase in , since is a fraction, it is negligible

and so IC remains a constant for all values of VCB once it levels off.

PROCEDURE:

INPUT CHARACTERISTICS: It is the curve between emitter current IE and emitter-base voltage VBE at constant collector-base voltage VCB.1. Connect the circuit as per the circuit diagram.

2. Set VCE=5V, vary VBE in steps of 0.1V and note down the corresponding IB. Repeatthe above procedure for 10V, 15V.

3. Plot the graph VBE Vs IB for a constant VCE.

4. Find the h parameters.

OUTPUT CHARACTERISTICS: It is the curve between collector current IC andcollector-base voltage VCB at constant emitter current IE.1. Connect the circuit as per the circuit diagram.

2. Set IB=20 A, vary VCE in steps of 1V and note down the corresponding IC. Repeat the above procedure for 40 A, 80 A, etc.

3. Plot the graph VCE Vs IC for a constant IB.

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4. Find the h parameters

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%age ERROR :

from data sheet find values ofhic, hrc , hfc, hoc and compare these values withpractically obtained values to find %age error

RESULT:The transistor characteristics of a Common Base (CB) configuration wereplotted and uses studied.

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Ex.No.2c: CHARACTERISTICS OF CC CONFIGURATION USING BJT

AIM: To plot the transistor characteristics of CE configuration.

THEORY:

A BJT is a three terminal two junction semiconductor device in which the conduction isdue to both the charge carrier. Hence it is a bipolar device and it amplifier the sinewaveform as they are transferred from input to output. BJT is classified into two types NPN or PNP. A NPN transistor consists of two N types in between which a layer of P issandwiched. The transistor consists of three terminal emitter, collector and base. Theemitter layer is the source of the charge carriers and it is heartily doped with a moderate

cross sectional area. The collector collects the charge carries and hence moderatedoping and large cross sectional area. The base region acts a path for the movement ofthe charge carriers. In order to reduce the recombination of holes and electrons thebase region is lightly doped and is of hollow cross sectional area. Normally thetransistor operates with the EB junction forward biased. In transistor, the current issame in both junctions, which indicates that there is a transfer of resistance between thetwo junctions. One to this fact the transistor is known as transfer resistance of transistor.

PIN DIAGRAM:

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INPUT CHARECTERISTICS:

1. Connect the circuit as per the circuit diagram.2. Set VCE, vary VBE in regular interval of steps and note down the corresponding IBreading. Repeat the above procedure for different values of VCE.

3. Plot the graph: VBC Vs IB for a constant VCE.

OUTPUT CHARECTERISTICS:1. Connect the circuit as per the circuit diagram.

2. Set IB, Vary VCE in regular interval of steps and note down the corresponding ICreading. Repeat the above procedure for different values of IB.

3. Plot the graph: VCE Vs IC for a constant IB.

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Percentage ERROR: From data sheet find values ofhie, hic , hfc, hoe and comparethese values with practically obtained values to find %age error

RESULT: The transistor characteristics of a Common Emitter (CC) configuration wereplotted.

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Experiment 3a: ASTABLE MULTIVIBRATOR

AIM: To study and implement IC 555 as Astable Multivibrator.

COMPONENTS REQUIRED: - = = 10 K, C= 0.1 and 0.01F, R= 150k, LED red, IC 555

Theory : - In this lab the 555 Timer is examined in detail along with its uses. This timer usesa maze of diodes, transistors, and resistors and for this reason a more simplifieddiagram of the 555 Timer is used. Below is the typical monostable 555 Timer IC:

This circuit is dependent on RA, RB, and C. Below is the schematic for the circuit webuilt:

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Circuit Diagram:-

Design : - The following formula was used to find the expected frequency:f = 1/(.693*C*( )) , f=481 Hz

The following are actual measurements taken from the lab:f= 526 HzThe result is very similar to the expected value. The 555 Timer has an internal voltagedivider comprising of three 5 k resistors. In our case our supply voltage is 12V whichresults in a upper voltage threshold of 8V and a lower threshold of 4V. The measurements Iobtained from the lab were very similar with a lower threshold of 3.8 V and a higherthreshold of 8.1V.

The next part of this section included changing both 10 k resistors to variable 1 Mpotentiometers. We adjusted the frequency to range from 2 to 5 Hz and observed the LEDslowly flashing on and off. We varied the value of the potentiometers to find the smallest

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and the largest frequency value. We obtained the following results: Largest f= 60.1 kHzwith RA = 100 and RB = 70 Smallest f= 4.8 Hz with RA = 1 M and RB = 1 M

Next we changed VC to +5 V and the frequency doesnt change as the voltage changes,because the threshold voltages change proportionally to the supple voltage, therefore thecapacitor has to charge up less.

Procedure:-

1. Make the circuit diagram as shown in above figure on bread board.

2. Give the power supply from dc battery source and see the output.

3. Red colored LED will start glow alternatively depending upon the time constant RC.

4. Observe the output on CRO as well.

5. Now change the time constant by changing the value of RA, RB and C.

6. Measure change in frequency in the output waveform (as well in LED).

Observation Table with errors in measurement

S.no. MeasuredTimeperiod

Tm+2% Tm-2% Average Tmavg=(Tmmax+Tm min)/2

1.

2.

3.4.

5.

Calculations using tolerance in component values:

f = 1/(.693*C*( ))RA 10%, RB 10%, C 5%

Find min and max values of using new values of components Find average , and =

1/

Percentage error: ((TM -Tavg)/Tavg) x 100

Scope of Result : At the output square waveforms will be generated and observed.

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Exp 3b: Monostable Multivibrator

AIM: To study and implement IC 555 as Monostable Multivibrator.

C o m po n en ts R e q u ir e d :

RA=RB= 10 K, C= 0.1 and 0.01F, R= 150k, LED red, IC 555

THEORY:

In this lab the 555 Timer is examined in detail along with its uses. This timer uses a

maze of diodes, transistors, and resistors and for this reason a more simplified

diagram of the 555 Timer is used. Below is the typical monostable 555 Timer IC:

Internal diagram of IC 555

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CIRCUIT DIAGRAMS:

The schematic below represents a mono-stable multi-vibrator:

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When the circuit was turned on, the LED was init ially off. It was low because

the trigger voltage was high due to the pull up resistor, and the voltage across the

capacitor at pin 6/7 was equal to zero. After pin 2, the trigger voltage, was

grounded the LED turned on and the output went high. This is due to the fact that

the mono stable MV was set off. By using an LED at the output of the Timer, we

are able to see the output pulse. With the schematic from the lab manual, it is

impossible to measure the duration of the pulse by manually triggering the 555

Timer IC. Using a pulse generator with an oscilloscope would be a preferred

method.

DESIGN:

Time delay can be calculated using the following equation:

t =

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1.1RC

t= 1.1(10x103 )(0.68x106 ) = .0748sec

Manually finding the time would be much easier if a larger resistor was used. Wetested the operation of the RESET by triggering the input first and then groundingpin 4. When the Reset is grounded the output goes immediately to zero, in otherwords, the LED turns off before the completion of the timing cycle and the flip flop isreset.

PROCEDURE:

1. Make the circuit diagram as shown in above figure on bread board.

2. Give the power supply from dc batter source and see the output.

3. Red color LED will start glow alternatively depending upon the time constantRC.

4. Observe the output on CRO as well.

5. Now change the time constant by changing the value of RA, RB and C.

6. Measure change in frequency in the output waveform (in LED as well).

Ob s er va t i on T a b le w it h m e a s u re m e n t E R R ORS

Sr no R C Measuredtime ofulse

Tm+2% Tm-2% Average Tm avg=( Tm Max+Tm min)/2

1

2

3

4

5

6

Value of Tm ranges from _ _

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Calc u la t i o n s u s i n g t o le r a n c e i n c o m p o n e n t va l u e s :Calculated pulse duration t = 1.1RCR 10%,, C 5%Find min and max values of t using new values of R and C

Find average Tavg = (tmin+tmax)/2

Percentage e r r o r : = ( (TM -Tavg )/Tavg ) * 100% Result :

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EXPERIMENT NO 4

IMPLEMENTATION IN PSPICE

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Experiment 5: NON LINEAR WAVE SHAPPING-CLIPPERSAim: To obtain the output and transfer characteristics of various diode clipper circuits.Apparatus required:

Name of theComponent/Equipment

Specifications Quantity

Resistors 1K 1

Diode IN4007 1

CRO 20MHZ 1

Function generator 1MHZ 1

DC Regulated powersupply

0-30V, 1A 1

Theory:

The basic action of a clipper circuit is to remove certain portions of the waveform, above

or below certain levels as per the requirements. Thus the circuits which are used to clip

off unwanted portion of the waveform, without distorting the remaining part of the

waveform are called clipper circuits or Clippers. The half wave rectifier is the best and

simplest type of clipper circuit which clips off the positive/negative portion of the input

signal. The clipper circuits are also called limiters or slicers.

Procedure:

1.Connect the circuit as per circuit diagram shown in Fig.1

Obtain a sine wave of constant amplitude 8 V p-p from function generator and apply as

input to the circuit.

2.Observe the output waveform and note down the amplitude at which clipping

occurs.

3.Draw the observed output waveforms.

4. To obtain the transfer characteristics apply dc voltage at input terminals and vary the

voltage insteps of 1V up to the voltage level more than the reference voltage and note

down the corresponding voltages at the output.

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5. Plot the transfer characteristics between output and input voltages.

6. Repeat the steps 1 to 5 for all other circuits.

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Expt no 6DIFFERENTIAL AMPLIFIERSA differential amplifier has two possible inputs and two possible outputs. Thisarrangement means that the differential amplifier can be used in a variety of ways.Before examining the three basic configurations that are possible with a differential

amplifier, you need to be familiar with the basic circuitry of a differential amplifier.

BASIC DIFFERENTIAL AMPLIFIER CIRCUITBefore you are shown the operation of a differential amplifier, you will be shown how asimpler circuit works. This simpler circuit, known as the DIFFERENCE AMPLIFIER, hasone thing in common with the differential amplifier: It operates on the differencebetween two inputs. However, the difference amplifier has only one output while thedifferential amplifier can have two outputs. By now, you should be familiar with someamplifier circuits, which should give you an idea of what a difference amplifier is like. InNEETS, Module 7, you were shown the basic configurations for transistor amplifiers.

Figure 3-1 shows two of these configurations: the common emitter and the commonbase. In view (A) of figure 3-1 a common-emitter amplifier is shown. The output signal isan amplified version of the input signal and is 180 degrees out of phase with the inputsignal. View (B) is a common-base amplifier. In this circuit the output signal is anamplified version of the input signal and is in phase with the input signal. In both ofthese circuits, the output signal is controlled by the base-to-emitter bias. As this biaschanges (because of the input signal) the current through the transistor changes. Thiscauses the output signal developed across the collector load (R2) to change. None ofthis information is new it is just a review of what you have already been shownregarding transistor amplifiers.

NOTE: Bias arrangements for the following explanations will be termed base-to-emitter.In other publications you will see the term emitter-to-base used to describe the samebias arrangement.

THE TWO-INPUT, SINGLE-OUTPUT, DIFFERENCE AMPLIFIERIf you combine the common-base and common-emitter configurations into a singletransistor amplifier, you will have a circuit like the one shown in figure 3-2. This circuit isthe two-input, single-output, difference amplifier.

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When the input signal developed by R1 goes positive, the current through Q1 increases.

This increased current causes a positive-going signal at the top of R3. This signal is felton the emitter of Q2.Since the base of Q2 is grounded, the current through Q2decreases with a positive-going signal on the emitter. This decreased current causesless voltage drop across R4. Therefore, the voltage at the bottom ofR4 increases and apositive-going signal is felt at the output. When the input signal developed by R1 goesnegative, the current through Q1 decreases. This decreased current causes a negative-going signal at the top of R3. This signal is felt on the emitter of Q2.When the emitter ofQ2 goes negative, the current through Q2 increases. This increased current causesmore of a voltage drop across R4. Therefore, the voltage at the bottom of R4 decreasesand a negative-going signal is felt at the output. This single-input, single-output,differential amplifier is very similar to a single-transistor amplifier as far as input and

output signals are concerned. This use of a differential amplifier does provideamplification of a.c. or D.C. signals but does not take full advantage of thecharacteristics of a differential amplifier.

SINGLE-INPUT, DIFFERENTIAL-OUTPUT, DIFFERENTIAL AMPLIFIERIn chapter one of this module you were shown several phase splitters. You shouldremember that a phase splitter provides two outputs from a single input. These twooutputs are 180 degrees out of phase with each other. The single-input, differential-

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output, differential amplifier will do the same thing. Figure 3-8 shows a differentialamplifier with one input (the base of Q1) and two outputs (the collectors of Q1 and Q2).One output is in phase with the input signal, and the other output is 180 degrees out ofphase with the input signal. The outputs are differential outputs.

This circuits operation is the same as for the single-input, single-output differentialamplifier just described. However, another output is obtained from the bottom of R2. Asthe input signal goes positive, thus causing increased current through Q1, R2 has agreater voltage drop. The output signal at the bottom of R2 therefore is negative going.

A negative-going input signal will decrease current and reverse the polarities of bothoutput signals. Now you see how a differential amplifier can produce two amplified,differential output signals from a single-input signal. One further point of interest aboutthis configuration is that if a combined output signal is taken between outputs numberone and two, this single output will be twice the amplitude of the individual outputs. Inother words, you can double the gain of the differential amplifier (single output) bytaking the output signal between the two output terminals. This single-output signal willbe in phase with the input signal. This is shown by the phantom signal above R5 (thephantom resistor connected between outputs number one and two would be used todevelop this signal).DIFFERENTIAL-INPUT, DIFFERENTIAL-OUTPUT, DIFFERENTIAL AMPLIFIER

When a differential amplifier is connected with a differential input and a differentialoutput, the full potential of the circuit is used. Figure 3-9 shows a differential amplifierwith this type of configuration (differential-input, differential-output).

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Normally, this configuration uses two input signals that are 180 degrees out of phase.

This causes the difference (differential) signal to be twice as large as either input alone.

(This is just like the two-input, single-output difference amplifier with input signals that

are 180 degrees out of phase.)Output number one is a signal that is in phase with inputnumber two, and output number two is a signal that is in phase with input number one.

The amplitude of each output signal is the input signal multiplied by the gain of the

amplifier. With 180-degree-out-of-phase input signals, each output signal is greater in

amplitude than either input signal by a factor of the gain of the amplifier. When an

output signal is taken between the two output terminals of the amplifier (as shown by

the phantom connections, resistor, and signal), the combined output signal is twice as

great in amplitude as either signal at output number one or output number two. (This is

because output number one and output number two are 180 degrees out of phase with

each other.) When the input signals are 180 degrees out of phase, the amplitude of the

combined output signal is equal to the amplitude of one input signal multiplied by two

times the gain of the amplifier. When the input signals are not 180 degrees out of

phase, the combined output signal taken across output one and output two is similar to

the output that you were shown for the two-input, single-output, difference amplifier. The

differential amplifier can have two outputs (180 degrees out of phase with each other),

or the outputs can be combined as shown in figure 3-9.

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Experiment No: 7 Date: __/__/____

HALF/FULL ADDER & HALF/FULL SUBTRACTOR

Aim: - To realize half/full adder and half/full subtractor.Using X-OR and basic gates

Apparatus Required: -

IC 7486, IC 7432, IC 7408, IC 7400, etc.

Procedure: -

1. Verify the gates.

2. Make the connections as per the circuit diagram.

3. Switch on VCC and apply various combinations of input

according to

truth table.

4. Note down the output readings for half/full adder and

half/full

subtractor sum/difference and the carry/borrow bit for

different

combinations of inputs.

Circuit Diagram:-

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Conclusion: -

Experiment No: 8 Date: __/__/____

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FLIP-FLOP

Aim:- Truth table verification of Flip-Flops: (i) RS-Type

(ii) D- Type(iii) T- Type.(iv)JK-Type


IC 7400,IC 7404 etc.

Procedure: -

1. Connections are made as per circuit diagram.

2. Verify the truth table for various combinations of inputs.

Circuit Diagram& Truth table:

i)RS Flip-Flop

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Qn/QnRSQn+1/Qn+1

0 1 0 0

1 0 0 0

0 1 0 1

1 0 0 1

0 1 1 0

1 0 1 0

0 1 1 1

1 0 1 1

ii) D Flip-Flop

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iii) T Flip-flop

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Conclusion:-

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Experiment No:9 Date: __/__/____

MUX/DEMUX USING 74153 & 74139

Aim: - To verify the truth table of MUX and DEMUX .


IC 74153, IC 74139 etc.

Procedure: - (IC 74153)

1. The Pin [16] is connected to + Vcc.

2. Pin [8] is connected to ground.

3. The inputs are applied either to A input or B input.

4. If MUX A has to be initialized, Ea is made low and if MUX

B

has to be initialized, Eb is made low.

5. Based on the selection lines one of the inputs will be

selected at the

output and thus verify the truth table

Procedure: - (IC 74139)

1. The inputs are applied to either a input or b input

2. The demux is activated by making Ea low and Eb low.

3. Verify the truth table .

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Conclusion: -

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Experiment 10: 8-bit Digital-to-Analog Converter

Overview:

This article aims to introduce to

beginners and intermediate readers asimple solution to build a digital toanalog converter, based on the famousr/2r resistors network. This article alsodiscuss a problem encountered by manybeginners while trying to build their ownDAC, and proposes some very simplesolutions to that problem.

Through this article, I am going to explain how to build an 8-bit digital to analogconverter with parallel input. If you don't know what this means, well its simply a circuitthat will take as input a digital 8-bit number from 0 (00000000) to 255 (11111111), andoutput the relative value on a scale from 0 to 5v.

The maths that describe this process is very simple, an 8 bit converter will divide the 5volts into 255 steps, each step having a value of: 5/255 = 0.019 V

Then the output voltage for the converter should be equal to the binary input multipliedby the step value, e.g. for an input of 129 (1000 0001 in binary) the output voltage

should be: 129 X 0.019 = 2.451V

Here is a simplified functional diagram of an 8-bit DAC.

Some vocabularyDAC: Digital to AnalogconverterD0, D1, D..: Data linesAnalog: Continuouselectrical signalsDigital: Method of

representing informationusing "1" and "0" (usually 5vand 0V)LSB: Less significant bit.MSB: Most significant bit.

R/2R LADDER NETWORK:

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The digital data enteringthought the 8 lines (D0toD7) are going to beconverted to an equivalentanalog voltage (V out) by

the mean of the R/2Rresistor network. Actually alot of commercial Digital toAnalog converter ICs arebased on this sameprinciple. The R/2Rnetwork is build by a set ofresistors of 2 values, withone of them double theother (example 10K and20K), in on of my circuits I

used 1M ohm and 470Kohm resistors, which isquite near to the R/2Rratio, and this smalldifference didn't cause anydetectable

Follow the colors on the schematic and on thedescription text respectively, it can help!

errors in most applications. However, if you want to build a very precise DAC, beprecise when choosing the values of the resistors that will exactly match the R/2R ratio.

Note that you can build a DAC with any number of bits you want, simply by enlargingthe resistor network, by adding more R/2R branches(like the one shaded in green),

BUT you must keep the 2R resistance connected to ground (shaded in light red)

Going through the mathematical proof for the operation of this converter can be apain for some of us, and I am only intending to keep things simple.

Now, in order to use this Resistor Network (also called R/2R Ladder) for realapplications, you will have to build a very simple voltage buffer circuit, which will beexplained in the next section.

CIRCUIT DIAGRAM:

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Follow the colors on the schematic and on the description text respectively, itcan help!

All the components are labeled on the circuit, so i'll start directly to explain how it works.to simplify this task, i'll split the circuit into 2 main stages: the Digital to analogconverterand the Voltage buffer stage.

Stage 1: the Digital to analog converter(The R/2R network)This part have been explained in detail in the previous section, its purpose is to createthe voltage V1 which is equivalent to the weight of the binary number on the lines (D0toD7). Now that this is a resistor network, if we apply any load on the output of the first

stage, this load will be considered as an additional resistor in the network, and thus willdisturb the network which will no longer provide the correct & desired output voltage.Therefore, to overcome this problem, we need a voltage buffer, here is where the nextstage comes...

Stage 2: the voltage bufferThis stage will isolate the point V1 from the final output V2, while always keeping thevoltage V2 at the exact same value ofV1. This is what we call a voltage buffer. for thevoltage buffer we use an opamp with the output connected to the inverting input (thisspecial configuration of the Op Amp is also called Voltage Follower). The mostimportant things to note are:

1 No current (almost 0A) will flow from the point V1 into the opamp, so we wont bedisturbing the resistor network configuration2 V2 will always equal V1 (theoretically, see the rest of this document)3 The current going out from the point V2to any other stage is sourced from from thepower supply of the OpAmp.

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A quick look on those 2 graphs can besufficient to understand the problem: theoutput of the op-amp is not linear on thefull 0-to-Vcc scale. actually an OpAmp,depending on its type, will deliver a

maximum voltage of (Vcc - 0.5V), whereVcc is the supply voltage of the OpAmp.So, in our application, the OpAmp willonly deliver 4.5V even if theoretically itshould deliver 5V.

You may think this caused by the resistornetwork, but it's not! this is a limitation inthe op-amp itself.

Lets get a little deeper into the problem,

the actual output curve in red should belinear, but actually it begins loosing itslinearity beginning from 3.9 volt. (Againthis depends on the type of OpAmp,those results a based on my owntests on a LM350 OpAmp) The red'Error zone' is where the output of theDAC no longer math the relative binaryinput.

This is the error we will be trying toovercome in the next part, through 2 verysimple solutions.

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Solution 1 :

The first solutions - shown in the red shading - is to increase the supply voltage of theOp-Amp, as shown in the schematic. this will totally solve the problem, and, whetheryou are supplying 6.5 volts or more, you will get neat linear output from 0V to 5V.

Solution 2 :

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Experiment No: 11

AIM : Seven segment LED display

APPARATUS REQUIRED :

Seven-Segment LEDs

The seven-segment LED display has four individual digits, each with a decimal point.Each of the seven segments (and the decimal point) in a given digit contains anindividual LED. When a suitable voltage is applied to a given segment LED, currentflows through and illuminates that segment LED. By choosing which segments toilluminate, any of the nine digits can be shown.

Pin connections:

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1. A, B, C, D are the binary inputs.

2. a, b, c, d, e, f, g, h are the driver signals to the display elements.

3. LT is the lamp test control, turns all segment On, active Low

4. BL blanks all segments when activated, active LOW

5. LE is the latch enable control.

Truth table

The function of a BCD to 7-segment decoder is to convert the logic states at the outputsof a BCD counter such as the 4510 into a form which will drive a 7-segment display.The display shows the decimal numbers 0-9 and is easily understood. The individualsegments making up a 7-segment display are identified by letters as follows:

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There are two important types of 7-segment LED display. In a common cathodedisplay, the cathodes of all the LEDs are joined together and the individual segmentsare illuminated by HIGH voltages.

In a common anode display, the anodes of all the LEDs are joined together and theindividual segments are illuminated by connecting to a LOW voltage.

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When the 4511 is set up correctly, the outputs follow this truth table:

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Experiment No:12 Date:__/__/____

ASYNCHRONOUS COUNTER DESIGN AND MOD-N

COUNTER

Aim: - Realization of 3-bit Asynchronous counter and Mod-Ncounter

design ..


IC 7408, IC 7476, IC 7400, IC 7432 etc.

Procedure: -

1. Connections are made as per circuit diagram.

2. Clock pulses are applied one by one at the clock I/P and

the O/P is

observed at QA, QB & QC for IC 7476.

3. Verify the Truth table .

Circuit Diagram:

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lmece204 unified electronics-i lab manual

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