lmece317

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LABORATORY MANUAL

COURSE CODE: ECE 317

COURSE TITLE: ANALOG AND LINEAR INTEGRATED CIRCUITS

LABORATORY

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Table of Contents

Sr. No. Title of the Experiment

Page

No.

1 D.C. characterization and finding parameters of transistors

2-8 2 Design of simple amplifiers (common emitter and common source) 8

3 Design of differential amplifier 14

4 Design of an oscillator (phase shift/Colpitts/Hartley/Wien bridge) 18

5 Design of tuned amplifier 23

6 Astable and Monostable Multivibrator and Schmitt Trigger using Op-Amp

28

7 Operational Amplifiers (IC741)-Characteristics and Application

35

8 Waveform Generation using Op-Amp (IC741)

40

9 Phase Shift Oscillator and Wein Bridge Oscillator using Op-Amp

44

10 Study and Application of PLL IC

50

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Experiment No.1

Aim: D.C. characterization and finding parameters of transistors

Equipments to be used:

THEORY:

A BJT is a three terminal two junction semiconductor device in which the conduction is due to both the charge carrier. Hence it is a bipolar device and it amplifier the sine waveform as

they are transferred from input to output. BJT is classified into two types NPN or PNP. A NPN transistor consists of two N types in between which a layer of P is sandwiched. The

transistor consists of three terminal emitter, collector and base. The emitter layer is the source

of the charge carriers and it is heartily doped with a moderate cross sectional area. The

collector collects the charge carries and hence moderate doping and large cross sectional area.

The base region acts a path for the movement of the charge carriers. In order to reduce the

recombination of holes and electrons the base region is lightly doped and is of hollow cross

sectional area. Normally the transistor operates with the EB junction forward biased. In

transistor, the current is same in both junctions, which indicates that there is a transfer of

resistance between the two junctions. One to this fact the transistor is known as transfer

resistance of transistor

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PROCEDURE:

INPUT CHARECTERISTICS:

1. Connect the circuit as per the circuit diagram.

2. Set VCE ,vary VBE in regular interval of steps and note down the corresponding IB

reading. Repeat the above procedure for different values of VCE.

3. Plot the graph: VBE Vs IB for a constant VCE.

OUTPUT CHARECTERISTICS:


2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading.

Repeat the above procedure for different values of IB.

3. Plot the graph: VCE Vs IC for a constant IB.

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RESULT: The transistor characteristics of a Common Emitter (CE) configuration were

plotted and uses studied

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Date of Performance Worksheet of the student Registration Number:

Aim: Design of common emitter amplifier:

Observations:

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RESULT AND DISCUSSION: The transistor characteristics of a Common Emitter (CE)

configuration were plotted and studied.

hie =

hfe =

hre =

hoe =

Attach Graph:

Calculations:

Result and Discussion :

Error Analysis :

Learning Outcomes :

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To be filled in by facuty Sr. no Parameter (Scale from 1-10, 1 for very poor and 10

excellent) Marks obtained Max.

Marks

1 Understanding of the student about the procedure. 20

2 Observations and analysis including learning outcomes. 20

3 Completion of experiment, Discipline and Cleanliness. 10

Signature of Faculty Total Marks obtained

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Experiment No.2

Aim: Design of simple amplifiers (common emitter and common source)

Appratus:

LEARNING OBJECTIVE:

To draw characteristics of FET and to get the value of gain

THEORY:

FET is a voltage operated device. It has got 3 terminals. They are Source, Drain & Gate.

When the gate is biased negative with respect to the source, the pn junctions are reverse

biased & depletion regions are formed. The channel is more lightly doped than the p type

gate, so the depletion regions penetrate deeply in to the channel. The result is that the channel

is narrowed, its resistance is increased, & ID isreduced. When the negative bias voltage is

further increased, the depletion regionsmeet at the center & ID is cutoff completely.

PROCEDURE:

DRAIN CHARACTERISTICS:


2. Set the gate voltage VGS = 0V.

3. Vary VDS in steps of 1 V & note down the corresponding ID.

4. Repeat the same procedure for VGS = -1V.

5. Plot the graph VDS Vs ID for constant VGS.

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OBSERVATIONS

1. d.c (static) drain resistance, rD = VDS/ID.

VDS/ ID.

3. Open source impedance, YOS = 1/ rd.

TRANSFER CHARACTERISTICS:


2. Set the drain voltage VDS = 5 V.

3. Vary the gate voltage VGS in steps of 1V & note down the corresponding ID.

4. Repeat the same procedure for VDS = 10V.

5. Plot the graph VGS Vs ID for constant VDS.

FET PARAMETER CALCULATION:

Amplification factor =rd . gm

CIRCUIT DIAGRAM:

BOTTOM VIEW OF BFW10: SPECIFICATION:Voltage : 30V, IDSS > 8mA.

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MODEL GRAPH:

DRAIN CHARACTERISTICS:

TRANSFER

CHARACTERISTICS:

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Aim: JFET characteristics with current and voltage measurements

Observations:

Attach Graph:

Calculations:

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Error Analysis :

Learning Outcomes :



Marks





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Experiment No. 3

Aim: Design of differential amplifier

List of Components:

Transistor BC237

Resistor:2x12 kohm,1x1kohm

Objectives:

1) To obtain DC quiescent points of differential amplifiers by performing AC and DC

analysis, and also to measure and calculate the common mode gain, the differential mode

gain and the common mode rejection ratios of the differential amplifiers.

Theory:

Differential amplifiers are generally used to increase the differentiation level of the incoming

AC signal. Differential amplifiers are especially used as the first stage of the high gain

amplifiers because of their various useful characteristics. It is possible to obtain quite stable

and drift resistant amplifiers by choosing the characteristics of the transistors as the same

(which is obtained by implementing the transistors on the same silicon wafer with the same

W/L ratios) due to the symmetric structure of the difference amplifier. It is ideal to use the

difference amplifier if the difference of the two signals which both have a large common DC

magnitude is intended to be measured. OPAMP circuits consist of cascade connected

differential amplifiers. Thus, it is possible to have stable and high gain amplifiers by using

the differential amplifier structure.

Fig .Basic Differential Amplifier

Procedure:

1. Set up the circuit in Figure below. Connect + and supply voltages carefully. Be careful about the grounds of the DC supply voltages and the ground of the circuit.

2. Apply differential voltage (a) to the inputs Vi1 and Vi2.

a. Vi1=10mV.sin(2.103 .t) Vi2=0

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By measuring the output differential voltage (Vo1-Vo2), find Add

Note: While measuring the differential voltage 2 node of 1 probe must be connected to the

output terminals.

3. Apply common voltage (b) to the inputs Vi1 and Vi2.

b. Vi1= Vi2=10mV.sin(2.103 .t) By measuring the output common voltage (Vo1 or Vo2), find Acc

Calculate the value of CMRR by using the measured Add and Acc values and fill the

appropriate space in the table given in the results page.

Fig. Differential amplifier circuit

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Aim: Design of differential amplifier

Observations:

Attach Graph:

Calculations:


Error Analysis :

Learning Outcomes :

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Marks





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Experiment No.4

Aim: Design of an oscillator (phase shift/Colpitts/Hartley/Wien bridge)

Equipments to be used:

Objective: To determine the frequency of oscillations of an RC phase shift oscillator.

Theory:

In the RC phase shift oscillator, the combination RC provides self-bias for the amplifier. The

phase of the signal at the input gets reverse biased when it is amplified by the amplifier. The

output of the amplifier goes to a feedback network consists of three identical RC sections .

Each RC section provides a phase shift of 60o. Thus a total of 180

o phase shift is provided by

the feedback network. The output of this circuit is in the same phase as the input to the

amplifier. The frequency of oscillations is given by

F = 1/2RC(6+4K)1/2 Where , R1 = R2=R3=R , C1 =C2=C3=C and

K=Rc/R.

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Procedure:

1. Connect the circuit as shown in Fig A. 2. Switch on the power supply. 3. Connect the CRO at the output of the circuit. 4. Adjust the RE to get undistorted waveform. 5. Measure the Amplitude and frequency . 6. Compare the theoretical and practical values. 7. Plot the graph amplitude versus frequency.

Theoretical values: F = 1/2RC (6+4K)1/2 = 1/2 (10K) (0.001F) (6+4(0.01))1/2 = 647.59Hz

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Result:

The frequency of RC phase Shift Oscillator is determined.

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Aim: Design of an oscillator (phase shift/Colpitts/Hartley/Wien bridge)

Observations:

Theoretical values: F = 1/2RC (6+4K)1/2 = 1/2 (10K) (0.001F) (6+4(0.01))1/2 = 647.59Hz

Attach Graph:

Calculations:


Error Analysis :

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Learning Outcomes :



Marks





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Experiment No.5

Aim: Design of tuned amplifier

Equipments and components reauired: Resistor (1Kohm,22 Kohm,100

Kohm),capacitor(0.1F,3),Inductors(10mH),Transistor BC147,AFO(0-1MHz),RPS(0-

30V),CRO

Objective:To design and construct a single tuned amplifier to amplify a 5Khz signal and to

plot the frequency response.

Theory

Sometimes it is desired that an amplifier should select a desired frequency or a narrow band

of frequencies and amplify it to desired levels.

In order to pick up and amplify the desired radio frequency signal, the resistive load in the

audio amplifier is replaced by a tuned circuit (Parallel resonant circuit). The tuned circuit is

capable of selecting a particular frequency and rejecting others.

The circuit shown is a capacitive coupled tuned amplifier. The values of the capacitor C and

inductance (L) of the circuit are selected in such a way that the resonant frequency of the

tuned circuit is equal to the frequency to be selected and amplified.

Resistors R1, R2, R4 are biasing resistors used to provide the DC operating currents voltages

for the transistor.

Formula :

Fo=1/(2 LC) Quality factor = fo/BW

Bandwidth = fH fL fo = Resonant frequency

fL = Lower cutoff frequency

fH = Uppercutoff frequency

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DESIGN :

Tank Circuit

Fo = 1/(2 LC) Given fo = 5KHz,

Assume C= 0.1 F

L= 10.14 mH

Amplifier Design

Transistor BC147

Ic = 1mA, hfo min= 200

Assume Vcc = 10V

Selection of RE, R2,R1`

VRE = 1/10 x Vcc = 1/10 x 10 = 1V

VRE/ IE = 1V/1mA =10K RE = 1 K R2 =( hfo min) RE/ 10 = 20K

Select R2 =22 K VR1=VCC-VR2

VR1=VCC-(VBE-VR1)

VRI=10-(0.6+1)=8.4V

VR1/VR2=R1/R2

R1=VR1*R2/VR2=105Kohm

Select R1=100kohm

Cc=0.1F

XCE=1/10*RE

XCE=1/2fCe Let f=20 Hz

Cx=79.6F

Procedure:

Connect the circuit as shown in the figure

Connect a sine wave generator set at 1000 Hz frequency and 50 mV signal voltage at the input of the amplifier circuit.

Connect an oscilloscope across the output nodes.Observe the sine wave output on it,adjust the output of sine wave generator until undistorted.

Observe and measure p-p amplitude of input and output signal and record values.

Now sweep the input signal frequency in the range 30 Hz to 1 MHz .

For each setting of input frequency ,measure and record the output signal voltage

Draw the frequency response curve on semilog graph sheet and obtain the value of resonant frequency,upper and lower cut-off frequency and bandwidth

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Aim: Design a tuned amplifier

Observations:

Attach Graph:

Calculations:


Error Analysis :

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Learning Outcomes :



Marks





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Experiment No.6

Aim: Astable and Monostable Multivibrator and Schmitt Trigger using Op-Amp

Equipments and components required:

S.No Component Range Quantity

1. Op amp IC 741 1

2. DTS (0-30) V 1

3. CRO 1

4. Resistor -

5. Capacitors

6. Diode IN4001 2

7. Probes 1

THEORY:

ASTABLE MULTIVIBRATOR

Astable Multivibrator is an electronic circuit which generates square wave of its own

without any external triggering pulse. It is also called a free running oscillator, the principle

of generation of square wave output is to force an op-amp to operate in the saturation region.

In fraction = R2 / (R1 + R2) of the output is feedback to the non-inverting input terminal. Thus the reference voltage Vref is Vo and may take values as +Vsat (or) Vsat. The output is also feedback to the inverting input terminal after integrating by means of low pass RC

combination. Whenever input at the inverting input terminal just exceeds Vref, switching

takes place resulting in a square wave output. In astable multivibrator, both the states are

quasi stable.

MONOSTABLE MULTIVIBRATOR

Monostable multivibrator has one stable state and the other is quasi stable state. The

circuit is useful for generating single output pulse of adjustable time duration in response to a

triggering signal. The width of the output pulse depends only on external components

connected to the op-amp. The monostable circuit is nothing but the modified form of the

astable multivibrator. A diode D1 clamps the capacitor voltage to 0.7V when the output is at

+Vsat. A negative going pulse signal of magnitude V1 passing through the differentiator R4C4

and diode D2 produces a negative going triggering impulse and is applied to the non-inverting

input terminal. This circuit can be modified to achieve voltage to time delay conversion as in

the case of square wave generator. The monstable multivibrator circuit is also referred to as

time delay circuit as it generates a fast transition at a predetermined time T after the

application of input trigger. It is also called a gating circuit as it generates a rectangular

waveform at a definite time and thus could be used to gate parts of a system.

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Design:

1. Monostable Multivibrators:

= R2/R1+R2 [ = 0.5 & R1 = 10 K]

Find R2 = ; R3 = 1K; R4 = 10K;

Let F =_____KHz ; C= 1mfd; C4 = 0.1mfd

Pulse width, T = 0.69RC

Find R =

Circuit Diagram

Model graph:

Vin

VC

VO

Vsat

Vsat

VD

t

t

t

TV sat

TP

CRO

+

+10V

7

4

-10V

2

3

IC741

R

Vsat

C4 D2

R4

D1C

VC

6R3

VO

R1

R2

Vin

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Procedure:

1. Make the connections as shown in circuit diagram.

2. A trigger pulse is given through differentiator circuit through pin no.3

3. Observe the pulse waveform at pin no.6 using CRO and note down the time period.

4. Plot the waveform on the graph.

2. Astable Multivibrators:

Design:

T = 2RC

R1= 1.16 R2

Given fO = _______KHz

Frequency of Oscillation fo = 1 / 2 RC if R1 = 1.16R2

Let R2 = 10 Kohm

R1 =

Let C = 0.05 F

R = 1 / 2 fC

Circuit Diagram

2

+10V

IC741

R

+

CRO

C

3

10V

10K

R1

R2

11.6

VO4

7

6

10 k

0.05f

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Model graph

Voltage in volts

Voltage across the capacitor

t(mse)

vo

Procedure:

1. Make the connections as shown in the circuit diagram

2. Keep the CRO channel switch in ground and adjust the horizontal line on the x axis so

that it coincides with the central line.

3. Select the suitable voltage sensitivity and time base on the CRO.

4. Check for the correct polarity of the supply voltage to op-amp and switch on power

supply to the circuit.

5. Observe the waveform at the output and across the capacitor. Measure the frequency

of oscillation and the amplitude. Compare with the designed value.

6. Plot the Waveform on the graph.

3) Schmitt Trigger:

Design

VCC = 12 V; VSAT = 0.9 VCC; R1= 47K; R2 = 120

VUT = + [VSAT R2] / [R1+R2] & VLT = - [VSAT R2] / [R1+R2] & HYSTERSIS [H] = VUT -

VLT

Circuit Diagram

Vin

+12V

R1

-12V

R2

0

+

-

3

26

74

RL = 10K

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Model Graph

Procedure

1. Connect the circuit as shown in the circuit

2. Set the input voltage as 5V (p-p) at 1KHz. (Input should be always less than Vcc)

3. Note down the output voltage at CRO

4. To observe the phase difference between the input and the output, set the CRO in dual

Mode and switch the trigger source in CRO to CHI.

5. Plot the input and output waveforms on the graph.

Observation:

Peak to peak amplitude of the output = Volts.

Frequency = Hz.

Upper threshold voltage = Volts.

Lower threshold voltage = Volts

Result:

Thus Astable & Monostable Multivibrators and Schimitt trigger were designed

using op-amp and the waveforms were plotted.

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Aim: Astable and Monostable Multivibrator and Schmitt Trigger using Op-Amp

Observations:

Model graph of monostable multivibrator:

Model graph of Astable:

Voltage in volts

Voltage across the capacitor

t(mse)

vo

Model Graph of Schmitt trigger:

Observation :

Vin

VC

VO

Vsat

Vsat

VD

t

t

t

TV sat

TP

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Peak to peak amplitude of the output = Volts.

Frequency = Hz.

Upper threshold voltage = Volts.

Lower threshold voltage = Volts

Attach Graph:

Calculations:


Error Analysis :

Learning Outcomes :



Marks





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Experiment No.7

Aim: Operational Amplifiers (IC741)-Characteristics and Application

Appratus:

a. Power supply : Dual variable regulated low voltage DC source

b. Equipments : CRO, AFO, DMM (Digital Multimeter), DRBs

c. Resistors :

d. Semiconductor : IC741 op-amp

e. Miscellaneous : Bread board and wires

Objective:

1.To measure the input bias current, input offset current, input offset voltage, input and

output voltage ranges, the slew rate and bandwidth of op amp. 2.To implement opamp as a summer.

THEORY

An op-amp is a high gain, direct coupled differential linear amplifier choose response

characteristics are externally controlled by negative feedback from the output to input, op-

amp has very high input impedance, typically a few mega ohms and low output impedance,

less than 100. Op-amps can perform mathematical operations like summation integration, differentiation, logarithm, anti-logarithm, etc., and hence the name operational amplifier op-

amps are also used as video and audio amplifiers, oscillators and so on, in communication

electronics, in instrumentation and control, in medical electronics, etc.

The circuit schematic of an op-amp is a triangle as shown below in Fig. op-amp has two input

terminal. The minus input, marked (-) is the inverting input. A signal applied to the minus

terminal will be shifted in phase 180o at the output. The plus input, marked (+) is the non-

inverting input. A signal applied to the plus terminal will appear in the same phase at the

output as at the input. +VCC denotes the positive and negative power supplies. Most op-amps

operate with a wide range of supply voltages. A dual power supply of +15V is quite common

in practical op-amp circuits. The use of the positive and negative supply voltages allows the

output of the op-amp to swing in both positive and negative directions.

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EXPERIMENT

Use op-amp dc power supply voltages 15V wherever not specified

1. Input bias current and input offset current

Procedure:

1 .Connect the circuit of figure

2 .Using a DMM, measure the dc voltage at the (-) terminal & record the values in Table

3 .By ohms law, calculate the input currents; IB + and IB -. Average these values to find out the input Bias current. Also, find the difference between these two currents to know the input

offset current. Record these values in Table.

2. Input offset voltage

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Procedure

2.1 Connect the circuit of Figure

2.2 Measure the DC output voltage at pin 6 using multimeter and record the result in Table

2.3 Calculate the input offset voltage using the formula

Vi = Vout / 1000 and record the value in table

3. Slew rate and bandwidth

Procedure:

3.1 Connect the circuit of Figure .

3.2 Using an AFO, provide a 1V peak to peak square wave with a frequency of 25 KHz.

3.3 With an oscilloscope, observe the output of OPAMP. Adjust the oscilloscope timing the

get a couple of cycles.

3.4 Measure the voltage change V and time change T of the output waveform. Record theresults in Table .

3.5 Calculate the slew rate using the formula

SR = V / T Using the circuit of figure 3, set the AFO at 1KHz. Adjust the signal level to get 20V peak to peak (20 VPP) out of the op-amp. 3.6 Increase the frequency and watch the waveform somewhere above 10 KHz, slew rate

distortion will become evident. That maximum frequency max at which the op-amp can be operated is called bandwidth of an op-amp record the value in Table .

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Aim: Operational Amplifiers (IC741)-Characteristics and Application

Observations:

1. Input bias current and input offset current

2.Input offset voltage:

3.Slew rate and bandwidth

Attach Graph:

Calculations:


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Error Analysis :

Learning Outcomes :



Marks





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Experiment No.8

Aim: Waveform Generation using Op-Amp (IC741)

Apparatus required: Power supply ,CRO ,Function Generator ,Connecting leads,

Breadboard, IC 741,Resistance(10 kohm,11.5 kohm),0.05 microf capacitor.

Objective: To design and realize square wave generator using IC 741. Theory:-Square waves

are generated when the opamp is forced to operate in the saturation region.That is the output

of the opamp is forced to swing respectively between +Vsat and Vsat resulting in generation of square wave.The square wave generator is also called a free running or astable

multivibrator.Assuming the voltage across capacitor C is zero at the instant the dc supply at

+Vcc and Vee are applied .Initially the capacitance C acts,as a short circuit.

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Aim: Waveform Generation using Op-Amp (IC741)

Observations: Observe the output waveform:

Attach Graph:

Calculations:


Error Analysis :

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Learning Outcomes :



Marks





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Experiment No.9

Aim: Phase Shift Oscillator and Wein Bridge Oscillator using Op-Amp

Appratus:

S.NO COMPONENTS RANGE QUANTITY

1 IC741 1

2 CRO 30MHZ 1

3 Dual Power Supply 15V 1

4

Resistors

3.3 K 10K,,

5.6K,

4.7K.

5

Each one

Objective:

To design the following sine wave oscillators

a) Wein Bridge Oscillator with the frequency of 1 KHz. b) RC Phase shift oscillator with the frequency of 200 Hz.

THEORY:

RC PHASE SHIFT OSCILLATOR:

A phase shift oscillator, which consists of an op-amp as the amplifying stage and

three RC cascaded networks as the feedback circuit that provides feedback voltage from the

output back to the input of the amplifier. The op-amp is used in the inverting mode.

Therefore, any signal that appears at the inverting terminal is shifted by 180o phase shift

required for oscillation. Thus the total phase shift around the loop is 360o. The frequency of

oscillation fo if this phase shift oscillator is given by

f = 1 / (2(6) RC). f = 0.065 / RC.

At this frequency, the gain AV must be atleast 29. That is

Rf / R1= 29. (or) Rf = 29R1.

Rf = 29 33 103 = 957 K.

Use Rf = 1 M potentiometer.

THEORY:

WEIN BRIDGE OSCILLATOR

A commonly used frequency oscillator is a wein bridge oscillator. In

this circuit the feedback signal is connected to the non-inverting input terminal so that the op-

amp is working as a non-inverting amplifier. Therefore, the feedback network need not

provide any phase shift. The circuit can be viewed as a wein bridge with a series RC network

in one arm and a parallel RC network in the adjoining arm. Resistors R1 and Rf are connected

in the remaining two arms. The condition of zero phase shift around the circuit is achieved by

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balancing the bridge. The wein bridge are the most commonly used sine wave oscillators for

audio frequencies. The frequency of oscillation depends upon RC components.

PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) Switch ON the power supply and measure the amplitude and time period of the output waveform using the CRO.

(iii) Calculate the frequency of oscillation using the time period and compare this value of frequency with the theoretical frequency fo.

(iv) Plot the output waveform in graph.

RC PHASE SHIFT OSCILLATOR USING OP-AMP

DESIGN PROCEDURE:

For op-amp type A741, choose frequency less than 1 KHZ. Let C = 0.1f and fo = 200 HZ. Using the formula, fo = 0.065 / RC.

We get, R = 0.065 / (200 10-7

)

= 3.25 K So use R = 3.3 K. To prevent the loading of the amplifier, because of RC networks, it is necessary that

R1 10R. Hence R1 = 10

3 3.3 10 = 33 K.

33K

CRO

3

6

-

3.3K

3.3K

3.3K

IM

+

-

0.1mf

C2

0.1mf

+15V

4

0.1mf

C1

2

741

-15V

-

3.3K

7

-

C3

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WEIN BRIDGE OSCILLATOR

DESIGN PROCEDURE:

For the Wein bridge oscillator the frequency Fr = 5.03 KHz and T = 0.2ms.

Fr = 1 / (2RC). Let C = 0.01f R = 1 / ((2FrC). = 1 / ((2 5.03 103 0.01 10-6). =3.16 K

T = 1 / F.

= 1 / (5000Hz) = 0.2 10-3

s

Av = -Rf /R1

3 Let Rf = 6K

R1 = Rf /3 = 2K

2K

3.3K

3.3k

7

+

- V-

741

5.6k

0.01f

-15V

6

+15V

0.01f

6k

3

2

4

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MODEL GRAPH:

TABULATION:

AMPLITUDE(v) TIME PERIOD (ms) FREQUENCY(KHz)

RC Phase Shift

Oscillator:

Wein Bridge Oscillator:

RESULT:

Thus the RC Phase Shift Oscillator and Wein bridge oscillator was designed and

tested for the given frequency.

RC Phase Shift Oscillator:

The theoretical frequency = HZ

Observed Frequency= HZ.

Wein bridge oscillator:


Observed Frequency= HZ

T

V0

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Aim: Phase Shift Oscillator and Wein Bridge Oscillator using Op-Amp

Observations: TABULATION:

AMPLITUDE(v) TIME PERIOD (ms) FREQUENCY(KHz)

RC Phase Shift

Oscillator:

Wein Bridge Oscillator:

RESULT:

Thus the RC Phase Shift Oscillator and Wein bridge oscillator was designed and

tested for the given frequency.

RC Phase Shift Oscillator:


Observed Frequency= HZ.

Wein bridge oscillator:


Observed Frequency= HZ

Attach Graph:

Calculations:


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Error Analysis :

Learning Outcomes :



Marks





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Experiment No.10

Aim: Study and Application of PLL IC

APPARATUS REQUIRED:

S.NO COMPONENTS RANGE QUANTITY

1 IC 7490 1

2 Function Generator 3MHZ 1

3 CRO 30MHZ 1

4 Dual Power Supply 15V 1

5 Resistors 10K, 2.2K, 47K. Each two

6 Capacitors 0.01f, 10f. Each one

7 PLL Chip 565 1

8 Transistor BC107 1

Objective:

To learn the application of PLL as frequency multiplier.

THEORY:

Frequency multiplication can also obtained by using PLL in its harmonic

locking mode. A divide by N network is inserted between the VCO output and the phase

comparator input. In the locked state, the VCO output frequency fo is given by,

fo = Nfs.

The multiplication factor can be obtained by selecting a proper scaling factor N

of the counter. If the input signal is rich in harmonics e.g.: square wave, pulse train etc., then

VCO can be directly locked to the n-th harmonic of the input signal without connecting any

frequency divider in-between. However, as the amplitudeof the higher order harmonics

becomes less, effective locking may not take place for high values of n. Typically n is kept

less then 10.

Since the VCO output is rich in harmonics, it is possible to lock the m-th harmonic of the

VCO output with the input signal fs. The output fo of VCO is given by,

fo = fs / m.

PROCEDURE:

(i) The circuit connections are given as per the circuit diagram. (ii) Set up the circuit after verifying the condition of the components. (iii) Feed the input frequency 5V, 1KHz pulses to the pin of 565 IC. (iv) Observe the multiplid frequency at the pin 4. (v) Plot the graph for the values which will be taken from the CRO.

[Type text] Page 51

2.2k

4 NE 565

2 3

R7

2.2k

0.001Mf

3

2

10 Mf

7

0.01mf

10

-10V

11

10k

+10V

5

1

BC107

1

7

9 5

+10v

Fout = 2 Fin

6

7490

47k

10 8

[Type text] Page 52

MODEL GRAPH

FREQUENCY MULTIPLIER

RESULT:

Thus the frequency multiplier was designed and tested using PLL IC.

FO

T

Fin

T

[Type text] Page 53


Aim: Study and Application of PLL IC

Observations: (i) Observe the multiplid frequency at the pin 4. (ii) Plot the graph for the values which will be taken from the CRO.

Attach Graph:

Calculations:


Error Analysis :

[Type text] Page 54

Learning Outcomes :



Marks





lmece317

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