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12/14/13 Logic Circuit Simplification - Electronics Questions and Answers

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1. Which statement below best describes a Karnaugh map?

A. It is simply a rearranged truth table.

B. The Karnaugh map eliminates the need for using NAND and NOR gates.

C. Variable complements can be eliminated by using Karnaugh maps.

D. A Karnaugh map can be used to replace Boolean rules.

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2. Which of the examples below expresses the commutative law of multiplication?

A. A + B = B + A

B. A B = B + A

C. A (B C) = (A B) C

D. A B = B A


3. The Boolean express ion is logically equivalent to what single gate?

A. NAND B. NOR

C. AND D. OR


4. The observation that a bubbled input OR gate is interchangeable with a bubbled

output AND gate is referred to as:

A. a Karnaugh map

B. DeMorgan's second theorem

C. the commutative law of addition

D. the associative law of multiplication


5. The systematic reduction of logic circuits is accomplished by:

A. symbolic reduction

B. TTL logic

C. using Boolean algebra

D. using a truth table
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12/14/13 Logic Circuit Simplification - Electronics Questions and Answers Page 2

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6. Logically, the output of a NOR gate would have the same Boolean express ion as

a(n):

A. NAND gate immediately followed by an INVERTER

B. OR gate immediately followed by an INVERTER

C. AND gate immediately followed by an INVERTER

D. NOR gate immediately followed by an INVERTER


7. Which of the examples below expresses the distributive law of Boolean algebra?

A. A (B C) = (A B) + C

B. A + (B + C) = (A B) + (A C)

C. A (B + C) = (A B) + (A C)

D. (A + B)+C = A + (B + C)


8. Which output expression might indicate a product-of-sums circuit construction?

A.

B.

C.

D.


9. One of DeMorgan's theorems states that . Simply stated, this means

that logically there is no difference between:

A. a NAND gate and an AND gate with a bubbled output

B. a NOR gate and an AND gate w ith a bubbled output

C. a NOR gate and a NAND gate with a bubbled output

D. a NAND gate and an OR gate w ith a bubbled output
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12/14/13 Logic Circuit Simplification - Electronics Questions and Answers Page 2

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10. The commutative law of addition and multiplication indicates that:

A.the way we OR or AND two variables is unimportant because the result is the

same

B.we can group variables in an AND or in an OR any way we want

C.an expression can be expanded by multiplying term by term just the same as

in ordinary algebra

D.the factoring of Boolean expressions requires the multiplication of product

terms that contain like variables
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12/14/13 Sequential Logic Circuits - Electronics Questions and Answers

1. A ripple counter's speed is limited by the propagation delay of:

A. each flip-flop

B. all flip-flops and gates

C. the flip-flops only with gates

D. only circuit gates


2. To operate correctly, starting a ring counter requires:

A. clearing all the flip-flops

B. presetting one flip-flop and clearing all the others

C. clearing one flip-flop and presetting all the others

D. presetting all the flip-flops


3. What type of register would shift a complete binary number in one bit at a time and

shift all the stored bits out one bit at a time?

A. PIPO B. SISO

C. SIPO D. PISO


4. Synchronouscounters eliminate the de lay problems encountered with asynchronous

(ripple) counters because the:

A. input clock pulses are applied only to the first and last stages

B. input clock pulses are applied only to the last stage

C. input clock pulses are not used to activate any of the counter stages

D. input clock pulses are applied simultaneously to each stage


5. One of the major drawbacks to the use of asynchronous counters is that:

A. low-frequency applications are limited because of internal propagation delays

B. high-frequency applications are limited because of internal propagation delays

C.Asynchronous counters do not have major drawbacks and are suitable for use

in high- and low-frequency counting applications.

D. Asynchronous counters do not have propagation delays, which limits their usein high-frequency applications.
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6. Which type of device may be used to interface a parallel data format with external

equipment's serial format?

A. key matrix

B. UART

C. memory chip

D. serial-in, parallel-out


7. When the output of a tri-state shift register is disabled, the output level is placed in

a:

A. float state

B. LOW state

C. high impedance state

D. float state and a high impedance state


8. A comparison between ring and johnson counters indicates that:

A. a ring counter has fewer flip-flops but requires more decoding circuitry

B. a ring counter has an inverted feedback path

C. a johnson counter has more flip-flops but less decoding circuitry

D. a johnson counter has an inverted feedback path


9. A sequence of equally spaced timing pulses may be easily generated by which type

of counter circuit?

A. shift register sequencer

B. clock

C. johnson

D. binary


10. What is meant by parallel-loading the register?

A. Shifting the data in all flip-flops simultaneously

B. Loading da ta in two of the flip-flops

C. Loading data in all four flip-flops at the same time

D. Momentarily disabling the synchronous SET and RESET inputs
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12/14/13 Sequential Logic Circuits - Electronics Questions and Answers Page 3

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11. What is a shift register that will accept a parallel input and can shift data left or right

called?

A. tri-state

B. end around

C. bidirectional universal

D. conversion


12. What happens to the parallel output word in an asynchronous binary down counter

whenever a clock pulse occurs?

A. The output word decreases by 1.

B. The output word decreases by 2.

C. The output word increases by 1.

D. The output word increases by 2.


13. Mod-6 and mod-12 counters are most commonly used in:

A. frequency counters

B. multiplexed displays

C. digital clocks

D. power consumption meters
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12/14/13 Analog and Digital Converters - Electronics Questions and Answers

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1. Which of the following is a type of error associated w ith digital-to-analog converters

(DACs)?

A. nonmonotonic error

B. incorrect output codes

C. offset error

D. nonmonotonic and offset error


2. A 4-bit R/2R digital-to-analog (DAC) converter has a reference of 5 volts. What is the

analog output for the input code 0101.

A. 0.3125 V

B. 3.125 V

C. 0.78125 V

D. 3.125 V


3. A binary-weighted d igital-to-analog converter has an input resistor of 100 k . If the

resistor is connected to a 5 V source, the current through the resistor is:

A. 50 A

B. 5 mA

C. 500 A

D. 50 mA


4. What is the resolution of a digital-to-analog converter (DAC)?

A.It is the comparison between the actual output of the converter and its

expected output.

B.It is the deviation between the ideal straight-line output and the actual

output of the converter.

C.It is the smallest analog output change that can occur as a result of an

increment in the digital input.

D.It is its ability to resolve between forward and reverse steps when

sequenced over its entire range.

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12/14/13 Analog and Digital Converters - Electronics Questions and Answers

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5. The practical use of binary-we ighted digital-to-analog converters is limited to:

A. R/2R ladder D/A converters

B. 4-bit D/A converters

C. 8-bit D/A converters

D. op-amp comparators


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12/14/13 Analog and Digital Converters - Electronics Questions and Answers Page 2

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6. The difference between analog voltage represented by two adjacent digital codes, or

the analog step size, is the:

A. quantization B. accuracy

C. resolution D. monotonicity


7. The primary disadvantage of the flash analog-to digital converter (ADC) is that:

A. it requires the input voltage to be applied to the inputs s imultaneously

B. a long conversion time is required

C.a large number of output lines is required to s imultaneous ly decode the input

voltage

D.a large number of comparators is required to represent a reasonable sized

binary number


8. A binary-we ighted digital-to-analog converter has a feedback resistor, Rf, of 12 k . If

50 A of current is through the resistor, the voltage out of the circuit is:

A. 0.6 V

B. 0.6 V

C. 0.1 V

D. 0.1 V


9. What is the major advantage of the R/2R ladder digital-to-analog (DAC), as compared

to a binary-we ighted digital-to-analog DAC converter?

A. It only uses two different resistorvalues.

B. It has fewer parts for the same number of inputs.

C. Its operation is much eas ier to analyze.

D.The virtual ground is eliminated and the circuit is therefore eas ier to

understand and troubleshoot.


10. The resolution of a 05 V 6-bit digital-to-analog converter (DAC) is:

A. 63% B. 64%

C. 1.56% D. 15.6%
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11. In a flash ana log-to-digital converter, the output of each comparator is connected to

an input of a:

A. decoder

B. priority encoder

C. multiplexer

D. demultiplexer


12. Which is not an analog-to-digital (ADC) conversion error?

A. differential nonlinearity

B. missing code

C. incorrect code

D. offset


13. Sample-and-hold circuits in ana log-to digital converters (ADCs) are designed to:

A.sample andhold the output of the binary counterduring the conversion

process

B. stabilize the comparator's threshold voltage during the conversion process

C. stabilize the input analog s ignal during the conversion process

D.sample and hold the D/A converter staircase waveform during the conversion

process
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