Logic DesignCS221

1st Term 2009-2010

Storage (memory)Storage (memory)

Cairo University

Faculty of Computers and Information

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Administrivia homework #3 due Dec. 8th in lecture Project design due Dec. 8th in lecture course web site:

http://www.fci-cu.edu.eg/~skhattab/cs221/

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multiplexers with 3-state gates 3-state gates

logic 0 logic 1 high-impedance (open)

3-state buffer gate

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multiplexers with 3-state gates

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multiplexers with 3-state gates

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storage elements

storage (memory) elements store bits while power is on until input signals cause them to switch the stored bits

storedn bits

input signals

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storage elements latches:

storage elements that operate on the levels of input signals (0 or 1)

level-sensitive flip-flops:

storage elements that operate on the transitions in input signals (0->1 or 1->0)

edge-sensitive flip-flops are more common. flip-flops are constructed from latches.

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SR-latch 2 inputs: S (Set) and R (Reset) 2 outputs: Q and Q'

Function Table

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SR-latch with enable

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D latch

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graphic symbols for latches

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D flip-flop

edge-triggered

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D flip-flop