04/19/23 DATE-2001 1

LPSAT: A Unified Approach to RTL Satisfiability

Zhihong Zeng, Priyank Kalla, Maciej Ciesielski

Dept. of Electrical & Computer EngineeringUniversity of Massachusetts, Amherst

04/19/23 DATE-2001 2

Motivation

• GivenGiven an RTL design specification and a coverage metric, reach predefined coverage goal by simulation– code coverage, transactions, etc.

• Functional simulationFunctional simulation– Manual directed test – Random directed test – Deterministic test pattern generation

Support test pattern generation for functional simulation

04/19/23 DATE-2001 3

Functional Validation - typical scenarioC

ove

rag

e

Normalized verification test cycles

50 %

95 %

100 %

100.0

1.0

Deterministic tests

Pseudo-random directed tests

Manual directed tests

Test development time

?

04/19/23 DATE-2001 4

Outline

• SAT problem in our context– Deterministic test pattern generation– Designs with mixed arithmetic and logic blocks

• Previous work • Our uniform approach: LPSAT

– Create linear models for both domains– Handling wide operators– Complexity issues

• Experimental results• Conclusions and future work

04/19/23 DATE-2001 5

Functional Test Generation

• Deterministic test pattern generation– Formulate SAT problem for a complex combinational design– Solve SAT: find a set of satisfying assignment

Module DUT

…

always @ (clk) begin

if (A+B < B*C)

out = x;

else

out = a & b

end

Module DUT

…

always @ (clk) begin

if (A+B < B*C)

out = x;

else

out = a & b

end

A=?

01

<+

*

out

B=?

c=?

a=?b=?

x=?

extract

04/19/23 DATE-2001 6

Output Requirements

• In SAT, where do the output requirements come from ?– Combinational equivalence check

• Output of a miter to be set to a constant

– Directed tests (manual, random)• Known or generated randomly within a range

– Deterministic tests• It may correspond to a state that must be reached, or • It represents a branch condition that must be exercised

5

symbolic tracex

y Solve SAT for y=1

Example: If branch (x < 5) has not been taken, generate a test for it

04/19/23 DATE-2001 7

Structure of RTL Descriptions

01

<+

*

• Complex designs contain– Arithmetic blocks

– Boolean logic

– mixed logic

• Existing SAT solvers cannot efficiently handle high-level, arithmetic operators

04/19/23 DATE-2001 8

Types of Operators

A

BC

s

0

1

• Mixed-level blocks– MUX

< cA

B

– comparators– shifters, etc

ab c

• Boolean logic (bit-level)

– logic gates

+ --* /

A

B

C

• Arithmetic blocks (symbolic, word-level operators)– ADD, SUB– MULT, DIV

04/19/23 DATE-2001 9

Modeling: Boolean Domain

ab c

c = a & b

0 1

a

b

c

(a+c’)(b+c’)(a’+b’+c)=1

• Boolean logic:

– Boolean equations

– CNF formulas

– BDD

04/19/23 DATE-2001 10

Modeling: Arithmetic and Mixed Logic

• Arithmetic blocks:

– Linear constraints

• Mixed logic:

– Integer constraints

+ --* /

A

BC

C = A + BA < 255

< sD

E

1 if D < E

0 otherwises =

• Conclusion: inconsistent representation of different domain (Boolean and arithmetic)

04/19/23 DATE-2001 11

Modeling and Solving SAT Previous Approaches

• Map entire design onto BDD (BSAT, …)• Sometimes fast for UN-SAT instances• BDD blow-up

• Map entire design to CNF (GRASP, SATO,…)• Any generic CNF-based solver can be used• Representation is large, structural information is lost

• Map Boolean logic onto CNF, arithmetic operators onto linear equations (HSAT)

• Scales with design size• Solved by passing constraints from CNF to LP domain• Inconsistent domains, explicit backtracking needed

04/19/23 DATE-2001 12

Modeling and Solving SAT for Mixed Domains

• Our approach:– Represent both domains in a unified format

(linear constraints)• Scalable with design size

– Solve Mixed Integer Linear Program (MILP)• Constraint propagation between arithmetic and

logic parts is implicit in MILP solver

04/19/23 DATE-2001 13

LP Modeling:Arithmetic and Mixed Operators

< sD

E

X

YZ

s

10

+ --* /

A

BC

C = A + B A 255

Z – X – L (1-s) 0 X – Z – L (1-s) 0 Z – Y – L s 0 Y – Z – L s 0

D - E - L (1-s) < 0 D - E + L s 0

A,B,C ..,Y – symbolic variables; s = binary variable; L = large constant

04/19/23 DATE-2001 14

LP Modeling: Non-linear equations

• Expand operand AA = A0 + 2 A1 + … + 2 n-1 An-1

• Keep operand B as one variable

• Represent result in terms of partial products Pi

C = P0 + 2 P1 + … + 2 n-1 Pn-1

for i = 1, …, n-1:

Pi – L Ai 0

Pi – B + L(1-Ai) 0

0 Pi B

where L A,B

* A

B C = A * B

B

P0 = A0 B

P1 = A1 B

Pn-1=An-1B………..

An-1 A0Ai

04/19/23 DATE-2001 15

LP Modeling: Boolean Logic

ca

c = 1 - a

a

bc

a

bc

c ac bc a + bc 1

c ac bc a+b-1c 0

04/19/23 DATE-2001 16

LP Modeling:Wide Arithmetic Operators

• Integral resolution problem associated with LP solvers limit the largest integer number (~ 28 bits)

• Decompose wide arithmetic operators by introducing Boolean logic

>56 bits

sA

B

>28 bits

AH

BH

==28 bits

>28 bits

AL

BL

s

04/19/23 DATE-2001 17

Partitioning the Design

ZX

Y

< s+

A

BD

* C

E

10

• Partition design into arithmetic + Boolean domains

– Word-level signals: B, D, E, X, Z

– Word-level signals with (partial) bit-level expansion: A, C, Y

Y = Y[1] + 2*Y[2] + 4*Y[3] + …

– Single-bit Boolean signals: s

04/19/23 DATE-2001 18

MILP Solver - Efficiency Issues

• Not all integer variables need to be declares as int– Only IO signals defined as integer variables– Internal signals left as bounded continuous variables;

they will automatically be integer in the solution

inte

ger

inte

ger …

…continuous

+

0/1

147

• Ordering of 0/1 integer variables for MILP

– Decision variables on top

04/19/23 DATE-2001 19

LPSAT - example

Y[k] A[k], C[k]

Y[k] A[k] + C[k] – 1Y[k] 0

A[..] , C[..] ,Y[..] = Boolean vectorsA,B,C,D,E,X,Z = continuous variabless = decision variable (0,1)

D = A + B E = B * C (linearized) 0 A,B,C,D 255

0 E 65535

D - E - L (1-s) < 0 D - E + L s 0

Z – X – L (1-s) 0 X – Z – L (1-s) 0 Z – Y – L s 0 Y – Z – L s 0

<

* ZX

Y[..]

< s+

A

BD

* C

E

A[..]C[..]

1

0

1

0

+

04/19/23 DATE-2001 20

Results – test cases

• M13 – 13-bit multipliers (sat, non)

• M16 – 16-bit multipliers, decomposed (sat, non)• Square - compute Z2 = X2 + Y2, 16-bit variables• Quadratic - solve X2 = a X + b for 16-bit X• Linear-k - k-wide chain of comparators (k=40, 90),

simple structure, large # inputs (over 1200)

• Gcd-k - sequential circuit, 24-bit gcd unrolled k=20, 40 time frames

• Mdpe - multiplier feeding a dynamic priority encoder, taken from realistic design

04/19/23 DATE-2001 21

Experimental Results

0

1000

2000

3000

4000

m13

_1m

13_2

m16

_1m

16_2

squa

re1

squa

re0

quad

ratic

linea

r1lin

ear2

gcd2

0gc

d40

mdp

e1m

dpe2

LPSAT

SATO

GRASP

BSAT

04/19/23 DATE-2001 22

Conclusions and Future Work

• LPSAT pros and cons:– Mixed arithmetic and Boolean:

• datapaths, arithmetic circuits

– Not efficient, if contains large Boolean blocks

• Applications of LPSAT– SAT-based formal verification– Automatic functional test generation– Constrained/directed random simulation– High-level ATPG

• Computational efficiency – Generic (CPLEX) or specialized LP solver ?

• New directions– Constraint programming

04/19/23 DATE-2001 23

Constraint Programming - example

A[..] , C[..] ,Y[..] = Boolean vectorsA,B,C,D,E,X,Z = domain variabless = integer variable (0,1)

A[k] = 0 Y[k] = 0

C[k] = 0 Y[k] = 0

(A[k] =1 & C[k] = 1) Y[k] = 1

D = A + B E = B * C (macro) 0 A,B,C,D 255

0 E 65535D E s = 1

D E s = 0

s = 1 Z = Xs = 0 Z = Y[k]

<

* ZX

Y[..]

< s+

A

BD

* C

E

A[..]C[..]

1

0

1

0

+

04/19/23 DATE-2001 24

Challenges

• Handling sequential designs, symbolic traces– Output relations for symbolic variables (data,

states, internal nodes) over k time frames

• Symbolic trace solver (deterministic SAT):– Creates symbolic variables over k time frames– Compute symbolic values for inputs in each time

frame

• How to model sequential traces ?– Traces can be very large, combinational SAT

cannot handle it efficiently

04/19/23 DATE-2001 25

Results - table

137187.242.511670471460.0468M13*13(sat)

>360059.14.430851127318.983673Mdpe(2)

>3600572.2775.229560122451.122933Mdpe(1)

>3600>3600>36002484491064230.081062Gcd40

>3600>3600>3600117785504510.03542Gcd20

>36006.731.2777887356831.342749Linear(2)

>36002.985.0136914168990.37950Linear(1)

923.814.3810.6872015307590.05469Quadratic

>3600>3600>360077361331190.96701Square(0)

>36001344>36007736133119>3600701Square(1)

>3600>3600132.1224720105902.34149M16*16(non)

>36002819.3722.35247201059044.09149M16*16(sat)

5201355.812.121670471460.6068M13*13(non)

CPU time

GRASP CPU time

SATO CPU time

# clauses# literalsCPU time

# constr

BSATCNF-SATLPSAT

Testcase