CLIC RF Breakdown Meeting 1

MARX GENERATOR FOR THE NEW HRR PULSE POWER SUPPLY

M.J. Barnes and L. Redondo (Lisbon Superior Engineering Institute, Portugal)

13/05/2014

CLIC RF Breakdown Meeting 2

Some highlights:• PhD in Electric and Computing Engineering, from the Technical University of Lisbon,

Portugal;• Master degree in Nuclear Physics, Faculty of Sciences from the University of Lisbon;• Coordinator Professor, Lisbon Engineering Superior Institute; • Currently supervising 4 PhD students and 6 Masters students;• Elected member of the IEEE Nuclear and Plasma Sciences Society NPSS, Standing

Technical Committee for Pulsed Power Science and Technology, PPS&T, from 2011 to 2016;

• Five Technology and Science Portuguese Foundation grants, totalling €157k (Sept. 2008 till March 2014): main goal of this project was to develop a solid state ‐modulator with energy recovery for the CERN ISOLDE facility;

• Luis Redondo, Fernando A. Silva, in Muhammad Rashid et al, editors: Power Electronics Handbook 3ed, 2010, Butterworth Hinemann Publishing, Elsevier, ISBN # ‐9780123820365, chapter 26, pp 669 710;‐

• Considerable experience/expertise in Power Electronics and Marx Generators;• Co founder, in 30 November 2011, of the company Energy Pulse Systems, ‐

www.energypulsesystems.com, which develops, assembles and sells solid state ‐modulators for various (normally industrial) applications.

Luís Redondo (lmredondo@deea.isel.ipl.pt)

13/05/2014

Present HRR System

Reliability issues: occasional failure of Behlke switch. Probably due to turning off high current following a BD [trigger to switch-on is increased in duration for 3 µs from the instant of a BD – but a turn-off command can have been sent ≤200 ns before the BD …..].

Limitations – no active pull down at present (23 µs fall time-constant 250 ns to 99%: 0.9930=0.74); system could be modified to include active pull-down, but same reliability issues – so better to explore other possibilities (e.g. Marx Generator)

12kV

Charging Resistor 4k7 W

Matching resistor

50W

Diode

PFL:Td=2000ns

Z0=50W

Fast Switch:Behlke:

HTS-181-25-B

.

Coax Cable:Z0=50W

Matching Resistor

50W

d.c. spark system

Sample

tipBleed resistor80kW

Supply Section Pulse Generator Section

CT: Bergoz:CT-D0.5-B

Filter capacitor

4.7nF

Sample voltage without BD (right) and measured current following BD at 12 kV (left)

The measured voltage rise-time is less than 55 ns (10% - 90%) and the voltage reduces below 1% of the applied voltage within 100 µs .

The measured current has a 2 µs "flat top" of ~120A and a rise time of 14 ns (10% - 90%). The estimated inductance, based on the 14 ns rise-time, is approximately 320 nH.

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CLIC RF Breakdown Meeting 4

Principle of Marx Generator (1)A Marx generator is an electrical circuit first described by Erwin Otto Marx in 1924. Its purpose is to generate a high-voltage pulse from a low-voltage DC supply.

The circuit generates a high-voltage pulse by charging a number of capacitors in parallel, then subsequently connecting them in series. This is illustrated below for a 5 stage Marx.1a) All the odd numbered MOSFETs/IGBTs (i.e. M1, M3, M5, …) are off.1b) The capacitors (C1, C2 , … C5) are charged in parallel, from Vdc, by turning on all the even numbered MOSFETs/IGBTs (i.e. M2, M4, M6, …) [Vmarx ≈ 0 V]:

Vdc

D2

C1 VMarxC2

D1

M1 M3

M2 M4

D3

C3

M5

M6

D4

C4

M7

M8

D5

C5

M9

M10

Out+

gate1

gate2

+

-

13/05/2014

Stored energy: 21

2 n dcnC V

CLIC RF Breakdown Meeting 5

Principle of Marx Generator (2)The circuit generates a high-voltage pulse by charging a number of capacitors in parallel, then subsequently connecting them in series. This is illustrated below for a 5 stage Marx.2a) Capacitors C1, C2 , … C5 have been charged to Vdc in step (1b). All the even numbered MOSFETs/IGBTs (i.e. M2, M4, M6, …) are then turned off.2b) All the odd numbered MOSFETs/IGBTs (i.e. M1, M3, M5, …) are then turned on, to connect the capacitors in series. VMARX ≈ 5Vdc

Vdc

D2

C1 VMarxC2

D1

M1 M3

M2 M4

D3

C3

M5

M6

D4

C4

M7

M8

D5

C5

M9

M10

Out+

gate1

gate2

+

-

13/05/2014

Load voltage: Marx dcV nV

Example of Each StageThe following circuit has been implemented, by Luis Redondo, using MOSFETs (in each charge stage [M2] and pulse stage [M1] two parallel MOSFETs are used).

Vcc bank capacitor of IXRFD630:- 2 tantalum capacitors of 4.7uF, MULTICOMP, CB1H475M2DCB;- 2 ceramic capacitors of 0.47uF, KEMET, C322C474M5U5TA;- 2 ceramic capacitors of 0.1uF, AVX, AR205F104K4R*;- 2 ceramic capacitors of 0.01uF, AVX, AR205F103K4R*;- 2 ceramic capacitors of 0.001uF, AVX, AR205F102K4R*.

Other capacitors in circuit:- 10uF tantalum capacitors , AVX, TAP106M035CCS;- 100pF ceramic capacitors , AVX, AR211A101K4R;- 470pF ceramic capacitors , AVX,12067A471JAT2A.

All capacitors with the same capacitance have a same reference.

D - Power diodes of STMicroelectronics – STTH1512G-TRDr - ultra-fast diodes of Vishay – BYG22D-E3/TR

Optic fibre 1HFBR-2521Z

7805+18 V +5 V

IXRFD6301

10uF 330nF 330nF

0.1uF

DE475-102N21A

DE475-102N21A

Optic fibre 2HFBR-2521Z

7805+15 V +5 V

IXRFD6302

330nF 330nF

0.1uF

DE475-102N21A

DE475-102N21A

220nF

R1010uF 10uF

1MΩ

TC1410

TC1410

High frequency inverter50 kHz

D

D

D

4:20

MC7805CDTGON Semiconductor

1 IN

GND

2

OUT 3

MC7815CDTGON Semiconductor

1 IN

GND

2

OUT 3

AVAGOTechnologies

1

2

3

4

DATA

DATA

+5V

GND

AVAGOTechnologies

1

2

34

DATA

DATA

+5V

GND

Dr

Dr

Dr

Dr+

+ + +

+ + +

+ + +

+ + +

1

2

3

4

8

7

6

5GND GND

NC

IN

VDD VDD

OUT

OUT

Microchip

1

2

3

4

8

7

6

5GND GND

NC

IN

VDD VDD

OUT

OUT

Microchip

VCC

VCC

IN

GND

GND

OUT

+ +

GND

GND

GND

GND

Gate Drain

GND

GND

GND

GND

Gate Drain

GND

GND

GND

GND

Gate Drain

GND

GND

GND

GND

Gate Drain

VCC

VCC

IN

GND

GND

OUT

AK

A

K

A

K

A

K

220nF 220nF

94

0C1

2P2

2K

-FC

DE

Co

rne

ll D

ubi

lier

GND1GND1

GND1

GND1

GND1

GND1

GND2

GND2

GND2

GND2

GND2

GND2

GND2

78151

IN

GND

2

OUT3

MC7805CDTGON Semiconductor

R220

Vcc=+15 V

Z15 V

In-

In+

Out+

Out-

gate1

gate2

M1

M2

D1

Note: modular design so that, in case of failure of a component, a card can be replaced.

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Commercial unit: EPULSUS-PM1-10Typical 10 kV / 62.5 A pulse waveform on a 160 Ω resistor: 26 μs width pulse and 100 Hz repetition rate.

Commercial unit characteristics:• Standard galvanised steel enclosure, 800x600x400 mm, 80 kg;• Mains input 220-240 V cable supplied;• Output cable;• Output Ethernet plug for optional control available;• BNC for monitoring the output voltage pulse available;• Touch screen for programming output voltage, frequency and pulse width, and for monitoring ;• Safety interlocks and reset condition after power on• Overcurrent protection;• Series 2.2 Ω resistance for increasing overall output stability and short-circuit protection.

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CLIC RF Breakdown Meeting 8

Example Waveforms. Waveforms from: 1 kHz, IGBT based, modulator into a 250 pF load, using a 10 kV/180 A (3.5 kW, single phase) commercial modulator at Energy Pulse Systems.

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CLIC RF Breakdown Meeting 9

Estimate….The estimated budget for a modulator, for the CLIC RF tests, is between 5000 € and 6000 €: to be confirmed when specifications are agreed upon.

For this project the modulators should be supplied via Energy Pulse Systems, as materials and human capability are not available in the institute (only available for small prototypes and concept validation).

With the specifications agreed and material ordered, in principle a (CE marked) modulator would be delivered in 1-2 months.

Suggestion: Mike (et al.?) visit Luis, in Lisbon, for 1 day.

13/05/2014

CLIC RF Breakdown Meeting 10

Questions….

13/05/2014

a) Maximum capacitance to be driven ?b) 10 kV flattop ?c) In the case of no BD, 1 kHz rep-rate,?d) Importance of rise-fall time (given E30) ? [with such a strong dependency on field

strength (e.g. 0.9930 = 0.74, 0.9830 = 0.55 and 0.930=0.04), the rise and fall times might not have a significant effect…. [But, given the same strong dependency upon E, it is important to avoid overshoot (e.g. 1.0530=4.3 and 1.0130=1.35)]];

e) Acceptable voltage droop during flattop (capacitive load) ?;f) Required “squareness” of current pulse following a breakdown ?g) Requirements for pulse flattop duration and flatness (e.g. dark current

measurements?);h) Others ??

For RF BD group:

From RF BD group…