Materials and noncoplanar mesh designs forintegrated circuits with linear elastic responses toextreme mechanical deformationsDae-Hyeong Kima, Jizhou Songb, Won Mook Choic, Hoon-Sik Kima, Rak-Hwan Kima, Zhuangjian Liud,Yonggang Y. Huange,1, Keh-Chih Hwangf, Yong-wei Zhangd,g, and John A. Rogersa,h,1

aDepartments of Materials Science and Engineering, Beckman Institute, and Frederick Seitz Materials Research Laboratory, and hDepartments of Chemistryand Electrical and Computer Engineering, University of Illinois at Urbana–Champaign, 1304 West Green Street, Urbana, IL 61801; bDepartment ofMechanical and Aerospace Engineering, University of Miami, Coral Gables, FL 33146; cSamsung Advanced Institute of Technology, Mt. 14-1 Nongseo-Dong,Giheung-Gu, Yongin-Si, Gyeonggi-Do 449-712, Republic of Korea; dInstitute of High Performance Computing, 1 Fusionopolis Way, #16-16 Connexis,Singapore 138632; eDepartments of Civil and Environmental Engineering and Mechanical Engineering, Northwestern University, Evanston, IL 60208;fDepartment of Engineering Mechanics, Tsinghua University, Beijing 100084, China; and gDepartment of Materials Science and Engineering, NationalUniversity of Singapore, Singapore 119260

Edited by George M. Whitesides, Harvard University, Cambridge, MA, and approved September 30, 2008 (received for review August 1, 2008)

Electronic systems that offer elastic mechanical responses to high-strain deformations are of growing interest because of their ability toenable new biomedical devices and other applications whose require-ments are impossible to satisfy with conventional wafer-based tech-nologies or even with those that offer simple bendability. This articleintroduces materials and mechanical design strategies for classes ofelectronic circuits that offer extremely high stretchability, enablingthem to accommodate even demanding configurations such as cork-screw twists with tight pitch (e.g., 90° in �1 cm) and linear stretchingto ‘‘rubber-band’’ levels of strain (e.g., up to �140%). The use ofsingle crystalline silicon nanomaterials for the semiconductor pro-vides performance in stretchable complementary metal-oxide-semi-conductor (CMOS) integrated circuits approaching that of conven-tional devices with comparable feature sizes formed on siliconwafers. Comprehensive theoretical studies of the mechanics revealthe way in which the structural designs enable these extreme me-chanical properties without fracturing the intrinsically brittle activematerials or even inducing significant changes in their electricalproperties. The results, as demonstrated through electrical measure-ments of arrays of transistors, CMOS inverters, ring oscillators, anddifferential amplifiers, suggest a valuable route to high-performancestretchable electronics.

flexible electronics � stretchable electronics �semiconductor nanomaterials � plastic electronics � buckling mechanics

Increasingly important classes of application exist for electronicsystems that cannot be formed in the usual way, on semicon-

ductor wafers. The most prominent example is in large-areaelectronics (e.g., back planes for liquid crystal displays), whereoverall system size rather than operating speed or integrationdensity, is the most important metric. Similar systems that useflexible substrates are presently the subject of widespread re-search and commercialization efforts because of advantages thatthey offer in durability, weight, and ease of transport/use (1, 2).Stretchable electronics represents a fundamentally different andeven more challenging technology, of interest for its uniqueability to flex and conform to complex curvilinear surfaces suchas those of the human body. Several promising approaches exist,ranging from the use of stretchable interconnects between rigidamorphous silicon devices (3) to ‘‘wavy’’ layouts in single-crystalline silicon CMOS circuits (4), both on elastomeric sub-strates, to net-shaped structures in organic electronics on plasticsheets (5). None offers, however, the combination of electricalperformance (high electron and hole mobility), scalability (withrelatively modest modifications to conventional microelectronictechnologies), integrated circuit applicability in complementarydesigns and mechanical properties required of some of the mostdemanding, and most interesting, systems. Here, we introduce

design concepts for stretchable electronics that exploit semicon-ductor nanomaterials (i.e., silicon ribbons) in ultrathin, mechan-ically neutral circuit layouts integrated on elastomeric substratesin noncoplanar mesh designs, with certain features inspired bymethods recently reported for transforming planar optoelec-tronics into hemispherical shapes for electronic-eye cameras (6).The noncoplanar structure, combined with deformable serpen-tine bridge designs, can accomplish much higher stretchability(i.e., up to �140%) compared with previous reports of relatedsystems (3–6). This increased stretchability enables much widerapplication possibilities, including electronic circuits on complexsurfaces with high curvature. As demonstrated in diverse circuitexamples, these ideas accomplish a form of stretchable electron-ics that uniquely offers both high performance and an ability toaccommodate nearly any type of mechanical deformation to highlevels of strain. Experimental and theoretical studies of theelectrical and mechanical responses illuminate the key materialsand physics aspects associated with this type of technology.

Results and DiscussionFig. 1A schematically illustrates steps for fabricating a repre-sentative system that consists of a square array of CMOSinverters. The overall process can be divided into 2 parts. Thefirst defines CMOS circuits on ultrathin plastic substrates byusing printing methods and single-crystalline silicon ribbons,according to procedures described previously (7). For all of theresults reported here, the ribbons had thicknesses of 260 nm and290 nm for p-channel and n-channel metal oxide semiconductorfield effect transistors (MOSFETs), respectively. The gate di-electric consisted of a 50-nm-thick layer of SiO2 deposited byplasma-enhanced chemical-vapor deposition. The same type offilm formed an interlayer dielectric for metal (Ti:5 nm/Au:150nm) interconnect lines and electrodes. The plastic substrateconsisted of a thin layer (1.2 �m) of polyimide (PI) supported bya carrier wafer (test grade silicon) coated with a film (100 nm)of poly(methylmethacrylate) (PMMA) (8). A thin top coating of

Author contributions: D.-H.K., J.S., W.M.C., Y.Y.H., and J.A.R. designed research; D.-H.K.,J.S., H.-S.K., R.-H.K., Z.L., Y.Y.H., and J.A.R. performed research; D.-H.K., J.S., Z.L., Y.Y.H.,K.-C.H., Y.-w.Z., and J.A.R. analyzed data; and D.-H.K., J.S., Z.L., Y.Y.H., and J.A.R. wrote thepaper.

The authors declare no conflict of interest.

This article is a PNAS Direct Submission.

Freely available online through the PNAS open access option.

1To whom correspondence may be addressed. E-mail: jrogers@uiuc.edu ory-huang@northwestern.edu.

This article contains supporting information online at www.pnas.org/cgi/content/full/0807476105/DCSupplemental.

© 2008 by The National Academy of Sciences of the USA

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PI (1.2 �m), with etched (reactive ion etching; RIE) holes forelectrical access, protected the circuits and placed the mostfragile components near the neutral mechanical plane (4).Individual devices fabricated in this manner exhibited devicemobilities of �130 and �370 cm2/Vs for p-channel andn-channel MOSFETs, respectively, with on/off ratios �106 andoperating voltages in the range of �5 V. These fabricationprocedures are useful but have some disadvantages. For exam-ple, conventional self-aligned processes for defining the channeland gate cannot be implemented easily. The polymer materialsrestrict the processing temperatures and prevent, as an example,the use of dry oxide for the gate dielectric. A modified proce-dure, in which most or all of the device or circuit block processingoccurs on the mother silicon wafer, before transfer to thepolymer substrate, can avoid these limitations. Exploring thispossibility represents a focus of current work.

The second part of the fabrication process involves structuringthe circuits into noncoplanar layouts intimately integrated withelastomeric substrates to yield systems with reversible, elasticresponses to extreme mechanical deformations. In the first steptoward achieving this outcome, certain regions of the PI/PMMAbetween the electronic components of the system were removedby RIE through a patterned layer of photoresist. The result was

a segmented mesh with active device islands connected electri-cally and/or mechanically by thin polymer bridges with orwithout metal-interconnect lines, respectively. Immersion inacetone washed away the PMMA layer to release the systemfrom the carrier. Lifting off the patterned circuit sheet onto aslab of poly(dimethylsiloxane) (PDMS) exposed its underside fordeposition of a thin layer of Cr/SiO2 (3 nm/30 nm) at thelocations of the islands by electron beam evaporation through analigned shadow mask. Delivering the circuit to a biaxially pre-strained substrate of PDMS with its surface activated by expo-sure to ozone led to the formation of strong mechanical bondsat the positions of the islands. The interface chemistry respon-sible for this bonding involves condensation reactions betweenhydroxyl groups on the SiO2 and PDMS (4) to formOO–Si–OOlinkages, similar to that described recently for controlled buck-ling in collections of semiconductor ribbons (8). Releasing theprestrain resulted in compressive forces that caused the con-necting bridges to lift vertically off the PDMS, thereby formingarc-shaped structures. We refer to this layout as a noncoplanarmesh design. The localization of this out-of-plane mechanicalresponse to the bridges results partly from their poor adhesionto the PDMS and partly from their narrow geometries and lowbending stiffnesses compared with the device islands. (This latteraspect allows similar structures to be formed even without thepatterned SiO2 adhesion layer.) The bottom frames of Fig. 1 Aand B show schematic illustrations and scanning electron mi-croscope (SEM) images. In this format, the system can bestretched or compressed to high levels of strain (up to 100%, andin some cases higher, as described subsequently), in any directionor combination of directions both in and out of the plane of thecircuit, as might be required to allow complex twisting, shearing,and other classes of deformation. Fig. 1B Upper and Fig. 1CUpper show images that illustrate some of these capabilities incircuits that use a PDMS substrate with thickness �1 mm and aprestrain of �17%, as defined by the change in separationbetween inner edges of adjacent device islands. For practicalapplications, such systems are coated with a protective layer ofPDMS in a way that does not alter significantly the mechanicalproperties, as argued subsequently. For ease of imaging andelectrical probing, the circuits described in the following are allunencapsulated.

The physics of deformation associated with applying tensile orcompressive forces oriented along the directions of the bridgesis similar to that involved in relaxing the prestrain in thecircuit-fabrication process of Fig. 1. The bridges move up ordown (corresponding to decreases or increases in end-to-endlengths, respectively) as the system is compressed or stretched,respectively. Another, less obvious, feature is that the thin,narrow construction of these bridges also enables them to twistand shear in ways that can accommodate more complex distri-butions of strain. Fig. 1C shows some representative cases,described in more detail subsequently, for different regions of asystem under a complex, twisting deformation. The basic me-chanics is similar to that of systems that are encapsulated byPDMS. For example, calculation indicates that the maximumstrain that can be applied to the system, as shown in Fig. 1BLower, reduces by only �2.5% because of the addition of a�1-mm-thick overcoat of PDMS [supporting information (SI)Fig. S1].

These designs lead to electronic properties that are largelyindependent of strain, even in extreme configurations such asthose illustrated in Fig. 1 B and C. This feature can be demon-strated explicitly through device and circuit measurements onsystems for various, well-defined mechanical deformations in-duced with custom assemblies of mechanical stages. The simplestcase corresponds to in-plane stretching in directions parallel tothe bridges. Testing of this deformation mode was performed byusing 3-stage ring oscillators, in which each island supports an n

Fig. 1. Fabrication of noncoplanar stretchable electronics and responses todeformation. (A) Schematic overview of the fabrication process for represen-tative circuits that accomplish high levels of stretchability through the use ofnoncoplanar mesh designs integrated with elastomeric substrates [for thecase shown here, PDMS]. (B) SEM images of an array of CMOS inverters thatresult from this process, in an undeformed state (Lower; �20% prestrain) andin a corresponding configuration that results from a complex twisting motion(Upper). (C) Optical image of a freely deformed stretchable array of CMOSinverters, highlighting 3 different classes of deformation: diagonal stretching,twisting, and bending. The Insets provide SEM images for each case (colorizedfor ease of viewing).

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channel and a p channel MOSFET (channel widths of 100 �mand 300 �m, respectively; channel lengths of 13 �m). Metalelectrodes on the bridges form the required interconnects. Fig.2A shows optical micrographs of a typical response, for a systemfabricated with a prestrain of �17%. With stretching in thex direction, the bridges oriented along x progressively flatten,whereas those along y rise up slightly, because the Poisson effect,and vice versa. A critical aspect of the strategy outlined in Fig.1 is the ability of the noncoplanar structures to absorb nearly allof the strains associated with the fabrication process and withdeformations that can occur during use.

This mechanical isolation can be seen clearly through finiteelement modeling (FEM) analysis of the tensile strain distribu-tion at the top and bottom surface and midpoint through thethickness of the metal layer in the circuit (Fig. 2B). For themiddle layer, all areas experience almost zero strain because ofthe neutral mechanical plane design. Negligible strains through-out the thickness and in all regions of the islands derive from

strain relaxation provided by the bridges/interconnects in thenoncoplanar mesh layout. For this example, the change inseparation of islands (i.e., prestrain) is �17%, which correspondsto the system-level strain of �11% as defined by the change ofthe distances from the outer edges of adjacent device islands.Mechanics analysis based on energy minimization (Figs. S2 andS3) gives an amplitude of 116.3 �m for the 445-�m-long bridge,which agrees well with the experimental value of �115 �m. Themaximum tensile strains calculated for the metal layer in thebridges and islands are �0.11% and �0.01%, respectively,whereas that in the Si layer of the islands is �0.01%. These valuesare all much smaller than the fracture strains (�1%) in thesematerials. This neutral mechanical plane layout and noncoplanarmesh design also reduce the strain at the interface betweensilicon and gate oxide to less than �0.05% for applied strains of�20% (SI Text). The corresponding changes in the electron andhole mobilities are expected be �5%, based on separate studiesof the influence of strain on electronic properties of silicon (9).The finite element analysis results of Fig. 2B are consistent withthis analysis. For applied strains between �40% (i.e., compres-sive) and 17% (tensile), which corresponds to a strain range of57%, the mechanical advantage provided by the noncoplanarmesh layout, as defined by the ratio of the system-level strain tothe peak material strain, is �180. Measurements on theseoscillators show well-behaved responses at these strain condi-tions and others in between. The observed frequencies (�2MHz, Fig. 2C) and other properties of the circuits and individualdevices reported here and elsewhere in this article are compa-rable with those measured in the initial, planar configurationsbefore removal from the carrier substrate (Fig. 1 A).

A somewhat more complex deformation mode that involvesin-plane stretching along an axis not aligned to the bridgesillustrates additional capabilities of the noncoplanar design. Suchapplied strains cause the bridges not only to flatten, as for thecase of Fig. 2 A–C, but also to rotate and twist out of the plane(Fig. 2D). This deformation is referred to as lateral buckling (11)and can be characterized by a Bessel function (for tilting) and asinusoidal function (for flattening) to accommodate off-axisstretching (SI Text). Because this type of stretching involvessignificant shear, the principal strain, which combines the tensileand shear strains (see SI Text), replaces the tensile strain todescribe the extent of deformation. For off-axis stretching thatresults in 14% stretching in the bridge and 7.5% shear, minimi-zation of energy (including the twisting energy) gives a maximumprincipal strain of 2% and 0.8% in the metal layer of the bridgesand islands, respectively, and 0.6% in the Si layer of islands. FEMsimulation of these systems, as illustrated in Fig. 2E, furtherquantifies the underlying mechanics. The ability of the bridges toabsorb nearly all of these off-axis strains enables excellent deviceand circuit performance, with little dependence on strain. Fig.2F shows, as an example, transfer characteristics and gains (upto �100) measured on CMOS inverters formed by electricalinterconnects on bridges between adjacent islands that eachsupport one p channel and one n channel MOSFET. Also,electrical simulation of the inverters, using individual transistordata, agrees with the measurement results (see Fig. S4). Thesetransistors have layouts identical to those in the ring oscillatorsof Fig. 2 A. Although the deformation modes of Fig. 2 are alsopossible with recently reported wavy designs (4), the noncopla-nar mesh layouts increase the levels of strain that can beaccommodated by �5 times, and they substantially reduce thesensitivity of electrical response to strain (i.e., to values close tomeasurement repeatability limits for the cases of Fig. 2). In allcases, the deterministic, linear elastic nature of the underlyingmechanics, which arises from the small strains in the electronicmaterials and the linear response of the PDMS (up to strains of110%) (9), leads to little change in properties even on extensivemechanical cycling, as demonstrated subsequently (see Fig. 5E).

Fig. 2. Mechanical and electrical responses of noncoplanar stretchableelectronics to in-plane strains. (A) Optical images of stretchable, 3-stage CMOSring oscillators with noncoplanar mesh designs, for stretching along thebridges (x and y). (B) FEM modeling of the strain distributions at the topsurface of the circuit (Top) and at the midpoint of the metal layer (Mid.) andbottom surface (Bot.). (C) Electrical characteristics of the oscillators as repre-sented in the time and frequency (Inset) domains in the different strainconfigurations illustrated in A. Here, 0s and 0e refer to 0% strains at the startand end of the testing, respectively; 17x and 17y refer to 17% tensile strainsalong the x and y directions indicated in A, respectively. (D) Optical images ofstretchable CMOS inverters with noncoplanar mesh designs, for stretching at45° to the directions of the bridges (x and y). (E) FEM simulations of thesemotions. (F) Transfer characteristics of the inverters (output voltage, Vout, andgain as a function of input voltage, Vin). The notations 18x and 18y refer to18% tensile strains along the x and y directions indicated in D, respectively.

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An extreme type of deformation, which is partly involved inthe configuration shown in Fig. 1, involves twisting into cork-screw shapes with tight pitch. Under such applied strain, thebridges deform due mainly to in-plane shear with a magnitudeon the order of the ratio of (bridge or island) thickness to lengthtimes the rotation angle (see SI Text for details). Such twistingdeformation is different from off-axis stretching because it doesnot involve buckling and is therefore amenable to linear analysis.For a 90° rotation over a distance corresponding to a pair ofbridges and an island, the maximum shear strains in the metaland Si layers are 0.08% and 0.02%, respectively, for the 445-�m-long bridge and 260-�m-long island. Fig. 3A Left shows animage of a circuit on thin PDMS, in a twisted geometry; Fig. 3ARight shows a magnified view of a CMOS inverter in this system.As for the previously described cases, FEM simulation (Fig. 3B)supports the experimental observations and reveals the level ofprincipal strain to be 0.3% in the metal layer of the bridge andthe island. A SEM image of an interconnected array of invertersfor a ring oscillator (Fig. 3C) shows the shape of the twistedbridges. Electrical measurements indicate stable electrical per-formance before and after twisting, both for inverters (Fig. 3DUpper) and ring oscillators (Fig. 3D Lower). The electricalproperties, in all cases, are comparable with those describedpreviously. In other words, the systems are, to within experi-

mental uncertainty, agnostic to deformation mode for all con-figurations studied here.

Figs. 1–3 illustrate examples for circuits, such as inverters andring oscillators, that are straightforward to implement in repet-itive, arrayed layouts. More complex, irregular designs might berequired in many cases of practical importance; these can also beimplemented in noncoplanar mesh designs. We demonstratedthis concept for a differential amplifier (10), in which we dividedthe circuit into 4 sections, each of which forms an islandconnected by metal lines on pop-up bridges. The red dottedboxes in Fig. 4A Left highlight these 4 regions; an angled viewSEM image in the Inset shows the structure. The bridges providea mechanics that is conceptually similar to those in the regulararray layouts, even though the details are somewhat different. Asa result, this irregular circuit can be stretched or twisted revers-ibly, as shown in Fig. 4 B and C, respectively. Fig. 4D showsmagnified images of stretching in the x and y directions. Elec-trical measurements verify that the amplifiers work well underthese deformations. The gains for 0%, 17% x stretching, 17% ystretching, and twisting to a full 180° rotation of a PDMSsubstrate with a length of �2 cm were 1.15, 1.12, 1.15, and 1.09(design value �1.2), respectively. Such systems can also be freelydeformed, as shown in Fig. 4F.

Although the materials and mechanical designs describedpreviously can accommodate larger strains and in more diverse

Fig. 3. Mechanical and electrical responses of noncoplanar stretchableelectronics to twisting deformations. (A) Optical images of an array of stretch-able CMOS inverters in a twisted configuration (Left) and magnified view ofa single inverter, illustrating the nature of the deformation (Right). (B) FEMsimulation of the mechanics of twisting on the bridge structures. (C) SEMimage of an array of stretchable, 3-stage CMOS ring oscillators in a twistedconfiguration. (D) Electrical characteristics of the inverters (Upper; gain andoutput voltage, Vout, as a function of input voltage, Vin) and oscillators (Lower;output voltage, Vout, as a function of time) in planar and twisted states.

Fig. 4. Noncoplanar stretchable electronics with asymmetric layouts. (A andB) Optical images of an array of stretchable differential amplifiers in twisted(A) and planar stretched (B) layouts. (C) Tilted view SEM of a representativeamplifier, showing the noncoplanar layout. (D and E) Optical images understretching along the x and y directions (D) and corresponding electrical outputas a function of time for a sinusoidal input (E). (F) Optical image of a device ina complex deformation mode. Here, 17x and 17y refer to 17% tensile strainsalong the x and y directions indicated in D, respectively.

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configurations compared with previous demonstrations, theymight not satisfy requirements for certain advanced deviceconcepts, such as electronics for ‘‘smart’’ surgical gloves orhemispherical focal plane arrays with large, double curvature,where truly ‘‘rubber band-like’’ stretchability (e.g., to �50%strain) is needed. A simple method to increase the stretchability,without changing the materials or layouts in the stacks that makeup the circuits, involves increasing the separations between thedevice islands and decreasing the thicknesses of the bridges. Thequantitative effects of these parameters on the peak materialstrain can be represented by a simple analytical relation, pre-sented in the SI, for the approximate case that the islands arestrictly rigid and remain planar (Fig. S5). To expand the de-formability even further, without increasing the sparseness of thedistribution of islands, serpentine bridges can be used. Fig. 5Ashows SEM images of such a design after executing the fabri-cation procedures of Fig. 1. When external strain is applied along

the x or y directions, these noncoplanar serpentine bridgeseffectively compensate the applied strain not only throughchanges in height but also by changes in geometry of theserpentine shape. Fig. 5B shows images of the response of arepresentative device to on-axis stretching strains up to 70%, fora system built with 35% prestrain, in which deformations of theserpentine bridges exhibit changes in configurations that mightbe expected intuitively. Remarkably, finite-element modelingreveals that, even to stretching strains of 70%, the peak strainsin the metal layer in the bridges and islands are 0.2% and 0.5%,respectively, and the strain in silicon is 0.15% as indicated in Fig.5C. (The strains reach �3% in certain locations of the PI.) Toexplore the limits, we used thin PDMS substrates (0.2 mm) tofacilitate stretching to even larger strains. Fig. 5D shows a casecorresponding to �90% prestrain, which allows stretching to�140% strain and corresponds to �100% system strain. Thelarge prestrain improves the stretchability, and it also increasesthe active-area density in the circuit by decreasing the lengths ofthe interconnecting bridges. For example, in the designs illus-trated here, the active-area density for a prestrain of �35% (Fig.5B, �70% stretchability) and �90% (Fig. 5D, �140% stretch-ability) is �19% and �34%, respectively. The essential strategyof bridge-type interconnects, however, requires a tradeoff be-tween degree of stretchability and area consumed by the inter-connects. Consistent with the small strains in the active materialsrevealed by FEM, the electrical properties approach those of thecorresponding unstrained, planar systems; the operation is alsostable over many cycles (up to 1,000, evaluated here) of stretch-ing, as indicated in Fig. 5E.

Finally, the practical application of pop-up circuits requires anadditional encapsulation layer on top of devices to protect activeregions from unwanted damage. To this end, we coated thecircuits with a liquid prepolymer PDMS and cured it after allbridges and islands were embedded. A dual neutral mechanicalplane design can be implemented by controlling the top andbottom PDMS thickness to provide additional mechanicalstrength for deformation (4). This encapsulation has relativelyminor effects on the essential mechanics, primarily throughslight increases in the strain in the bridges due to restricteddeformation inside the PDMS. Pop-up inverters with straight(Movie S1 and Movie S2) and S-shaped (Movie S3 and MovieS4) bridges show these behaviors (see also SI Text).

ConclusionsCollectively, the results presented here provide design rules forcircuits that offer both excellent electrical performance andcapacities to be elastically deformed in diverse configurations tohigh levels of strain. The same ideas can, in many cases, be usedto advantage in other conventionally rigid, planar technologiessuch as photovoltaics, microfluidics, sensor networks, photonics,and others. These and related types of systems might enablemany important new applications that cannot be addressed withother approaches. Exploring these possibilities represents afruitful area for future work.

Materials and MethodsPreparation of Doped Silicon Ribbons. Preparation of doped silicon ribbonsstarts with the doping of the top silicon on silicon-on-insulator (SOI) wafers:nMOS source/drain doping with p-type SOI wafers (SOITEC) and pMOS source/drain doping with n-type SOI wafers (SOITEC). This process uses plasma-enhanced chemical-vapor deposition (PECVD) of silicon dioxide (SiO2) for adiffusion mask, photolithography, and RIE with CF4/O2 gas for patterning, spincoating, and high-temperature diffusion of boron spin-on dopant (B153;Filmtronics) at 1,000 °C to �1,050 °C for p-type and phosphorous spin-ondopant (P509; Filmtronics) at 950 °C to �1,000 °C for n-type. The typicalsurface doping concentrations using phosphorous and boron spin-on dopantsare �2 � 1020 cm�3 and �1020 cm�3, respectively (13, 14). After doping,ribbons are defined by photolithography and RIE; they are released from themother wafer by removing the buried oxide layer of the SOI wafers. These

Fig. 5. Extreme stretchability in noncoplanar electronics with serpentinebridge designs. (A) SEM image of an array of stretchable CMOS inverters withnoncoplanar bridges that have serpentine layouts (Left) and magnified view(Right). (B) Optical images of stretching tests in the x and y directions. (C) FEMsimulation before (35% prestrain) and after (70% applied strain) stretching.(D) Arrays of inverters on a thin PDMS substrate (0.2 mm) (Left) and images inunstretched (middle; 90% prestrain) and stretched (Right; 140% tensile strain)states. (E) Transfer characteristics and gain for a representative inverter understretching (Left) and plot of gain and voltage at maximum gain (VM) for asimilar device as a function of stretching cycles (Right).

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doped ribbons are picked up by PDMS and transfer-printed to a carrier waferfor circuit integration.

Fabrication of Stretchable Circuits. Doped n-type and p-type nanoribbons aresequentially transfer printed to a carrier wafer coated with thin layers ofPMMA (�100 nm) as a sacrificial layer and PI (�1.2 �m) as an ultrathinsubstrate. After transfer printing, 50 nm of PECVD SiO2 is deposited for thegate dielectric. Contact windows for source and drain are etched with buff-ered oxide etchant, 150-nm metal electrodes are evaporated and patterned,and another PI layer is spin-cast for passivation and control of neutral me-chanical plane location. After circuit fabrication, oxygen RIE defines the meshformat. Dissolution of the PMMA layer with acetone releases the circuits fromthe carrier wafer. Such circuits are transferred to mechanically prestrainedPDMS for the formation of noncoplanar, pop-up layouts. To help define thelocations of the pop-up regions, thin layers of Cr and SiO2 are selectivelydeposited on the bottoms of active islands by evaporation through a shadowmask to enhance the adhesion between these regions of the circuit and PDMS.

Stretching Tests and Electrical Measurements. Stretching tests are performedwith automated assemblies of translations stages, capable of applying tensileor compressive strains in x, y, or diagonal directions. For twisting, edges of thePDMS are mechanically clamped with a twist angle of 180°. Electrical mea-surement are performed with a probe station (5155C; Agilent), directly whileunder stretching or twisting deformations.

Analytical Calculations of the Noncoplanar Bridge Structures. The bridge ismodeled as a composite beam. Its out-of-plane displacement has a sinusoidalform, with the amplitude determined by energy minimization. The island ismodeled as a composite plate. Its out-of-plane displacement is expanded as a

Fourier series, with the coefficients determined by energy minimization. ThePDMS substrate is modeled as a semiinfinite solid subjected to a surfacedisplacement, which is the same as the out-of-pane displacement of islands.The total energy of the system consists of the membrane and bending energyin the bridges, membrane and bending energy in the islands, and strain energyin the substrate. Minimizing the total energy gives the displacements andstrain distributions in bridges and islands.

Finite Element Modeling. Three-dimensional finite element models of thesystems have been developed by using the commercial ABAQUS package.Eight-node, hexahedral brick elements with 4-node multilayer shell elementsare used for the substrate and the thin film, respectively. The multilayer shellis bonded to the substrate by sharing the nodes. Each layer of thin film ismodeled as a linear elastic material; the soft, elastomeric substrate is modeledas an incompressible hyperelastic material. We first determine the eigenvaluesand eigenmodes of the system. The eigenmodes are then used as initial smallgeometrical imperfections to trigger the buckling of the system. The imper-fections are always small enough to ensure that the solution is accurate. Thesimulations are performed in the same procedure as the key fabrication stepsof integrated circuits system. These simulations give an insight to the forma-tion of buckling patterns, the mechanics behavior of the thin film, and thenested hierarchy of the structure.

ACKNOWLEDGMENTS. We thank T. Banks for help in processing by use offacilities at the Frederick Seitz Materials Research Laboratory. This work isbased on work supported by the National Science Foundation under GrantECCS-0824129 and the U.S. Department of Energy, Division of MaterialsSciences Grant DE-FG02-07ER46471, through the Materials Research Labora-tory and Center for Microanalysis of Materials (DE-FG02-07ER46453) at theUniversity of Illinois at Urbana–Champaign.

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