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The George W. Woodruff School of Mechanical Engineering ME4447/6405 Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics Instructor: Professor Charles Ume LECTURE 7

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The George W. Woodruff School of Mechanical Engineering

ME4447/6405

Microprocessor Control of Manufacturing Systems and

Introduction to Mechatronics

Instructor: Professor Charles Ume

LECTURE 7

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

Reading Assignments

Reading assignments for this week and next week

Read Chapters 5-8 in Basic Microprocessors and the 6800, by Ron Bishop.

Chapter 5 Microcomputers-What Are They? Chapter 6 Programming Concepts Chapter 7 Addressing Modes Chapter 8 M6800 Software

There will be questions and answers the rest of this week and next week based on your reading assignment.

The George W. Woodruff School of Mechanical Engineering

  HC12S CPU can only understand instructions written in binary called Machine Language.

  Writing programs in Machine Language is extremely difficult

  Mnemonics are simple codes, usually alphabetic, that is representative of instruction it represents (example: LDAA [LoaD Accumulator A])

  A program written using Mnemonic Instructions is called Assembly Language program

  An Assembler can be used to translate Assembly Language program to Machine Language Program

Why use Assembly Language?

The George W. Woodruff School of Mechanical Engineering

 Address: Common term for memory location. Always written in hexadecimal. $4000 is the 4000th

16 Memory Location (Note: “$” signifies hexadecimal)

  Literal Value: A number used as data in program indicated by “#”. Can be represented in the following ways:

#$FF = hexadecimal number FF #%1011 = binary number 1011 (Note: “%” signifies binary) #123 = decimal number 123

 A Literal Value can be stored in an address Example: Literal Value #$FF is stored in address $4000

Example 2: Literal Value #$FE0A is stored in address $2000 (Note: #$FE is stored in address $2000 #$0A is stored in address $2001)

Assembly Language Notations

The George W. Woodruff School of Mechanical Engineering

 Directives: Instructions from the programmer to Assembler NOT to microcontroller

Example 1: ORG <address> Store translated machine language instructions in sequence starting at given address for any mnemonic instructions that follow

Example 2: END Stop translating mnemonics instructions until another ORG is encountered

(Note: More will be covered in later lectures)

Assembly Language Directives

The George W. Woodruff School of Mechanical Engineering

Assembly Language Format Le

ft m

argi

n of

ass

embl

y pr

ogra

m

A Tab (8 white spaces) or Label (Note: A Label is another Assembly Directive and will be covered in later lectures)

Assembly Directive Or Mnemonic Instruction

(Note: Last three options are called Operands)

Data that the Assembly Directive uses

Or Blank if Mnemonic Instruction does not need Data

Or Offset Address used to modify Program Counter by a Mnemonic Instruction

Or Data that Mnemonic Instruction uses

Or Address where the Data that Mnemonic Instruction will use is stored

The George W. Woodruff School of Mechanical Engineering

  In the previous slide, there were several options for the operand: •  Blank if Mnemonic Instruction does not need Data •  Offset Address used to modify Program Counter by a Mnemonic

Instruction •  Data that Mnemonic instruction uses •  Address were Data that Mnemonic instruction uses is stored

  Which option a programmer uses is defined by the following addressing modes:

Addressing Modes

• Direct • Indexed • Relative

• Inherent • Immediate • Extended • Indexed Indirect

(Note: All instructions are not capable of all addressing modes. Example: BLE [Branch if Less than or Equal to Zero] is only capable of Relative addressing mode)

The George W. Woodruff School of Mechanical Engineering

Example: Programming Reference Guide Page 6

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

Blank if Mnemonic Instruction does not need Data If Mnemonic Instruction does not need data then it uses Inherent Addressing Mode

Example: Write a program to clear accumulator A. Start programming at address $1000

Solution: ORG $1000 CLRA SWI END

CLRA [ CLeaR accumulator A] is an instruction using Inherent Addressing

(NOTE: SWI [SoftWare Interrupt] is a mnemonic instruction which tells the 9SC32 to store the content of cpu registers on the stack. Sets the I bit (the interrupt bit) on the CCR. Loads the program counter with the address stored in the SWI interrupt vector, and resume program execution at this location. If no address is stored in the SWI vector, the main program will stop execution at this point. Used in this course to return control to Mon12 Program)

The George W. Woodruff School of Mechanical Engineering

Offset Address used to modify Program Counter by a Mnemonic Instruction

If Mnemonic Instruction uses operand to modify Program counter then it uses Relative Addressing Mode

• Usually used in conjunction with Labels

(Note: will be explained further in later lectures)

The George W. Woodruff School of Mechanical Engineering

Data that Mnemonic instruction uses

The Mnemonic instruction is using Immediate Addressing mode if the operand is Data used by the instruction

Example: Write a program to load accumulator A with #$12. Start programming at address $1000

Solution: ORG $1000 LDAA #$12 SWI END

LDAA is an instruction using Immediate Addressing mode in this example

The George W. Woodruff School of Mechanical Engineering

Address were Data that Mnemonic instruction uses is stored

The following addressing modes apply if the operand is an Address containing Data used by Mnemonic instruction :

 Direct • Data is contained in Memory locations $00 to $FF • Address is given as a single byte address between $00 to $FF • Instructions using Direct addressing has fastest access to memory

Example: LDAA $00 Loads accumulator A with Data value stored at memory location $00

 Extended • Data is contained in Memory locations $0100 to $FFFF • Address is given as a two byte address between $0100 to $FFFF

Example: LDAA $2000 Loads accumulator A with Data value stored at memory location $2000

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Example Problem 1

Example : Write a program to add the numbers 1010 and 1110. Solution

ORG $1000 LDAA #$0A *Puts number $0A in acc. A LDAB #$0B *Puts number $0B in acc. B ABA *Adds acc. B to acc. A STAA $00 *Stores results in address $00 SWI *Software interrupt END

LDAB and LDAA use immediate addressing mode STAA uses direct addressing mode

The George W. Woodruff School of Mechanical Engineering

Address were Data that Mnemonic instruction uses is stored (Continued)

 Indexed: •  Data is located within Memory locations $00 to $FFFF •  Address is given as a address offset between $00 to $FF plus content

of the X or Y register

Example: LDX #$2000 LDAA $03,X

Loads accumulator A with Data value stored at memory location $2003

X + $03 = $2000 + $03 = $2003

(Note: LDX [ LoaD index register X])

The George W. Woodruff School of Mechanical Engineering

Why is Indexed Addressing Mode needed?

Example: Store Data Value #$20 into memory locations $2000 to $3000

Without Indexed Addressing Mode With Indexed Addressing Mode

ORG $1000 LDAA #$20 STAA $2000 STAA $2001 . . . STAA $3000 SWI END

ORG $1000 LDAA #$20

LDX #$2000 LOOP STAA $00,X

INX CPX #$3001 BNE LOOP SWI END

Program on the Left is much longer than program on Right

The George W. Woodruff School of Mechanical Engineering

Why is Indexed Addressing Mode needed? (Continued)

ORG $1000 LDAA #$20

LDX #$2000 LOOP STAA $00,X

INX CPX #$3001 BNE LOOP SWI END

Note: LDX [ LoaD accumulator X] STAA [ STore Accumulator A] INX [ INcrement X] CPX [ ComPare X] BNE [Branch if Not Equal] ( is using relative addressing in conjunction with label “LOOP”)

LOOP, BNE LOOP, INX, and CPX #$3001 creates a loop.

Loop1: Data in accumulator A (#$20) is stored at $2000 + $00 Data in X is incremented #$2000 + #$0001 = #$2001 Data in X is compared to #$3001 Not equal so do another loop

Loop2: Data in Accumulator A (#$20) is stored at $2001 Data in X is incremented #$2001 + #$0001 = #$2002 Data in X is compared to #$3001 Not equal so do another loop

Etc…..

The George W. Woodruff School of Mechanical Engineering

Types of Indexed modes of Addressing

Indexed addressing may be implemented in multiple ways. The HCS12 CPU uses the X or Y index registers, Stack Pointer or Program Counter as the base index register for the instruction. The offset is then added to the base index register to form an effective address.

The different indexed addressing modes are: • Constant offset

• 5-, 9- or 16-bit signed offset • The assembler will interpret all hex values < $8000 as positive numbers • Hex values with a 1 in the 15th bit are negative (recall 2’s compliment) • The following three statements are equivalent:

STAA -8,X Note: offset given in decimal STAA -$08,X Note: offset given in hex STAA $FFF8,X Note: offset given as 16-bit number

• Accumulator Offset • A, B, or D accumulator added to base index register to form address • Contents of accumulator is unsigned offset

LDAB #$FF STAA B,X Note: Accumulator B is unsigned offset (=25510)

Value contained in accumulator A is stored in effective address formed by adding 255 to contents of X

The George W. Woodruff School of Mechanical Engineering

Types of Indexed modes of Addressing - Continued

• Auto Pre-/Post-Increment/Decrement • The base index register may be automatically incremented/decremented before or after instruction (Program Counter may not be used as the base register) • No offset is available • May be incremented/decremented 1 to 8 times Post-Increment:

LDX 2,SP+ Note: Index register X is loaded with the contents of the memory location in the stack pointer, then the stack pointer is incremented twice

Pre-Increment: LDX 2,+SP Note: the stack pointer is incremented twice, then Index register X is loaded with the contents of the memory location in the stack pointer

Pre-Decrement: STAA 1,-X Note: Index register X is decremented, then the contents of Accumulator A are stored in the memory location contained in Index Register X

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Why is Pre-/Post-Increment/Decrement Useful?

Example: Store Data Value #$20 into memory locations $2000 to $3000

Without Post-Increment With Post-Increment

ORG $1000 LDAA #$20

LDX #$2000 LOOP STAA $00,X

INX CPX #$3001 BNE LOOP SWI END

ORG $1000 LDAA #$20

LDX #$2000 LOOP STAA 1,X+

CPX #$3001 BNE LOOP SWI END

Program on the Left requires 1 more byte of program memory and takes 1 more cycle to execute per run through the loop then the program on the right. This may make a large difference when the program is large and complex or when dealing with values larger than 16-bits.

Note: “1” refers to the number of post increments, not an offset!

The George W. Woodruff School of Mechanical Engineering

Types of Indexed modes of Addressing - Continued

• Indexed-Indirect • Like other indexed addressing modes, an offset and base index register are added to form an effective address • However, the effective address is understood to contain the address of the memory location containing the address to be acted upon.

Example: Clear the contents of the memory location pointed to by a pointer located in memory location $2000

ORG $2000 PTR RMB 2 *Note: The user places the address of

the memory location to be cleared here ORG $1000

LDX $2000 CLR [$00,X] SWI END

(Note: CLR [ CLeaR Memory Location])

• Useful for efficiently forming switch case statements and other program flow operations in high level programming languages

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

As stated before the Assembler translates an assembly language program into a machine language program

Format of machine language program

Address where instruction is located

Operand Or

Blank if instruction does not use Operands

Instruction

Opcode

(Note: This format is for Lecture and Tests only !! The real format the assembler outputs is “S19” and will be shown to you in Lab)

Postbyte

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All Mnemonics and associated Op-codes can be found in Programming Reference Guide pages 6-19 Example: Programming Reference Guide Page 12 (Note: LDAA outlined in red)

Postbyte and Opcode Reference

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  Postbyte allows an op-code to be used for more than one instruction.   Determined from Tables 1, 3 or 4 in the programming reference guide

Postbyte

Instruction Opcode Postbyte LDAA 0,X A6 00 LDAA $02,SP+ A6 B1

LDAA B,Y A6 ED SUBB $1040,X E0 E0 SUBB D,Y E0 EE SUBB -14,X E0 12

Table 1 (Excerpt)

The George W. Woodruff School of Mechanical Engineering (Programming Reference Guide)

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

The George W. Woodruff School of Mechanical Engineering

ORG $1000 LDAA #$0A LDAB #$0B ABA STAA $00 SWI END

Hand Assembling

Example: Assemble the following Program

$1000 86 0A

$1002

(Note: $1002 since $86 is now at $1000 and $0A is at $1001)

C6 0B

$1004 18 06

$1006 5A 00

$1008 3F

Address Opcode Postbyte Operand

The George W. Woodruff School of Mechanical Engineering

Example Problem 1 (revisited)

ORG $1000 LDAB #$0A *Load acc. B with number 0A STAB $1100 *Store acc. B in address $1100 INCB *Increment acc. B by 1 ADDB $1100 *Add memory location $1100

*to acc. B STAB $1090 *Store acc. B in address $1090 SWI *Software interrupt END

The George W. Woodruff School of Mechanical Engineering

Hand Assemble Example Problem 1 (Revisited)

ORG $1000 LDAB #$0A STAB $1100 INCB ADDB $1100 STAB $1090 SWI END

Address Opcode Postbyte Operand

1000 C6 0A 1002 7B 1100 1005 52 1006 FB 1100 1009 7B 1090 100B 3F

The George W. Woodruff School of Mechanical Engineering

Example Problem 2

Write a short assembly language program that stores the content of Port T in memory location $3000 after waiting for 0.05 seconds for the input data.

Solution

Recall: One machine cycle = 0.125 x 10-6 s (8 MHz Bus Clock)

We want the HCS12 to wait 0.05 s/0.125 x 10-6 s = 400,000 cycles

One good way to make the HCS12 wait is to create a loop.

The George W. Woodruff School of Mechanical Engineering

Wait Loop

LDY #$C34F 2 cycles LDD #$0000 2 cycles

LOOP ABA 2 cycles CPX $2000 3 cycles DEY 1 cycle BNE LOOP 3 cycles

Assume the number of loops needed to wait is 2 bytes (2 + 3 + 1 + 3)*X + 4 = 400,000 cycles X = 44,44410 = $AD9C

Note: These instructions are included to increase the operation time

The George W. Woodruff School of Mechanical Engineering

Example 2 Solution Solution *Remember that Port T is input upon reset

ORG $1000 LDY #$C34F *Load Y with 44,44410 LDD #$0000 *Clear Accumulator D

LOOP ABA *Add the contents of B to A CPX $2000 *Compare X with the contents of *$2000 DEY *Decrement Y BNE LOOP *Branch to LOOP if Y is not equal *to zero LDAB $0240 *Load acc. B with content of $0240 STAB $3000 *Store content of acc. B in $0020 SWI *Software Interrupt END

The George W. Woodruff School of Mechanical Engineering

Homework

  Homework 1 •  Write an assembly language program to clear the internal RAM in the

MC9S12C32.

•  Write a program to add even/odd numbers located in addresses $0800 through $0900.

  Homework 2

•  Write a program to find the largest signed number in a list of numbers stored in address $0A00 through $0BFF. Repeat for an unsigned number.

The George W. Woodruff School of Mechanical Engineering

QUESTIONS???