memory access modes

7/27/2019 Memory Access Modes

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Memory Access

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Memory AccessMemory AccessModesModes

COMP375 Computer Architecture

an rgan za on

Steps in Address Mapping

Programmer selects a variable name.

relative address.

Linker combines object files and updates

references to relative address to be

program addresses.

Operating system allocates memory for

the program and copies it into RAM.

Relocatable Address Adjustment

0 0

Relocatable Object Files Executable

100

50

150

100 1000 101

50 151

150 302

Adjusting Addresses

When the linker combines object files to

crea e an execu a e, goes roug e

program and adjusts every address.

When a program is executed, it is loaded

into memory. The hardware adjusts each

ro ram relative address to a hardware

address.


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Program Memory Types

Global variables Data segment

Local variables and parameters

Stack

Dynamic variables

Heap

Constants Data segment or instruction segment

Instructions

Instruction segment

Program Memory Organization

Program instructions

Global data

Stack

Heap

Intel method

Effective Address

The effective address (or logical address

or virtual address) is the program relative

address.

The hardware maps the effective addressto the physical address.

Different programs in different physical

a resses may ave t e same e ect ve

address.

Effective addresses can be the result of

address calculations.

Where is the data?

The operands for an instruction can be in

, a reg s er or n e ns ruc on.

The instruction specifies where theoperand is located.

There are several ways the operands

.

Different addressing modes have been

created for different program situations.


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Addressing modes

immediate

reg s er

memory direct

register indirect

register indirect with offset

register + offset memory indirect

displacement

Immediate

The data is part of the instruction.

Immediate data items are read-only.

There is usually a size limit.

Instruction address

data register data

memory

Register

The data is in a CPU register.

The instruction might indicate which register

Instruction address

data register data

memory

Memory Direct

The data is in memory.

The instruction contains the address of the

memory location.

Instruction address

data register data

memory


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Register Indirect

The address of the data is in a CPU

reg s er.

Useful if the address is calculated.

Instruction address

data register data

memory

Register Indirect with Offset

The address of the data is the sum of the

ns ruc on o se e an a reg s er va ue.

Useful when addressing an array.

Instruction address

data register data

memory

Memory Indirect

A memory location contains the address of

e a a.

Useful for pointers.

Instruction address

data register data

memory

Register Offset & Memory Indirect

The sum of the instruction offset field and

a register value gives the location of the

address in memory.

Useful when addressing ref parameters.

Instruction address

data register data

memory


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Displacement

The address of the data is the sum of the

counter.

Used for short jumps

Instruction address

Program Counter instruction

memory

Stack Addressing

The same as Register Indirect with Offset

Useful when addressing local variables or

parameters.

Instruction address

stack pointer register data

memory

Function Calls

To call a function or method, the program

coun er s pus e on e s ac an en

the program counter is loaded with the

address of the function.

This puts the address of the instruction

after the function call on the stack.

To return the return address is popped

from the stack and loaded into the

program counter.

What are the Instructions?

Add Subtract Multiply Divide Load Store JumpEql Jump

0 1 2 3 4 5 6 7

Opcodes

1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 3 3 3

opcode register index

register

memory address

3 4 4 21

opcode unused reg 1 reg 2 reg 3

3 1 4 4 4

LoadandStore

Add,Sub,MultandDivide

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2

1 0 1 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1

0 0 1 0 0 0 1 0 0 0 0 1 0 1 1 1

0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 1

0 0 0 0 1 1 1 1 0 0 1 0 0 1 1 0

1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1


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Notes on the Example

Architecture This is an example of a Load/Storearc ec ure. n y e oa an s ore

instructions access memory.

Why is there a one bit unused field in the

arithmetic instructions?

The format of the jump instructions was not

shown. What might be a good format?

Instruction Cycle

Fetch the instruction from the memory

a ress n e rogram oun er reg s er

Increment the Program Counter

Decode the type of instruction

Fetch the operands

Execute the instruction Store the results

Basic Processor Components

Program Counter contains the address

o e nex ns ruc on o execu e.

Ari thmetic Logic Unit logic to performarithmetic and logical functions

User registers hold data

address to be copied to or from RAM

Memory Buffer Register contains data

copied to or from RAM.

Instruction Fetch

MemoryAddressReg MemoryBufferReg

ProgramCounter InstructionRegister R1R2

...R16

ALU

MemoryRead

M A


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Instruction Fetch



...R16

ALU

ReadResult

Increment Program Counter



...R16

ALU

+1




...R16

ALU

Decode Instruction



...R16

ALU

M A


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Operand Fetch



...R16

ALU

MemoryRead

Operand Fetch



...R16

ALU

ReadResult

Execution



...R16

ALU

Result Store



...R16

ALU

Memory Access


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Jump Instruction

Consider an arithmetic instruction followed

y a ump ns ruc on.

The arithmetic instruction sets bits in the

status register

Execution Stage of Instruction 1



...R16

ALU

Status Register

Result Save Stage of Instruction 1



...R16

ALU

Status Register

Instruction 2 Fetch



...R16

ALU

Status Register

MemoryRead

Memory Access


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Instruction 2 Fetch



...R16

ALU

Status Register

ReadResult




...R16

ALU

+1

Status Register




...R16

ALU

Status Register

Decode Instruction



...R16

ALU

Status Register

Memory Access


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Execution of Instruction 2



...R16

ALU

Status Register

Saving Result of Instruction 2



...R16

ALU

Status Register

Goals for Instruction Set

The purpose of the machine language is to

run e app ca ons.

Compilers should be able to translate high

level languages into machine language.

Run fast

RISC vs. CISC

Complex Instruction Set Computers

many instructions

some instructions can perform complex

operations.

each instruction may take several cycles

fewer instructions

many RISC machines run 1 instruction / cycle

Memory Access


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CISC Theory

The machine language should be

es gne o e as c ose as poss e o e

application requirements.

Machine instructions should support high

level language constructs.

RISC Theory

Many complex instructions are rarely

execu e . os programs use on y a

small set of instructions.

The few important instructions should run

as fast as possible.

,

several fast simple instructions.

Registers are much faster than RAM.

PDP-8 Instruction Set

The PDP-8 was a popular mini computer

made by DEC in the 1970s.

The 12 bit fixed length instructions had a 3

bit op code, an address field and twoaddressing mode bits.

There were 7 instructions with the normal

ormat.

One op code was for zero operand

instructions. The remaining bits of the

instruction specified what to do.

memory access modes

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