Memory Layout and Memory Layout and SLC500 System SLC500 System

AddressesAddresses

Processor Memory Processor Memory DivisionDivision

An SLC 500 processor's memory is An SLC 500 processor's memory is divided into two storage areas. Like divided into two storage areas. Like two drawers in a filing cabinet, one two drawers in a filing cabinet, one area is for data files and the other for area is for data files and the other for program files. Processor memory program files. Processor memory division and file capacity are shown in division and file capacity are shown in the following graphicthe following graphic

Processor Memory Processor Memory OrganizationOrganization

Program FilesProgram Files

• Program files contain processor Program files contain processor information, the main ladder information, the main ladder program, and other ladder files. program, and other ladder files.

• An SLC 500 processor can contain An SLC 500 processor can contain up to 256 program files.up to 256 program files.

• Program files are located in the Program files are located in the Program Files folder of the RSLogix Program Files folder of the RSLogix 500 project tree.500 project tree.

Program FilesProgram Files

Program FilesProgram Files

• Program files are assigned as follows:Program files are assigned as follows:

• File 0 always contains system File 0 always contains system information.information.

• File 1 is reserved.File 1 is reserved.

• File 2 contains the main ladder file.File 2 contains the main ladder file.

• File 3-255 contains other ladder files File 3-255 contains other ladder files (subroutines).(subroutines).

Data FilesData Files

• DataData files contain the status files contain the status information associated with external information associated with external I/O and all other instructions used in I/O and all other instructions used in the main and subroutine ladder the main and subroutine ladder program files. program files.

• Data files are located in the Data Data files are located in the Data Files folder of the RSLogix 500 Files folder of the RSLogix 500 project tree.project tree.

Data FilesData Files

Data file organization for SLC-500 controller.

The data file portion of memory stores input and output status, processor status, the status of various bits and numerical data.

Data Files

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Input Table File Operation Input Table File Operation

Input module Input module

Switch Open Switch Open

Binary 0 stored Binary 0 stored

0 0

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Input Table File Operation Input Table File Operation

Input module Input module

Switch Closed Switch Closed Processor continually Processor continually reads current input reads current input status and updates status and updates input image table file input image table file

Binary 1 stored Binary 1 stored

1 1

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Output Table File Operation

Output module Output OFF

Processor continually activates or deactivates output status according to output image table •\file status

Status 0

0

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Output Table File Operation

Output module

Processor continually activates or deactivates output status according to output image table file status

Output ON

1

Status 1

SLC 500 Software and SLC 500 Software and Hardware AddressingHardware Addressing

SLC 500 Processor Data SLC 500 Processor Data Storage UnitsStorage Units

The SLC 500 processor stores data in the following units The SLC 500 processor stores data in the following units of memory:of memory:

• Bit:Bit: A digit in the binary radix (0 or 1). A bit may A digit in the binary radix (0 or 1). A bit may represent the state, on or off, of a discrete I/O device.represent the state, on or off, of a discrete I/O device.

• WordWord: : A sequence of 16 bits that is treated as a unit. A sequence of 16 bits that is treated as a unit. For example, the 16 bits representing the 16 points of For example, the 16 bits representing the 16 points of an I/O module comprise one word.an I/O module comprise one word.

• ElementElement: : A word or group of words that work A word or group of words that work together as a unit.together as a unit.

• Sub-elementSub-element: : Individual words within an element.Individual words within an element.

SLC 500 Hardware Address SLC 500 Hardware Address CharacteristicsCharacteristics

• The address for a real-world device (input or output) is The address for a real-world device (input or output) is directly determined by the module slot number and directly determined by the module slot number and terminal to which the hardware device is wired.terminal to which the hardware device is wired.

• Slot numbers are assigned from left to right, beginning Slot numbers are assigned from left to right, beginning with 0. The SLC 500 processor is in slot 0.with 0. The SLC 500 processor is in slot 0.

• A hardware address contains the following information:A hardware address contains the following information:• The module type, either an input (I) or an output (O) The module type, either an input (I) or an output (O)

modulemodule• The slot number (numbered in decimal from 1 to 30)The slot number (numbered in decimal from 1 to 30)• The terminal number (numbered in decimal from 0 to 15)The terminal number (numbered in decimal from 0 to 15)

SLC 500 Hardware Address SLC 500 Hardware Address CharacteristicsCharacteristics

SLC 500 Output addressingSLC 500 Output addressing

OO:5/0 means that it is a physical output.:5/0 means that it is a physical output.O:O:55/0 means that it uses Slot 5 (the 6th /0 means that it uses Slot 5 (the 6th physical slot) in the rack.physical slot) in the rack.O:5/O:5/00 means that it is the first output on the means that it is the first output on the card.card.

SLC 500 Input addressingSLC 500 Input addressing

II:4/0 means that it is a physical input.:4/0 means that it is a physical input.I:I:44/0 means that it uses Slot 4 (the 5th /0 means that it uses Slot 4 (the 5th slot in the rack).slot in the rack).I:4/I:4/00 means that it is the first input on means that it is the first input on the card.the card.

Internal Coil AddressingInternal Coil Addressing

BB33:0/0 means that it references an :0/0 means that it references an internal Binary fileinternal Binary fileB3:B3:00/0 means that it uses the first /0 means that it uses the first word in the tableword in the tableB3:0/B3:0/00 means that it is the first bit in means that it is the first bit in the word.the word.

An example of an SLC 500 I/O address is shown in the An example of an SLC 500 I/O address is shown in the following graphicfollowing graphic

Internal Coil AddressingInternal Coil Addressing

SLC 500 Input addressingSLC 500 Input addressing

SLC 500 Output addressingSLC 500 Output addressing

SLC 500 Input SLC 500 Input addressingaddressing

SLC 500 Output addressingSLC 500 Output addressing

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Program Scan During each operating cycle, the processor reads all inputs, takes these values, and energizes or de-energizes the outputs according to the user program. This process is known as a scan.

I/O scan – records status data of input devices. Energizes output devices that have their associated status bits set to ON (1)

Program scan – instructions are executed sequentially

Because the inputs can change at any time, the PLC must carry on this process continuously.

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•Scan Process

The scan time indicates how fast the controller can react to changes in inputs. Scan times vary with computer model and program content, and length. If a controller has to react to an input signal that changes states twice during the scan time, it is is possible that the PLC will never be able to detect this change.

Scan time may be a concern in high speed operations

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Scan Process

Adjusts outputs

Read inputs

The scan is a a continuous and sequential process

Run program

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Data Flow Overview

Examine data Return results

Input modules

Output modules

Input data

Output data

Program

Check/compare/examine specific conditions

Take some action

Input image table file

Output image table file

•Lecture – PLC Programming Basics MME 486 – Fall 2006 16 of 62

When the input is closed, the input module senses a voltage and an ON condition (1) is entered into the input table bit I:3/6

Input device

I:3/6

Input Module

During the program scan the processor sets instructions I:3/6 and O:4/7 to ON (1)

Scan Process

I:3/6

Input file

I:3/6 O:4/7

•Program

Output file

O:4/7

The processor turns light output O:4/7 ON during the next I/O scan

Output Module

O:4/7

Output device

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Scan Patterns

End of ladder

Horizontal Scanning Order

The processor examines input and output instructions from the first command, top left in the program, horizontally, rung by rung.

In addition to the program itself, the scan time is also dependent on the clock frequency of the processor!

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PLC Programming Languages

The term PLC programming language refers to the method by which the user communicates information to the PLC.

The three most common language structures are: ladder diagram language, Boolean language, and functional chart.

Ladder diagram language

Functional chart

Boolean language

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Comparing Programming Language

PB1 CR1 CR2

LS1

SOL Relay Schematic

PB1 CR1 CR2 SOL

LS1

Equivalent ladder diagram language

Equivalent Boolean language

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Relay-Type Instructions

The ladder diagram language is basically a symbolic set of instructions used to create the controller program.

These ladder instructions symbols are arranged to obtain the desired control logic.

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Examine If Closed (XIC) Instruction

Symbol Analogous to the normally open relay contact. For this instruction we ask the processor to EXAMINE IF (the contact is) CLOSED or ON (XIC)

Typically represents any input. Can be a switch or pushbutton, a contact from a connected output, or a contact from an internal output.

Has a bit-level address which is examined for an ON condition.

The status bit will be either 1 (ON) or 0 (OFF).

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Examine If Open (XIO) Instruction

Symbol Analogous to the normally closed relay contact. For this instruction we ask the processor to EXAMINE IF (the contact is) OPEN (XIO).

Typically represents any input. Can be a switch or pushbutton, a contact from a connected output, or a contact from an internal output.

Has a bit-level address which is examined for an OFF condition.

The status bit will be either 1 (ON) or 0 (OFF).

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Output Energize (OTE) Instruction

Symbol Analogous to the relay coil. The processor makes this instruction true (analogous to energizing a coil) when there is path of true XIC and XIO instructions in the rung.

Typically represents any output that is controlled by some combination of input logic. Can be a connected device or an internal output (internal relay).

If any left-to-right path of input conditions is TRUE, the output is energized (turned ON).

User-programmed rung

Closed input

Address input terminal I1:3/12

Allen-Bradley SLC-500 Controller Addressing

I1:3

12

Output image table file 0

I:3/12 Bit address

O:0:4/6 it address

Input image table file 1

O:4

6

Energized output

Address output terminal O0:4/6

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PLC Matrix Limitation Diagram

There may be limitations to the number of series contacts instructions, number of parallel lines, and the number of outputs and their location on the rung.

Max parallel lines

Max series contacts

No. outputs per rung and location of the output in the rung

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Extending the Number of Series Contacts Using an Internal Control Relay

Internal relay coil

Discrete output (requires one physical connection on the output module)

Internal relay

contact

Rung 1

Rung 2

A nested branch starts or ends within another branch.

Input and output branches can be nested to avoid redundant instructions and to speed up the processor scan time.

Nested Input and Output Branches

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Nested Contact Program A B C

Y

Nested contact

D

E

On some PLC models, the programming of a nested branch circuit cannot be done directly.

A B C

D C

E

Y

Contact instruction C repeated

Reprogrammed to obtain the required logic.

A nested branch starts or ends within another branch.

Input and output branches can be nested to avoid redundant instructions and to speed up the processor scan time.

Nested Input and Output Branches

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Nested Contact Program A B C

Y

Nested contact

D

E

On some PLC models, the programming of a nested branch circuit cannot be done directly.

A B C

D C

E

Y

Contact instruction C repeated

Reprogrammed to obtain the required logic.