EE 200 Midterm Exam 23 October 2014

Last Name (Print):

First Name (Print):

ID number (Last 4 digits):

Section:

DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO

Problem Weight Score

1 25

2 25

3 25

4 25

Total 100

INSTRUCTIONS

1. You have 2 hours to complete this exam.

2. This is a closed book exam. You may use one 8.5”× 11” note sheet.

3. Calculators are allowed.

4. Solve each part of the problem in the space following the question. If you need more space, continue your solutionon the reverse side labeling the page with the question number; for example, Problem 1.2 Continued. NOcredit will be given to solutions that do not meet this requirement.

5. DO NOT REMOVE ANY PAGES FROM THIS EXAM. Loose papers will not be accepted and agrade of ZERO will be assigned.

6. The quality of your analysis and evaluation is as important as your answers. Your reasoning must be preciseand clear; your complete English sentences should convey what you are doing. To receive credit, you mustshow your work.

7. Any student caught cheating on an exam will receive a grade of zero for the exam. Additional sanctions,including assigning an XF grade, will be pursued following university guidelines.

1

Problem 1: (25 Points)

1. (5 points) Figure 1 shows the state diagram of a Moore finite state machine with input x and output y. Completethe state table for this finite state machine in Table 1.

Figure 1: State diagram for a Moore finite state machine with input x and output y.

Next StatePresent State x̄ x Output

QAQB QAQB QAQB yS0 0 0

S1 0 1S2 1 0

S3 1 1

Table 1: State table for the Moore finite state machine in Figure 1.

2

2. (8 points) Table 2 shows the state table for another Moore finite state machine with input x and output y.Determine an expressions for DA, in terms of x, QA, and QB, using the three-variable Karnaugh map in Figure2.

Next StatePresent State x̄ x Output

QAQB QAQB QAQB y0 0 0 0 1 1 1

0 1 0 1 1 1 11 0 0 0 1 1 0

1 1 1 0 0 0 0

Table 2: State table for a Moore finite state machine.

Figure 2: Three-variable Karnaugh maps for determining DA.

3

3. (4 points) Realize the logic expressionu = w̄x + wx̄ + xy + yz

using the signals w, x, y, and z, and two-input and four-input NAND gates. The signals w̄ and x̄ are notavailable and must be generated by your circuit. Show all calculations needed to place the expression for u ina form suitable for implementing u using NAND gates, and neatly sketch the resulting discrete-logic circuit.

4

4. (8 points) Figure 3 represents a Moore finite state machine that has inputs x and z and output y. Realize thefinite state machine in HDL by completing the code in Figure 4. Define each state with binary values, set theclock signal, and specify the conditions for each state transition.

Figure 3: State diagram for a Moore finite state machine with inputs x and z, and output y.

5

/* *************** INPUT PINS *************************/

PIN 1 = CLK; /* clock input */

PIN 2 = x; /* input x */

PIN 3 = z; /* input z */

/* *************** OUTPUT PINS ************************/

PIN 23 = y; /* output y */

PIN 22 = QA; /* diagnostic output */

PIN 21 = QB; /* diagnostic output */

/* *************** DEFINE STATES FOR FSM **************/

FIELD state_n = [QA,QB];

$define S0 /*

Problem 2: (25 Points)

1. (15 points) Figure 5(A) shows a mixed-signal circuit, with input Vin(t) and output Vout(t), that uses two CMOSNAND gates with a low-state output voltage VL = VSS = 0 V and a high-state output voltage VH = VDD.The circuit is driven by the pulse in Figure 5(B), whose width Tin is small compared to the time constant ofthe RC network. Immediately prior to the change in the input at time t = 0, there is no energy stored in thecapacitor. Neatly sketch the resulting waveforms v1(t), vR(t) and vout(t) in Figure 6. To receive full credit:

• Carefully label the maximum and minimum values of the waveforms v1(t), vR(t) and vout(t).

• Determine the width of any pulse appearing in the output vout(t) in terms of the parameters R and C.

• Show the calculations used to derive the pulse width in terms of the parameters R and C.

• Indicate the pulse width in Figure 6.

Figure 5: (A) CMOS circuit with input vin(t) and output vout(t) and (B) the input waveform vin(t).

7

Figure 6: Waveforms for the circuit in Figure 5.

8

2. (10 points) The passive RL circuit in Figure 7 realizes a filter network with input voltage f(t) and outputvoltage y(t).

Figure 7: Passive filter network.

(a) (3 points) Does the network realize a low-pass, band-pass, or high-pass filter. Justify your answer using ashort sentence.

(b) (7 points) For the network in Figure 7, determine the magnitude, |H(ω)|, and phase, 6 H(ω) of thefrequency response function

H(ω) =Ỹ

F̃,

where Ỹ and F̃ are the phasor representations of the output and input respectively. Express the magnitudeand phase functions in terms of the frequency ω of the input sinusoid and the corner frequency

ωc =R

L

of the network.

9

10

Problem 3: (25 Points)

1. (7 points) For the LabVIEW block diagram appearing in Figure 8:

• (4 points) Specify the dimension, number of elements, and data type for the output indicator (for example:a 1D array, 5 elements, 32-bit signed integer).

• (3 points) Approximate the time required for the loops to complete execution.

Figure 8: Block diagram for Problem 3 Part 1.

11

2. (6 points) Determine the value(s) displayed by the indicator in the LabVIEW block diagram appearing inFigure 9. If the indicator displays a 1D array or 2D array, list all the elements in the array. If the indicatordisplays a cluster, list all the elements in the cluster. Show work for partial credit.

Figure 9: Block diagram for Problem 3 Part 2.

12

3. (6 points) For the LabVIEW block diagram in Figure 10, determine the value displayed by the indicator afterthe loop completes execution. Show work for partial credit.

Figure 10: Block diagram for Problem 3 Part 3.

13

4. (6 points) Figure 11 shows three subdiagrams of a LabVIEW case structure.

• (2 point) Which subdiagram executes, 11, 12 or 13? Justify your answer

• (4 point) After the case structure executes, specify the string displayed by the indicator, as well as thenumber of characters in the string.

Figure 11: Block diagram for Problem 3 Part 4.

14

Problem 4: (25 Points)

1. (10 points) Complete the SPICE model in in Figure 12 so that it represents the amplifier shown in Figure 13.

.SUBCKT Amp 1 5

.ENDS Amp

Figure 12: SPICE model for a Multisim component that realizes the amplifier in Figure 13.

Figure 13: Amplifier to be represented by the SPICE model in Figure 12.

15

2. (15 points) Answer each of the following questions regarding printed circuit boards using one or two shortsentences.

(a) (3 points) What are Gerber files?

(b) (3 points) What does the weight of a printed circuit board specify?

(c) (3 points) Why are sharp corners in printed circuit board traces undesirable?

(d) (3 points) What are vias and why are they used?

(e) (3 points) What are thermal reliefs and why are they used?

16

EE 200 Midterm Exam 23 October 2014

Last Name (Print):

First Name (Print):

ID number (Last 4 digits):

Section:

DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO

Problem Weight Score

1 25

2 25

3 25

4 25

Total 100

INSTRUCTIONS

1. You have 2 hours to complete this exam.

2. This is a closed book exam. You may use one 8.5”× 11” note sheet.

3. Calculators are allowed.

4. Solve each part of the problem in the space following the question. If you need more space, continue your solutionon the reverse side labeling the page with the question number; for example, Problem 1.2 Continued. NOcredit will be given to solutions that do not meet this requirement.

5. DO NOT REMOVE ANY PAGES FROM THIS EXAM. Loose papers will not be accepted and agrade of ZERO will be assigned.

6. The quality of your analysis and evaluation is as important as your answers. Your reasoning must be preciseand clear; your complete English sentences should convey what you are doing. To receive credit, you mustshow your work.

7. Any student caught cheating on an exam will receive a grade of zero for the exam. Additional sanctions,including assigning an XF grade, will be pursued following university guidelines.

1

Problem 1: (25 Points)

1. (5 points) Figure 1 shows the state diagram of a Moore finite state machine with input x and output y. Completethe state table for this finite state machine in Table 1.

Figure 1: State diagram for a Moore finite state machine with input x and output y.

Next StatePresent State x̄ x Output

QAQB QAQB QAQB yS0 0 0

S1 0 1S2 1 0

S3 1 1

Table 1: State table for the Moore finite state machine in Figure 1.

2

2. (8 points) Table 2 shows the state table for another Moore finite state machine with input x and output y.Determine an expressions for DA, in terms of x, QA, and QB, using the three-variable Karnaugh map in Figure2.

Next StatePresent State x̄ x Output

QAQB QAQB QAQB y0 0 0 0 1 1 1

0 1 0 1 1 1 11 0 0 0 1 1 0

1 1 1 0 0 0 0

Table 2: State table for a Moore finite state machine.

Figure 2: Three-variable Karnaugh maps for determining DA.

3

3. (4 points) Realize the logic expressionu = w̄x + wx̄ + xy + yz

using the signals w, x, y, and z, and two-input and four-input NAND gates. The signals w̄ and x̄ are notavailable and must be generated by your circuit. Show all calculations needed to place the expression for u ina form suitable for implementing u using NAND gates, and neatly sketch the resulting discrete-logic circuit.

4

4. (8 points) Figure 3 represents a Moore finite state machine that has inputs x and z and output y. Realize thefinite state machine in HDL by completing the code in Figure 4. Define each state with binary values, set theclock signal, and specify the conditions for each state transition.

Figure 3: State diagram for a Moore finite state machine with inputs x and z, and output y.

5

/* *************** INPUT PINS *************************/

PIN 1 = CLK; /* clock input */

PIN 2 = x; /* input x */

PIN 3 = z; /* input z */

/* *************** OUTPUT PINS ************************/

PIN 23 = y; /* output y */

PIN 22 = QA; /* diagnostic output */

PIN 21 = QB; /* diagnostic output */

/* *************** DEFINE STATES FOR FSM **************/

FIELD state_n = [QA,QB];

$define S0 /*

Problem 2: (25 Points)

1. (15 points) Figure 5(A) shows a mixed-signal circuit, with input Vin(t) and output Vout(t), that uses two CMOSNAND gates with a low-state output voltage VL = VSS = 0 V and a high-state output voltage VH = VDD.The circuit is driven by the pulse in Figure 5(B), whose width Tin is small compared to the time constant ofthe RC network. Immediately prior to the change in the input at time t = 0, there is no energy stored in thecapacitor. Neatly sketch the resulting waveforms v1(t), vR(t) and vout(t) in Figure 6. To receive full credit:

• Carefully label the maximum and minimum values of the waveforms v1(t), vR(t) and vout(t).

• Determine the width of any pulse appearing in the output vout(t) in terms of the parameters R and C.

• Show the calculations used to derive the pulse width in terms of the parameters R and C.

• Indicate the pulse width in Figure 6.

Figure 5: (A) CMOS circuit with input vin(t) and output vout(t) and (B) the input waveform vin(t).

7

Figure 6: Waveforms for the circuit in Figure 5.

8

2. (10 points) The passive RL circuit in Figure 7 realizes a filter network with input voltage f(t) and outputvoltage y(t).

Figure 7: Passive filter network.

(a) (3 points) Does the network realize a low-pass, band-pass, or high-pass filter. Justify your answer using ashort sentence.

(b) (7 points) For the network in Figure 7, determine the magnitude, |H(ω)|, and phase, 6 H(ω) of thefrequency response function

H(ω) =Ỹ

F̃,

where Ỹ and F̃ are the phasor representations of the output and input respectively. Express the magnitudeand phase functions in terms of the frequency ω of the input sinusoid and the corner frequency

ωc =R

L

of the network.

9

10

Problem 3: (25 Points)

1. (7 points) For the LabVIEW block diagram appearing in Figure 8:

• (4 points) Specify the dimension, number of elements, and data type for the output indicator (for example:a 1D array, 5 elements, 32-bit signed integer).

• (3 points) Approximate the time required for the loops to complete execution.

Figure 8: Block diagram for Problem 3 Part 1.

11

2. (6 points) Determine the value(s) displayed by the indicator in the LabVIEW block diagram appearing inFigure 9. If the indicator displays a 1D array or 2D array, list all the elements in the array. If the indicatordisplays a cluster, list all the elements in the cluster. Show work for partial credit.

Figure 9: Block diagram for Problem 3 Part 2.

12

3. (6 points) For the LabVIEW block diagram in Figure 10, determine the value displayed by the indicator afterthe loop completes execution. Show work for partial credit.

Figure 10: Block diagram for Problem 3 Part 3.

13

4. (6 points) Figure 11 shows three subdiagrams of a LabVIEW case structure.

• (2 point) Which subdiagram executes, 11, 12 or 13? Justify your answer

• (4 point) After the case structure executes, specify the string displayed by the indicator, as well as thenumber of characters in the string.

Figure 11: Block diagram for Problem 3 Part 4.

14

Problem 4: (25 Points)

1. (10 points) Complete the SPICE model in in Figure 12 so that it represents the amplifier shown in Figure 13.

.SUBCKT Amp 1 5

.ENDS Amp

Figure 12: SPICE model for a Multisim component that realizes the amplifier in Figure 13.

Figure 13: Amplifier to be represented by the SPICE model in Figure 12.

15

2. (15 points) Answer each of the following questions regarding printed circuit boards using one or two shortsentences.

(a) (3 points) What are Gerber files?

(b) (3 points) What does the weight of a printed circuit board specify?

(c) (3 points) Why are sharp corners in printed circuit board traces undesirable?

(d) (3 points) What are vias and why are they used?

(e) (3 points) What are thermal reliefs and why are they used?

16

blanksolutions