mie438 - spring 2014 - lecture slides 3(1)_615279

8/13/2019 MIE438 - Spring 2014 - Lecture Slides 3(1)_615279

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MIE438Microprocessors and Embedded

Microcontrollers

Department of Mechanical and Industrial Engineering

Lecture 3Addressing Modes

1

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Code Compilation

Op-Codes

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High level (and assembly) code is compiledinto

program data; atomic instructions each have an

op-codewhich is decoded by the C


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Addressing Modes

Inherent Addressing

3

Simplest mode: Address, data, or register is inherently

specified by the instruction.

NOP SEI / CLI

No Operation

PC + 1PC

Inhibit / Allow Interrupts

HCF


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Addressing Modes

Immediate Addressing

4

For immediate addressing, a value is explicitly stored

within the code

MOVR0, 0xAF

0xA000

0xA001

0xA002

Opcode

0xAFRegister 0

0xAF

0xA000

0xA001

0xA002

Opcode

0x00

0xAF

0xA000

0xA001

0xA002

Opcode

0xAF

0x00

8-bit register 16-bit register, Big Endian 16-bit, Little Endian


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Addressing Modes

ImmediateAdvantages / Disadvantages

5

Best used to implement constantsor other fixed

datatypes

Advantages:

No memory reference (generally faster)

Disadvantages:

Increases size of code in memory

Not useful for general-purpose variables


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Addressing Modes

Register Addressing

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For register addressing, the operands are registers only

MOVR0, R1Register 1Register 0

ADD R0, R1R0 + R1R0

MOVA, R1Register 1Accumulator A


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Addressing Modes

RegisterAdvantages / Disadvantages

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Best used to implement transfers/assignment

between variables

Advantages:

Can often be stored with just the opcode

Disadvantages:

No access to memory yet

Need a source of data (constants or I/O)


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Addressing Modes

Direct Addressing

8

Direct addressing allows one to directly specify a

memory location to access (with varying integration)

MOV[0xA000], 0xAF

Value 0xAF(Memory [0xA000])

MOV[0xA000], R0

Register R0(Memory [0xA000])

MOVR0, [0xA000](Memory [0xA000])R0

ADD[0xA000], 0x02(Mem. [0xA000]) + 0x02([0xA000])

ADD [0xB000], [0xA000], 0xAF

(Mem. [0xA000]) + 0xAF(Mem. [0xB000])


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Addressing Modes

DirectAdvantages / Disadvantages

9

Best used to implement constant loading,

memory-mapped I/O, etc. (anything at a

constant address!)

Advantages:

Gives direct access to memory

Disadvantages:

Address space limited by operand width


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Addressing Modes

Indirect Addressing

10

For indirect addressing, the memory location in the

operand contains the actual address of the data to be

used by the instruction

MOVR0, @[0xA000]

(Memory 0xB000)Register 0

0xA000

0xA001

0xB000

0xB0

0x00

0xCD


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Addressing Modes

IndirectAdvantages / Disadvantages

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May be multiplelevels of indirection

Best used to implement pointers, arrays, etc.

Advantages:

Allows efficient implementation of pointers,

arrays, lists, etc.

Disadvantages:

Two or more memory accesses per instr.


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Addressing Modes

Register Indirect Addressing

12

Similar to basic indirect addressing, except the memory

address of the operand is stored in a registerinstead of

another memory location

MOVR0, @R1

(Memory 0xB000)Register 0

R0

R1

0xB000

???

0xB000

0xC000

0xC000 0x0F0A

MOVR0, @@R1

(Memory 0xC000)Register 0


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Addressing Modes

Register IndirectAdvantages / Disadvantages

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Best for variablepointers, variablearrays, etc.

Advantages:We can easily have variable addresses for the

first level of indirection

Disadvantages:

Address space is limited to register width


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Addressing Modes

Indexed Addressing

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A family of addressing modes used to add indexingto

many of the previous modes of addressing

BRR 0x05PC + 5PC

MOVR0, @R1+5

(Memory 0xB000 + 5)Register 0

R1 0xB000

Relative

Base Register

MOVR0, @[R1+R2]Base Register


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Addressing Modes

Register IndirectAdvantages / Disadvantages

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Better handling of arrays, structures, etc.

Advantages:Combines many steps involved in complex

data manipulation

Allows pointer arithmetic

Disadvantages:

Requires arithmetic within instruction


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Addressing Modes

Exotic

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There are many more exotic addressing modes:

Base plus Index plus Offset

Effective Address = [Base + Index + Offset]Scaled

Effective Address = [Base + Scale X Index]

Register Auto-increment/decrement

Automatically increments a register after effective

address is calculated

Many more


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Programming Example

Exam Example 6

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Exam Example 6Write a program to calculate the

factorial of a number:

Assume the number is stored in R0

Ignore checking pre-conditions


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Programming Example

Exam Example 7

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Exam Example 7Write a program to calculate the

square root of a number S by the following procedure:

Assume S is stored in R0

Set xn= S / 2

Iterate the following:

xn+1= *(xn+ S/xn)


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Program Flow

Some comments

19

You may have noticed that it is difficult for us to write

useful programs at this point

We are missing basic components for flow control:

Condition Checking and Conditional Branching

Subroutines and Calling


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MIE438Microprocessors and Embedded

Microcontrollers

Department of Mechanical and Industrial Engineering

Loops, Subroutines, and Code Structure

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Branch Instructions

A necessity for meaningful programs

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We require branching and conditional branching to

write most useful programs:

Anything with loops or non-linear paths

Some texts use branchandjumpinterchangeably;

we will distinguish two types of instructions


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Direct Branches

Simple PC-modifying instruction

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A direct branchis typically a simplified or low-cost

version of a full jump instruction

It loads PC with the direct value that followsMost instruction sets do notallow any branch

or jump instructions to use registers or memory

as operands

BRA 0xF5

0xF5PC


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Direct Branches

Simple PC-modifying instruction

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A direct branchis typically a simplified or low-cost

version of a full jump instruction

Typically addresses a smaller range of memorySome implementations use them to address

special-purpose code (ex: interrupts)


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Relative Branches

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Increments or decrementsthe PC by a specifiedvalue relative to the current value

Remember: PC typically points to nextinstr. to

be read

must factor this in when calculating

BRR 0x05

PC + 0x0005PC

PC: 0x0100

BRR 0xF5

PC + 0xFFF5PC

PC: 0x0105

example made


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Relocatable Code

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Relative branches allow code to be relocated

Relocatable code can exist anywherein memory; it

does not hard-code any constant addresses

Benefits:

Easy to compile and link

Better cross-compatibility and upgradeability

Self-modifying code


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Direct Jump

Complete PC-modifying instruction

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Nearly identical to direct branch

It loads PC with the direct value that follows

Typically addresses the entirememory range ofthe microcontrollerlonger instruction

JMP 0xF005

0xF005PC


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Conditional Branch / Jump

Conditional Execution

27

Both branch and jump instructions typically allow

conditional branching, where a test is performed

A conditional branch implies a conditional test

Typically it is a subtraction, which may be

explicit, implicit, or a general compare


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Flavors

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There are many different types (depend on ISA):

BEQ / JEQ

BNE / JNEBLT / JLT

BGT / JGT

BLE / JLE

BGE / JGE

BCC / JCC

BCS / JCS

BZ / JZ

BNZ / JNZ

BO / JO

BNO / JNO

BS / JS

BNS / JNS


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Implementation

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Most of these simply check various status bits

resulting from arithmetic (carry, overflow, etc.)

Can actually be used after anyarithmeticoperation in most microcontrollers

If we are comparing two numbers / registers, we

typically use a subtraction operation:

SUB R0, R1

BNE0xF001


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Implementation

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However, many ISAs give the user an explicit

compare instruction:

Aside from being user-friendly, this may have other

benefits, again depending on the ISA

Ex: May leave original carry / overflow / etc.

flags intact after comparison

CMP R0, R1BNE0xF001


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Next Sections

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1. Functions and Subroutines, Code Structure

2. Optimization and Execution

mie438 - spring 2014 - lecture slides 3(1)_615279

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