mifare apdu

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Features - Compact size module and ANT - Card read/write frequency : 13.56Mhz±5% - Power consumption : 5[V]/300[] - Reading distance : ~ 50mm - Operating Temperature : -10 ~ 70 - Storage Temperature : -25 ~ 80 - Serial communication controlled (RS-232C/9600bps/8BIT/1STOP/NONE PARITY) - ANTI-Collision procedure support. - Based on ISO/IEC-14443A&B - PCD and PICC Data transmit& Receive capacity is 256bytes(ISO-14443A&B) - Available PICC (VICC) : Mifare® standard, ISO-14443A&B STX Bit_Len_high Bit_Len_low Command Data BCC ETX HOST STX Bit_Len_high Bit_Len_low Status Response BCC ETX 1-1. Response status list Status Result Remark 0X00 Command operating Success 0X01 Type-A PICC Select error 0X02 Type-A PICC Anti-collision error 0X03 Type-A PICC Request error 0X04 Type-A or B PICC (VICC) no response 0X05 Type-A or B CRC error 0X06 Type-A or B PICC Receive Frame error 0X80 PCD Command not found 0X81 Communication error Total bit length Exclusive OR Total bit length Exclusive OR

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Page 1: Mifare APDU

Features - Compact size module and ANT - Card read/write frequency : 13.56Mhz±5% - Power consumption : 5[V]/300[㎃] - Reading distance : ~ 50mm - Operating Temperature : -10� � ~ 70 - Storage Temperature : -25� �~ 80 - Serial communication controlled

(RS-232C/9600bps/8BIT/1STOP/NONE PARITY) - ANTI-Collision procedure support. - Based on ISO/IEC-14443A&B - PCD and PICC Data transmit& Receive capacity is 256bytes(ISO-14443A&B) - Available PICC (VICC) : Mifare® standard, ISO-14443A&B

STX Bit_Len_high Bit_Len_low Command Data BCC ETX

HOST

STX Bit_Len_high Bit_Len_low Status Response BCC ETX

1-1. Response status list

Status Result Remark 0X00 Command operating Success 0X01 Type-A PICC Select error 0X02 Type-A PICC Anti-collision error 0X03 Type-A PICC Request error 0X04 Type-A or B PICC (VICC) no response 0X05 Type-A or B CRC error 0X06 Type-A or B PICC Receive Frame error 0X80 PCD Command not found 0X81 Communication error

Total bit length

Exclusive OR

Total bit length

Exclusive OR

Page 2: Mifare APDU

2. Communication

Set up each operating time according to ISO-14443.

2-1. RF Field Control

Host STX Bit_Len_high Bit_Len_low 0X20 Time BCC ETX

1 1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 In case of Time = 0X00 , RF field is OFF. 2-2. LED1 ON

Host STX Bit_Len_high Bit_Len_low 0X11 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 2-3. LED1 OFF

Host STX Bit_Len_high Bit_Len_low 0X12 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 2-4. LED2 ON

Host STX Bit_Len_high Bit_Len_low 0X13 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1

RF FIELD (RF Carrier Frequency)

RF FIELD (RF Carrier Frequency)

Time [㎳]

Page 3: Mifare APDU

2-5. LED2 OFF

Host STX Bit_Len_high Bit_Len_low 0X14 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 3. Mifare® (Type-A) 3-1. Configuration Command

Host STX Bit_Len_high Bit_Len_low 0X61 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 The operating is available after initializing of the circuit of RF driver/receiver in the reader/writer.

3-2. Request A & anti-collision/select (Ready state)

Host STX Bit_Len_high Bit_Len_low 0X30 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status ATQA UID SAK BCC ETX

1 1 1 1 2 4 1 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Processing sequence between Reader and card Note) In case that the multiple PICCs are in the RF field, the PCD is settled according to the Anti-collision sequence of ISO-14443.

Or

ISO-14443-3

PCD

PICC ATQA 2bytes UID 4Bytes SAK 1Bytes

REQA Anti-collision SELECT

Page 4: Mifare APDU

3-3. Request A & anti-collision/select (Ready state)

Host STX Bit_Len_high Bit_Len_low 0X33 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status ATQA UID SAK BCC ETX

1 1 1 1 2 4 1 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Processing sequence between Reader and card Note) In case that the multiple PICCs are in the RF field, the PCD is settled according to the Anti-collision sequence of ISO-14443. 3-4. Halt Command

Host STX Bit_Len_high Bit_Len_low 0X39 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is to halt the function of the Card Among the multiple cards, it is to be used to halt the function of the Card that is under currently operating for the purpose of reading of another card. Also it is to be used in case that the operating of Card is completed.

3-5. Authentication1A Command (Key Type A)

Host STX Bit_Len_high Bit_Len_low 0X62 Block KeyA0 – KeyA5 BCC ETX

1 1 1 1 1 6 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is for authentication of the Card and the Card is to be authenticated through the Key of 6 Byte. The Key inside of the card is composed of Key-A and Option Key-B and this command is for KEY-A Authentication. For more details, refer to Mifare® Standard card in MF1 IC S50

Or

ISO-14443-3

PCD

PICC ATQA 2bytes UID 4Bytes SAK 1Bytes

WUPA Anti-collision SELECT

Page 5: Mifare APDU

3-6. Authentication1B Command (Key Type B)

Host STX Bit_Len_high Bit_Len_low 0X63 Block KeyB0 – KeyB5 BCC ETX

1 1 1 1 1 6 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is for authentication of the card and the card is to be authenticated through the Key of 6 Byte (Mifare® standard). The Key inside of the card is composed of Key-A and Option Key-B. It is for KEY-B Authentication. For more details, refer to Mifare® Standard card in MF1 IC S50.

3-7. Authentication2 Command (Crypto1 Algorithm ON)

Host STX Bit_Len_high Bit_Len_low 0X64 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is to start the cryptography between the card and reader and always can be operated after that the Authentication 1 Command is operated and authenticated only. For more details, refer to Mifare® Standard card in MF1 IC S50

3-8. Read Block Command

Host STX Bit_Len_high Bit_Len_low 0X65 BLOCK BCC ETX

1 1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status Read Block Data BCC ETX

1 1 1 1 16 1 1 This command is to read the data on the Card. The length of Read Data is always Block unit and 1 Block is composed of 16 Byte. The Read/Write commands are available only in the Block of Sector that is defined at authentication 1 and Authentication 2 after that the operation of Authentication 1, Authentication 2 is completed.

3-9. Write Block Command

Host STX Bit_Len_high Bit_Len_low 0X66 BLOCK Write Block Data BCC ETX

1 1 1 1 1 16 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is to write the data on the Card. The length of Write Data is always Block unit and 1 Block is composed of 16 Byte. The Read/Write commands are available only in the Block of Sector that is defined at

Page 6: Mifare APDU

Authentication 1 and Authentication 2 after that the operation of Authentication 1, Authentication 2 is completed.

3-10. Write-E2 Command

Host STX Bit_Len_high Bit_Len_low 0X67 E2 Start Address Data BCC ETX

1 1 1 1 1 6 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 It is to write the Key or data on the EEPROM inside of the Card Reader. As the Key coming from outside could be flowed out, it prevent the Key from the out-flowing by means of writing the Key on the EEPROM inside of the Card Reader. The Block Address is to be written so as to be located with the Key of the Card on the basis of 6 Byte internally.

3-11. AuthenticationE2 Command

Host STX Bit_Len_high Bit_Len_low 0X68 Key Type E2 Start Address

1 1 1 1 1 1 Authentication Block BCC ETX

1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 Authentication E2 Command can operate the Authentication 1 without out-flowing of the data to outside using the internal EEPROM of the Card Reader. Using the EEPROM Key Buffer structure as mentioned above, it can be stored in production or before outgoing. Also if necessary, it can be modified to the goods under operation Key_Type (00H : Authentication1A, 01H : Authentication1B) Note : WriteE2 or AuthenticationE2 Command supports Mifare® standard card key format

3-12. Increment & Transfer Command (based on Mifare® standard card)

Host STX Bit_Len_high Bit_Len_low 0X69 Block Transfer Address

1 1 1 1 1 1 Increment Value BCC ETX

4 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1

Mifare® supports the function of Debit(Value) card and it enables us to do e-payment. It is used as the command for increment or decrement of fixed value with 4byte of value byte in case of Mifare®. BLOCK structure

B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 VALUE ~VALUE VALUE ADR ~ADR ADR ~ADR

Page 7: Mifare APDU

Note) when using it as Debit(value) card, it is necessary to define the trailer access byte as

value block in every sector. PICC Data maximum bytes: 32bytes Increment Value: 4byte value for increment Transfer_Address: transfer the value of card data register to the memory area of the card.

3-13. Decrement & Transfer Command (based on Mifare® standard card)

Host STX Bit_Len_high Bit_Len_low 0X6A Block Transfer Address

1 1 1 1 1 1 Decrement Value BCC ETX

4 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1

Mifare® supports the function of Debit(Value) card and it enables us to do e-payment. It is used as the command for increment or decrement of fixed value with 4byte of value byte in case of Mifare®. BLOCK structure

B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 VALUE ~VALUE VALUE ADR ~ADR ADR ~ADR

Note) when using it as Debit(value) card, it is necessary to define the trailer access byte as

value block in every sector. PICC Data maximum bytes: 32bytes Increment Value: 4byte value for increment Transfer_Address: transfer the value of card data register to the memory area of the card. Decrement_Value: as the 4byte value, it is for the processing with the value of PICC value block.

3-14. Restore Command (based on Mifare® standard card)

Host STX Bit_Len_high Bit_Len_low 0X6B Block BCC ETX

1 1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 Read the contents of block into the communication port PICC Data maximum bytes: 32bytes

Restore the processing result of PICC or the value of value block to the data register of PICC.

Command Review

Command Description Increment Increments the contents of a Block and stores the result in the

Internal data register Decrement Decrements the contents of a Block and stores the result in the

Internal data register Transfer Writes the contents of the internal Data register to a block

Page 8: Mifare APDU

Restore Read the contents of block into the internal data register 3-15. Read Sector

Host STX Bit_Len_high Bit_Len_low 0X6C Sector BCC ETX

1 1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Statu

s Secter Read Data BCC ETX

1 1 1 1 64 1 1 Read the data of PICC as the unit of sector. Sector is based on the sector of Mifare®. 1 sector is composed of 64byte. The sector that can be read by Read sector command means the sector that included the address of block defined when Authentication-1.

4. Reference 4-1. Card Reader (PCD) Operating Procedure(Mifare®) CASE 1

1. Configuration Command send 2. RF Field Control Command send 3. Request A & Anti-Collision/Select Command send 4. In case Status and .ATQA , UID , SAK confirmation ERROR, retry from No. 2 5. In case Authentication1A , Authentication1B , AuthenticationE2 Command ERROR, retry

from No. 2 6. In case Authentication2 Command Error, retry from No. 2 7. Read/Write/Increment & transfer /Decrement & transfer/Restore operation 8. In case Halt Command send, operate from No. 3, operation repeatedly

4-2. Mifare® Standard Card Structure The capacity of Mifare® Standard Card is 1 Kbytes and it is composed of Block structure. 1 Block is composed of 16 Byte. 4 Block is 1 Sector. The high-ranking Block 16 Byte in each

Sector is composed of the Trailer consisting of the Sector characteristic. Each Trailer has the Key-A, Key-B(Option) & Access Byte and each Sector can be accessed by the authorized Key.

The Block 0 in Sector 0 is read only block and stores the manufacturing data of the Card. Ex) Sector 0 is composed of Block 0, Block 1, Block2 & Block3 and Block 3 is Trailer Block.

4-3. EEPROM Key Buffer structure This structure is composed of the Block structure of 6 Byte and available for write only. The Address of EEPROM Key Buffer is optional to set by the User, but the data that would be

written at EEPROM Key Buffer should be 6 Byte always. This structure is for easy data writing as the structure of Key-A and Key-B on the Card is composed of 6 Byte. Also, that’s because the Key location should be setting by User’s own right.

The capacity of Key Buffer is 192 Byte and can store maximum 16th Key-A, Key-B considering the Key-A, Key-B with 6 Byte of the Key. It means that it can store all the Key of Mifare® Standard Card. EEPADDR can be defined from 00H to 1FH 4-4. PICC INCREMENT/DECRMENT 4-4-1. VALUE BLOCK definition

- Write the value of 16byte to the block that is willing to use as VALUE BLOCK according to the block format as described below.

BLOCK structure B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15

Page 9: Mifare APDU

VALUE ~VALUE VALUE ADR ~ADR ADR ~ADR The value is 4byte value with the amount of value stored to the VALUE BLOCK at the first time, it should be stored three(3) times by inversion or non-inversion. The ADR should be equal to BLOCK ADDRESS and it should be stored four(4) times with the inverted or non-inverted value. Transfer ADR indicates the BLOCK ADDRESS that result of the processing is to be moved, after completion of INC/DEC command.(Refer to 4-4-2.).

- Write the trailer of sector that is included designated BLOCK by VALUE BLOCK. - In this moment, the value of SECTOR TRAILER refers to the specification of Mifare®

Standard Card in MF1 IC S50.

Note) The Key-B of SECTOR TRAILER should be set not to be read when SECTOR TRAILER READ.

- Operates INCREMENT/DECREMENT. 4-4-2. VALUE BLOCK structure

VALUE BLOCK

SECTOR TRAILER

SECTOR2~15

INC/DEC BLOCK0VALUE4BYTE

SECTOR0

SECTOR1SECTOR1

BLOCK6

PRODUCT BLOCKSECTOR0BLOCK1

SECTOR1

TRANSFERTEMP REGISTER

BLOCK2

BLOCK5BLOCK4

BLOCK7

BLOCK3

INC/DEC

SECTOR0SECTOR0

RESTORE

SECTOR TRAILER

SECTOR1

4-5. Abbreviation

UID : Unique identification PICC : Proximity integrated chip card CT : Cascade Tag SAK : Select acknowledged PCD : Proximity coupling device MFin : Mifare® input ATQ : Answer to request REQA : Request type A MFout: Mifare® output RFU : Reserved for future use REQB: Request type B BLK : Block

5. Type A 5-1. Configuration Command

Host STX Bit_Len_high Bit_Len_low 0X61 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1

Page 10: Mifare APDU

The operating is available after initializing of the circuit of RF driver/receiver in the reader/writer.

5-2. Request A & anti-collision/select (Ready state)

Host STX Bit_Len_high Bit_Len_low 0X30 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status ATQA UID SAK BCC ETX

1 1 1 1 2 4 1 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Processing sequence between Reader and card Note) In case that the multiple PICCs are in the RF field, the PCD is settled according to the Anti-collision sequence of ISO-14443. 5-3. Request A & anti-collision/select (Ready state)

Host STX Bit_Len_high Bit_Len_low 0X33 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status ATQA UID SAK BCC ETX

1 1 1 1 2 4 1 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Processing sequence between Reader and card

Or

ISO-14443-3

PCD

PICC ATQA 2bytes UID 4Bytes SAK 1Bytes

REQA Anti-collision SELECT

Or

ISO-14443-3

PCD

PICC ATQA 2bytes UID 4Bytes SAK 1Bytes

WUPA Anti-collision SELECT

Page 11: Mifare APDU

FSDI

Note) In case that the multiple PICCs are in the RF field, the PCD is settled according to the Anti-collision sequence of ISO-14443. 5-4. Halt Command

Host STX Bit_Len_high Bit_Len_low 0X39 BCC ETX

1 1 1 1 1 1 Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 This command is to halt the function of the Card Among the multiple cards, it is to be used to halt the function of the Card that is under currently operating for the purpose of reading of another card. Also it is to be used in case that the operating of Card is completed.

5-5. Active PICC 5-5-1. Request for answer to select (RATS) command

Host STX Bit_Len_high Bit_Len_low 0X31 RATS (0XE0) Parameter BCC ETX

1 1 1 1 1 1 1 1 Response

STX Bit_Len_high Bit_Len_low Status ATS BCC ETX 1 1 1 1 Ref. ISO-14443-4 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 RATS Command is composed of Start byte and Parameter byte and includes Error check code CRC-A. Start byte: 0XE0 Parameter: FSDI+CID

D8 D7 D6 D5 D4 D3 D2 D1 *ATS(Answer to select) : refer to the ISO-14443 standard.

5-5-2. Protocol and Parameter Selection Request Host

STX Bit_Len_high Bit_Len_low 0X31 PPSS PPS0 PPS1 BCC ETX 1 1 1 1 1 1 1 1 1

Response STX Bit_Len_high Bit_Len_low Status PPSS BCC ETX

1 1 1 1 1 1 1

Or

CID (Card identification)

Page 12: Mifare APDU

STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 PPSS

D8 D7 D6 D5 D4 D3 D2 D1 1 1 0 1

CID Shall be set to 1, 0 is RFU

Shall be set to 0, 1 is RFU

Shall be set to (11), all other values are RFU PPS0

D8 D7 D6 D5 D4 D3 D2 D1 0 0 0 0 0 0 1

Shall be set to 1, 0 is RFU

Shall be set to (000), all other values are RFU PPS1 Transmitted, if bit is set to 1 Shall be set to (000), all other values are RFU

PPS1

D8 D7 D6 D5 D4 D3 D2 D1 0 0 0 0

DRI

DSI Shall be set to (0000), all other values are RFU

5-5-3. Active commands

- Half duplex block transmission format

Prologue field Information field Epilogue field PCB CID NAD INF EDC 1byte 1byte 1byte 2byte

Host STX Bit_Len_high Bit_Len_low 0X31 PCB CID NAD INF BCC ETX

1 1 1 1 1 1 1 Ref. ISO-14443-4,5 1 1 Response

STX Bit_Len_high Bit_Len_low Status Data BCC ETX 1 1 1 1 Ref. ISO-14443-4,5 1 1

Error detect codeFSD/FSC

Or

Page 13: Mifare APDU

STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1

Coding of I-block PCB D8 D7 D6 D5 D4 D3 D2 D1 0 0 0

Block of number

Shall be set to 1 NAD following, if bit is set to 1

CID following, if bit is set to 1 Chaining, if bit is set to 1 Shall be set to 0, 1 is RFU I-Block Coding of R-block PCB

D8 D7 D6 D5 D4 D3 D2 D1 1 0 1 0 0 1

Block of number

Shall be set to 1, 0 is RFU

Shall be set to 0

CID following, if bit is set to 1 ACK if bit is set to 0 NAK, if bit is set to 1 Shall be set to 0, 1 is RFU R-Block Coding of S-block PCB

D8 D7 D6 D5 D4 D3 D2 D1 1 1 0 1 0

Shall be set to 0, 1 is RFU

Shall be set to 1, 0 is RFU Shall be set to 0

CID following, if bit is set to 1

(00) DESELECT or

(11) WTX S-Block

Or

Page 14: Mifare APDU

Coding of card identifier D8 D7 D6 D5 D4 D3 D2 D1

0 0 CID

Shall be set to (00), all other values are RFU

Power level indication CRC-A is transmitted to the Host in the Receive data frame CRC-A is transmitted together with the data when the calculated result inside Reader is equal to the received value. If it is not equal to the received value, CRC Error code is generated at Status byte and the data is not transmitted. CRC-A is not included in the Transmit data frame. Calculation of CRC-A is settled inside Reader and CRC-A is included in the data when transmitting to the PICC. 5-5-4. Type-A Dummy command Host

STX Bit_Len_high Bit_Len_low 0X32 Data BCC ETX 1 1 1 1 N Bytes 1 1

Response STX Bit_Len_high Bit_Len_low Status Data BCC ETX

1 1 1 1 N Bytes 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

No calculation of CRC or BCC related to PICC inside Reader. Calculation of CRC and BCC should be done separately with the information on the data field.

Or

Page 15: Mifare APDU

6. TYPE B 6-1. Type-B Setting Host

STX Bit_Len_high Bit_Len_low 0X22 SOF_LOW SOF_HIGH EOF EGT BCC ETX 1 1 1 1 1 1 1 1 1 1

Response STX Bit_Len_high Bit_Len_low Status BCC ETX

1 1 1 1 1 1 Type-B Setting command is set up by the transmission protocol stipulated to the ISO-14443-B. When the PCD is power ON, the PCD is as follows. SOF_ LOW: 11(0X0B) SOF_HIGH=3(0X03) EGT : 2(0X02) EOF=10(0X0A)

START LSB MSB STOP ≥10ETU,≤11ETU ≥2,≤3 ETU 10ETU 2ETU ≥10ETU,≤11ETU 11ETU 2ETU 2ETU 11ETU SOF_LOW SOF_HIGH EGT EOF SOF 1ETU=(1/fc)*128=9.438usec Note: 0X01≤SOF_LOW≤0X0F, 0X01≤SOF_HIGH≤0X0F, 0X01≤EOF≤0X0F, 0X01≤EGT≤0X0F 6-2. Type-B Active1 command 6-2-1. Request B Command Host

STX Bit_Len_high Bit_Len_low 0x41 Apf AFI Parameter BCC ETX 1 1 1 1 1 1 1(Ref. ISO-14443-3) 1 1

Response STX Bit_Len_high Bit_Len_low Status ATQB BCC ETX

1 1 1 1 14(Ref. ISO-14443-3) 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Request B command frame format

Or

9ETU10ETU

Page 16: Mifare APDU

1st byte 2nd byte 3rd byte 4th , 5th bytes APf AFI PARAM (Parameter) CRC_B

In case of Type B PICC, PICC is set to Active State through Attrib command after PICC request. The procedure of Request command can be done by the transmission of the code of APf, AFI, Parameter, etc in the data frame to the Reader. Anti-collision prefix byte APf is 05H(0000 0101) b AFI Coding

AFI Most signification

Half byte

AFI Least signification

Half byte

Meaning PICCs respond from

Examples/note

‘0’ ‘0’ All families and sub-families

No application preselection

X ‘0’ All sub-families of families X

Wide application preseletion

X Y Only the Yth sub-families Y only

‘0’ Y Proprietary sub-family Y only

‘1’ ‘0’.Y Transport Mass transit, Bus, Airline ‘2’ ‘0’,Y Financial IEP,Banking, retail ‘3’ ‘0’,Y Identification Access control ‘4’ ‘0’,Y Telecommunication Public telephony, GSM ‘5’ ‘0’,Y Medical ‘6’ ‘0’,Y Multimedia Internet service.. ‘7’ ‘0’,Y Gaming ‘8’ ‘0’,Y Data storage Portable files

‘9’-F ‘0’,Y RFU Note : X=’1’ to Y=’1’ to ‘F’ Coding parameter

B8 B7 B6 B5 B4 B3 B2 B1 RFU REQB/WUPB N(Number of slots)

All RFU bits shall be set to 0 B4=0 defines REQB: PICCs in idle state or ready state shall process this command B4=1 defines WUPS: PICCs in idle state or ready state or HALT state shall process this command B1, B2 and B3 are used to code the number of slot N according to table

B3 B2 B1 N 0 0 0 1=2^0 0 0 1 2=2^1 0 1 0 4=2^2 0 1 1 8=2^3 1 0 0 16=2^4 1 0 1 RFU 1 1 X RFU

ATQB Response is ATQB 12bytes + CRC-B 2bytes ATQB Response format

1st 2nd,3rd,4th,5th 6TH,7TH ,8TH,9TH 10th,11th,12th 13th,14th 50H Identifier 4bytes(PUPI) Application data 4bytes Protocol info CRC_B 2bytes

Page 17: Mifare APDU

6-2-2. Slot marker Command Host

STX Bit_Len_high Bit_Len_low 0x41 Slot marker BCC ETX 1 1 1 1 1(Ref. ISO-14443-3) 1 1

Response STX Bit_Len_high Bit_Len_low Status ATQB BCC ETX

1 1 1 1 14(Ref. ISO-14443-3) 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

1ST byte 2nd,3rd bytes

APn CRC_B Apn = (nnnn 0101)b nnnn+1= slot number ATQB Response is ATQB 12bytes + CRC-B 2bytes ATQB Response format

1st 2nd,3rd,4th,5th 6 th,7 th,8 th,9 th 10th,11 th,12th 13th,14th 50H Identifier 4bytes(PUPI) Application data 4bytes Protocol info CRC_B 2bytes

6-2-3. Attrib PICC Host

STX Bit_Len_high Bit_Len_low 0x41 ATTRIB BCC ETX 1 1 1 1 Ref. ISO-14443-3 1 1

Response STX Bit_Len_high Bit_Len_low Status ATTRIB Response BCC ETX

1 1 1 1 Ref. ISO-14443-3 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

Attrib PICC frame format

1st 2nd,3rd,4th,5th 6th 7th 8th 9th 10th …… 1DH Identifier

4bytes Param1 1byte

Param2 1byte

Param3 1byte

Param4 1byte

High layer INF

CRC_B 2bytes

Identifier This identifier is the value if the PUPI sent by the PICC in the ATQB Param4

B8 B7 B6 B5 B4 B3 B2 B1 Minimum TR0 Minimum TR1 EOF SOF RFU

Param2

B8 B7 B6 B5 B4 B3 B2 B1 0 0 0 0 Maximum frame size(byte)

Maximum frame size code

in ATTRIB 0 1 2 3 4 5 6 7 8 9~F

B8 B7 Minimum TR0 0 0 Default value 0 1 48/Fs 1 0 16/Fs 1 1 RFU

B6 B5 Minimum TR1 0 0 Default value 0 1 64/Fs 1 0 16/Fs 1 1 RFU

B3 SOF requires 0 Yes 1 No

Or

B4 EOF requires 0 Yes 1 No

Or

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Maximum frame size(byte) 16 24 32 40 48 64 96 128 256 256

B6 B5 Meaning 0 0 PCD to PICC, 1ETU=128/Fc, bit rate is 106kbps 0 1 PCD to PICC, 1ETU=64/Fc, bit rate is 212kbps 1 0 PCD to PICC, 1ETU=32/Fc, bit rate is 424kbps 1 1 PCD to PICC, 1ETU=16/Fc, bit rate is 847kbps

B8 B7 Meaning 0 0 PICC to PCD, 1ETU=128/Fc, bit rate is 106kbps 0 1 PICC to PCD, 1ETU=64/Fc, bit rate is 212kbps 1 0 PICC to PCD, 1ETU=32/Fc, bit rate is 424kbps 1 1 PICC to PICD, 1ETU=16/Fc, bit rate is 847kbps

Param3 B4=B3=B2=0, B1=1 then PICC compliant with ISO/IEC14443-4 B4=B3=B2=B1=0 then PICC not compliant with ISO/IEC14443-4 B8=B7=B6=B5=0 Param4

B8 B7 B6 B5 B4 B3 B2 B1 0 0 0 0 CID(Card identification)

B4=B3=B2=B1=1 then RFU Answer to attrib command

1st 2nd …. bytes CRC-B MBLI CID Higher layer response

6-2-4. HLTB Command & answer Host

STX Bit_Len_high Bit_Len_low 0x41 HLTB Cmd(0x50) PUPI BCC ETX 1 1 1 1 1 4 1 1

Response STX Bit_Len_high Bit_Len_low Status HLTB Response BCC ETX

1 1 1 1 1 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX 1 1 1 1 1 1

HLTB Command

1st byte 2nd,r3d,4th,5th bytes 6th,7th bytes 50H Identifier (4bytes) PUPI CRC-B

Answer 1st byte 2nd,3rd bytes

00 CRC-B 2bytes

Or

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6-2-5. Active command Half duplex block transmission format

Prologue field Information field Epilogue field PCB CID NAD INF EDC 1byte 1byte 1byte 2byte

6-2-5-1. Type-B Active command Host

STX Bit_Len_high Bit_Len_low 0X41 PCB CID NAD INF BCC ETX 1 1 1 1 1 1 1 Ref. ISO-14443-4 1 1

Response STX Bit_Len_high Bit_Len_low Status Response BCC ETX

1 1 1 1 N (Ref. ISO-14443-4) 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX 1 1 1 1 1 1

CRC-B is transmitted to the Host in the Receive data frame CRC-B is transmitted together with the data when the calculated result inside Reader is equal to the received value. If it is not equal to the received value, CRC Error code is generated at Status byte and the data is not transmitted. CRC-B is not included in the Transmit data frame. Calculation of CRC-B is settled inside Reader and CRC-A is included in the data when transmitting to the PICC. 6-2-5-2. Type-B Dummy Send command Host

STX Bit_Len_high Bit_Len_low 0X42 Data BCC ETX 1 1 1 Dummy data 1 1

Response STX Bit_Len_high Bit_Len_low Status Data BCC ETX

1 1 1 1 Response 1 1

STX Bit_Len_high Bit_Len_low Status BCC ETX1 1 1 1 1 1

7. Dimension

Error detect codeFSD/FSC

Or

Or

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7-1 7-1-1. Connection

Pin number Description Remark 1 VCC 5VDC 2 GND 3 TXD 4 RXD 5 GND

7-2.

7-2-1. Connector

Pin number Description Pin number Description

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1 VCC (5~3VDC) 11 NC 2 GND 12 NC 3 RESET (OUTPUT) 13 NC 4 RF Clock 13.56㎒(OUTPUT 14 ANT-GND

5 RFU 15 ANT-GND 6 RFU 16 ANT-DRV 7 RFU 17 GND 8 TXD 18 NC 9 RXD 19 NC

10 NC 20 NC 7-3.

7-3-1. Connector Description Pin number Description Pin number Description

1 VCC(5~3VDC) 11 NC 2 GND 12 NC 3 RESET (OUTPUT) 13 NC 4 RF Clock 13.56㎒(OUTPUT) 14 ANT-GND

5 RFU 15 ANT-GND 6 RFU 16 ANT-DRV 7 RFU 17 GND 8 TXD 18 NC 9 RXD 19 NC

10 NC 20 NC

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8. Application circuit diagram (Based) 8-1. Application1