mitra dsp future

7/27/2019 Mitra DSP Future

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Digital Signal Processing:Digital Signal Processing:Road to the FutureRoad to the Future

Professor Sanjit K. MitraUniversity of Southern California, Los Angelesand

University of California, Santa Barbara


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Digital Signal ProcessingDigital Signal Processing

Digital Signal Processing (DSP) Roots in 17-th and 18-th century

mathematics

An important modern tool in a multitude offields of science and technology


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Digital Signal ProcessingDigital Signal Processing

Techniques and Applications of DSP As old as Newton and Gauss

circuits

What is digital signal processing?

It is concerned with the representation ofsignals as numbers and processing ofthese sequences


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Purpose of ProcessingPurpose of Processing To estimate characteristic parameters

of signals To transform a signal into a more

desirable form

Classical numerical analysis formulas,such as those designed for

interpolation, integration, anddifferentiation, are certainly DSPalgorithms


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Purpose of ProcessingPurpose of Processing

Availability of high-speed digitalcomputers has fostered development ofincreasin l com lex and so histicated

signal processing algorithms

Advances in VLSI technology have

made possible economicalimplementations of very complex digitalsignal processing algorithms


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Advantages of DSPAdvantages of DSP

Absence of drift in the filtercharacteristics

Pr in h r ri i r fix . .

by binary coefficients stored in memories

Thus, they are independent of the externalenvironment and of parameters such as

temperature

Aging has no effect


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Advantages of DSPAdvantages of DSP Improved quality level

Quality of processing limited only byeconomic considerations

desired quality by increasing the number ofbits in data/coefficient representation

An increase of 1 bit in the representationresults in a 6 dB improvement in the SNR


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Reproducibility Component tolerances do not affect

s stem erformance with correct o eration

No adjustments necessary duringfabrication

No realignment needed over lifetime ofequipment


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Ease of new function development Easy to develop and implement adaptive

filters, ro rammable filters and

complementary filters Illustrates flexibility of digital techniques


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Multiplexing Same equipment can be shared between

several si nals, with obvious financial

advantages for each function

Modularity

Uses standard digital circuits forimplementation


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Total single chip implementation usingVLSI technology


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Limitations of DSPLimitations of DSP

Lesser Reliability Digital systems are active devices, and

thus use more ower and are less reliable

Some compensation is obtained from thefacility for automatic supervision andmonitoring of digital systems


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Limitations of DSPLimitations of DSP Limited Frequency Range of Operation

Frequency range technologically limited tovalues corresponding to maximumcomputing capacities that can be

developed and exploited Additional Complexity in the Processing

of Analog Signals

A/D and D/A converters must beintroduced adding complexity to overallsystem


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DSP EvolutionDSP Evolution

Early days:

Computers primarily used in theimplementations of signal processing

Offered tremendous advantages inflexibility

Disadvantage: Processing could not always be done in

real-time


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Early work: Concerned with methods for programming

a di ital filter on a di ital com uter

Goal: Approximate an analog filter (A/D, filtering,

D/A)


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DSP algorithm development goal: Approximate or simulate analog signal

processing systems

Experimentation with sophisticated DSPalgorithms

Some new algorithms had no analogequivalents


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Examples of unique algorithms: Cepstrum analysis and homomorphic

filterin

Implementation of these algorithmsrequired precision and resolution not

available with analog circuits


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DSP EvolutionDSP Evolution Evolution of new view of DSP:

Accelerated by fast Fourier transform(FFT) algorithms developed in 1965

FFT reduced the computation time of

DFT by orders of magnitude Permitted implementation of

sophisticated signal processing

algorithms with processing times thatallowed interaction with the system


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DSP EvolutionDSP Evolution FFT algorithm:

Inherently a discrete-time concept Stimulated reformulation of many signal

rocessin conce ts and al orithms in

terms of discrete-time mathematics These techniques then formed an exact

set of relationships in the discrete-timedomain


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Typical New Algorithms: Adaptive digital filtering

Mixed analog/digital signal processing

Nonlinear digital signal processing


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Decades of DSPDecades of DSP

Decade Characteristic $/MIPS

60s University Curiosity $100 - $1,000 -

80s Commercial Success $1- $1090s Consumer Enabler 10 - $1Beyond Expected Part of Daily 1 - 10

Life

Courtesy: Texas Instruments


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Three Major Areas of DSPThree Major Areas of DSP

Algorithms Implementation

Applications


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DSP Performance TrendDSP Performance Trend

10,000

3,000

1,000

s

Trend

MACs

100

30

10

3

1

MegaMA

1982

1984

1986

1988

1990

1992

1994

1996

1998

2000

2002

2004

2006

2008

YearCourtesy: Texas Instruments


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DSP Price Finds NewDSP Price Finds NewApplicationsApplications

1000Military,Workstations, orImage

Processing

100

10

1

Time

Automotive orConsumer

Telecom orComputer



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DSP Performance EnablesDSP Performance EnablesNew ApplicationsNew Applications

Real-Time Imaging

Video Conferencing

MOPS

10K

Present DSP

Single-Chip DSP

Multi-Chip DSP

AnalogCellular

Motor Control

Noise Cancellation

Active Suspension

Multimedia

DSP Radio

Camera

Engine Control

HDTVVideo Phone

Digital CellularAudio

Robotics

AnsweringMachineHDD

3-D Graphics

Modem

EarlyDSP

1K

100

10

11980 1985 1990 1995 2000

CD Video

Settop

CordlessPhone Microcontroller



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DSP Drives CommunicationDSP Drives CommunicationEquipment TrendsEquipment Trends

GSMIS-54/136

Half Rate

60 MIPS

80-100 MIPS

CellularPhones

AMPS

40 MIPS

5 MIPS

V.3428.8K

V.32bis14.4K

V.329600

V.22bis2400

Modems

5 MIPS

15 MIPS

20 MIPS

30-40 MIPS

V.22300/1200

Year



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Programmable DSP MarketProgrammable DSP Marketby Applicationby Application

OfficeAutomation

0.65%

Military/Aero

4.59%

Consumer/Automotive

10.69%Industrial

3.31%Instrumentation

Source: Forward Concepts

Communications56.1%

.

Computer21.16%



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DSP Application ExamplesDSP Application Examples Acoustic Acquisition & Presentation

Signal Coding & Compression

Machine Synthesis of Signals

Cellular Phone

Discrete Multitone Transmission High Power RF Amplifier

Digital Camera

Digital Sound Synthesis

Digital Television

Software Radio


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Acoustic Acquisition &Acoustic Acquisition &

PresentationPresentationPurpose:

High quality, interference-free acquisitionand presentation of acoustic signals,

,

Technical Challenges: Control of echo, noise and reverberation

Localization of sound Representation and reconstruction of

acoustic field

Enhancement of signals


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Signal Coding & CompressionSignal Coding & Compression Purpose:

Efficient digital representation of audio or visualsignal for storage and transmission to providemaximum quality to the listener or viewer

Technology ChallengesDimensions

Low Bit Rate

Short Processing DelayLow Complexity & Cost

High Signal Quality and Robustness


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Signal Coding ApplicationsSignal Coding Applications

Audio Brid in &

Digital Telephony

Voice over IP;

Internet Telephony

Voice over ATM

Sound EntertainmentSystems

Teleconferencing

Digital Video & HDTV

Home Theater

Audio Storage &Programming

Digital AudioBroadcasting

Internet Music

1 2 4 8 16 32 64 128 1 2 8 32

Kbits/sec Mbits/sec

Quality

Conferencing

Audio/VideoConferencing

Network Telephony

Wireless & Messaging

Secure Voice

esLaboratoriBell:Courtesy


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Machine Synthesis of SignalsMachine Synthesis of Signals Purpose:

synthesis of intelligible, legible and natural signalsuch as speech, image, and video, given text,concept, or descriptive input

Natural sounding speech synthesis from unrestricted text

Message to speech; concept to speech

Personalization of synthetic speech; talker transformation

Text to image synthesis; virtual reality; image rendering

Text to video synthesis


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Speech/Speaker RecognitionSpeech/Speaker Recognition

TechnologyTechnologySpontaneous

Speech

FluentSpeech

digitstrings

wordspotting

name

2-waydialog

naturalconversation

networkagent &

intelligent

system drivendialog

transcription

Vocabulary Size

1990

2 20 200 2000 20000

ReadSpeech

ConnectedSpeech

IsolatedWords

19981980

voicecommands

speakerverification

directory

assistance

form fillby voice

dialing

officedictation

esLaboratoriBell:Courtesy


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Small

Cellular PhoneCellular Phone

1996 1997 1998 1999 2000 2006 2010

Digital Cellular Market

Units 48M 86M 153M 200M 300M 2B 4.6B AnalogBaseband

Digital Baseband

(DSP + MCU)

PowerManagement

Signal RF RF

sInstrumentTexas:Courtesy


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DSP Core

ne

RFInterface

AudioInterface

Receiver

Modulator Driver

PowerAmp

Synthesizer

Cellular Phone Block DiagramCellular Phone Block Diagram

S/W

ARM RISCCore

S/W

SINGLE CHIP

DIGITAL BASEBAND

ASICBackp

la

User Display

Keyboard

SIM Card

SpeakerSpeaker Mic

Op Amps

Switches

Regulators

RF

SECTION

Touch Screen



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100-200 MHz DSP +

Cellular Phone BasebandSystem on a Chip

MCU

ASIC Logic

Dense Memory Analog



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Discrete MultitoneDiscrete MultitoneTransmission (DMT)Transmission (DMT)

Core technology in the implementationof the asymmetric digital subscriber lineADSL and ver -hi h-rate di ital

subscriber line (VDSL) Closely related to: Orthogonal

frequency-division multiplexing (OFDM)


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ADSLADSL A local transmission system designed to

simultaneously support three serviceson a single twisted-wire pair: Data transmission downstream toward the

subscriber) at bit rates of upto 9 Mb/s Data transmission upstream (away from

the subscriber) at bit rates of upto 1 Mb/s

Plain old telephone service (POTS)


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ADSL

Band-allocations for an FDM-basedADSL system

Transmitpower

bandstream-down

rate-bitHigh

bandPOTS

bandGuard

band

upstream

rate-bitLow

Frequency


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ADSLADSL

Asymmetry in the frequency bandallocation:

to r ng mov es, te ev s on, v eo cata ogs,remote CD-ROMs, corporate LANs, andthe Internet into homes and smallbusinesses


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VDSLVDSL Optical network emanating from twisted

pair provides data rates of 13 to 26Mb/s downstream and 2 to 3 Mb/s

about 1 km Allows the delivery of digital TV, super-

fast Web surfing and file transfer, andvirtual offices at home


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VDSLVDSL

Major problem: The mitigation of the polarization mode

dis ersion im airment of the o tical fiber

Possible solution: A decision-feedback equalizer

implemented using DSP methods

Discrete MultitoneDiscrete Multitone


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Discrete MultitoneDiscrete Multitone

TransmissionTransmission Block diagram

inputdata

Binary

xerDemultiple rMultiplexe

inputdata

binaryoriginal

theofEstimate

filter

tionReconstruc

filter

aliasing-Anti

encoder

IDFT

converter

serial-to-Parallel

converterD/A

converterA/D

Channel

converter

parallel-to-Serial

DFT

Decoder

filter

tionReconstruc

filter

aliasing-Anti


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Discrete MultitoneDiscrete MultitoneTransmissionTransmission

Advantages in using DMT for ADSL andVDSL

Th ili m ximiz h r n mi i

rate Adaptivity to changing line conditions

Reduced sensitivity to line conditions


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OFDMOFDM

Applications:

Wireless communications - an effectivetechnique to combat multipath fading

Digital audio broadcasting Uses a fixed number of bits per

subchannel while DMT uses loading for

bit allocation


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OFDMOFDM

Basic differences with DMT architecture Signal constellation encoder does not

include a loadin al orithm for bit allocation

In the transmitter, an upconverter includedafter the D/A converter to translate thetransmitted frequency

In the receiver, a downconverter includedbefore the A/D converter to undo thefrequency translation

Hi h P RF A lifiHi h P RF A lifi


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High Power RF AmplifierHigh Power RF AmplifierTechnologyTechnology

High power RF amplifiers significantpart of cellular and PCS basestations

50% of base station costs Large % of base station power

nCorporatioFujant:Courtesy



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High Power RF AmplifierHigh Power RF AmplifierTechnologyTechnology

Industry driven to improve linearityand efficiency

waveforms requires linear high poweramplifier

Efficient DC to RF conversion

efficiency reduces base stationoperating costs




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High Power RF AmplifierHigh Power RF AmplifierTechnologyTechnology Performance drivers and

requirements Linearity specified in terms of

52 dB for CDMA 71 dB for GSM

Efficiency

Beat current 3 to 5 % efficiency of currenthigh power amplifier

Target to achieve greater than 10%


High Power RF AmplifierHigh Power RF Amplifier


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High Power RF AmplifierHigh Power RF Amplifier

TechnologyTechnology Todays amplifiers employ analog

processing New application area for DSP

vance a gor ms ena eamplifiers to operate in the nonlinearregion

Greater power efficiency withoutsignificant distortion of the transmittedcommunication signal


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Amplitude Reconstruction orLINC Amplifier

LINC Amplifier ConceptLINC Amplifier Concept

Pre-DistortionDriver

HPASaturated

Modulator

SignaltionReconstruc



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Basic Idea Input signal decomposed into two constantamplitude waveforms

LINC channel signals amplified constantamplitude waveforms

LINC channel signals recombined to reconstructoriginal input waveform



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Features

Eliminates requirement for quasi-linear amplifiersand costly inefficient linearization techniques

Allows use of efficient saturated amplifiers


- Class B, AB

- Class C/D/E

Digital technology addresses shortcomings ofprevious development attempts

- Linearity- Precision- Dynamic range

- Channel balance


Typical LINC AmplifierTypical LINC Amplifier


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Typical LINC AmplifierTypical LINC AmplifierSubsystemsSubsystems

C C

Low Power RF Subsystem

High Power RF SubsystemDigitalSubsystem

DownConverter

DownConverter

Real

TimeDigital

Processor

DSP

UpConverter

UpConverter

HPA

HPA

Combiner

&Load

C C

OutputSignal

InputSignal

Feedback Signal


Typical LINC AmplifierTypical LINC Amplifier


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Typical LINC AmplifierTypical LINC AmplifierSubsystemsSubsystems Low Power RF Subsystem

Input and Feedback Down Converters Dual Output Channel Up Conversions

Course Gain Control

Digital Subsystem Continuous Real Time Digital Signal Processing

Off Line DSP based Host Control, Monitor, Interface, andCalibration Software Algorithms

High Power Subsystem Dual Channel Output RF Power Stages

Four Port High Power Output Combiner

RF Signal Feedback Tap and Status Monitor Circuits


Digital TV LSI SystemDigital TV LSI System


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Digital TV LSI SystemDigital TV LSI System

MPU RAM HDD

Digital IF

IEEE13948 PSK

Satellite

128 M

MPEG2

Audio/Video

(HDTV)

Graphic

Processor

128 M

DisplayOFDM

QAM

Terrestrial

Cable

nCorporatioToshiba:Courtesy


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Digital TV LSI SystemDigital TV LSI SystemMPEG2(MP@ML) Decoder

MPU

Software OrientedHardware oriented

DSP

Custom LSI

0.7W

3W



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LSI Performance ProgressLSI Performance Progress

OPS

10G

MPEG1

MPEG2

HD-MPEG2

MPEG2 Encoder

1990 1995 2000

10

100

Operation

A

B

C

A: Custom LSI

B: DSP

C: MPU



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Media Processor

InstructionDecoder

Instruction

Harvard Architecture

ALU ALU

ALU

Memory

Von Neumann Architecture

Digital SetDigital Set TopTop Box MPEG LSIBox MPEG LSI


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Digital SetDigital Set--TopTop--Box MPEG LSIBox MPEG LSIMulti-Processor +Engine

Host

MPUTS

Process

Audio

DSPI/O

Processor

Logic

SDRAM

SDRAM

VideoProc.

MPEGDecoder

GraphicProcessor


Trends in Video ProcessorTrends in Video Processor


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Trends in Video ProcessorTrends in Video Processor

Hardware:RISC Processor+Hardware engine

Software:OS independent

Verification:Hardware Simulator CAD:

Design tool, EngineeringWorkstation network



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Digital CameraDigital Camera CMOS Imaging Sensor

Increasingly being used in digital cameras Single chip integration of sensor and other

generate final image Can be manufactured at low cost

Less expensive cameras use single sensor

with individual pixels in the sensor coveredwith either a red, a green, or a blue opticalfilter


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Digital CameraDigital Camera

Image Processing Algorithms Bad pixel detection and masking

Color balancing Contrast enhancement

False color detection and masking

Image and video compression


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Digital CameraDigital Camera Bad Pixel Detection and Masking


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Digital CameraDigital Camera Color Interpolation and Balancing


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Digital Sound SynthesisDigital Sound Synthesis

Four methods for the synthesis ofmusical sound:

W v l n h i

Spectral Synthesis Nonlinear Synthesis

Synthesis by Physical Modeling


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Wavetable Synthesis

- Recorded or synthesized musical eventsstored in internal memor and la ed back on

demand- Playback tools consists of varioustechniques for sound variation during

reproduction such as pitch shifting, looping,enveloping and filtering

- Example: Giga Sampler



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Digital Sound SynthesisDigital Sound Synthesis Spectral Synthesis

- Produces sounds from frequency domain

models- Signal represented as a superposition of

- Practical implementation usually consist of acombination of additive synthesis,subtractive synthesis and granular

synthesis- Example: Kawaii K500 Demo


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Nonlinear Synthesis

- Frequency modulation method: Time-

de endent hase terms in the sinusoidal

basis functions- An inexpensive method frequently used in

synthesizers and in sound cards for PC

- Example: Variation modulation index

complex algorithm (Pulsar)



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Physical Modeling

- Models the sound production method- Physical description of the main vibrating

- Most methods based on wave equationdescribing the wave propagation in solids andin air

- Examples: (CCRMA, Stanford) Guitar with nylon strings

Marimba

Tenor saxophone


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Future Trends in DSPFuture Trends in DSP Defined by market trends

Defined by particular implementations ofspecific products

What products will dominate in thefuture?


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Future Trends in DSPFuture Trends in DSP Future products dominating the market:

Computers and cellular phones Difficult to separate between these two

Cellular phones will have computingpower

Computers will need mobility andmobile Internet access


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Future Trends in DSPFuture Trends in DSP What we need:

- Handsets with computing capabilities andmobile connection to the Internet

- Multimedia services instead of simple phonecalls

- Global mobility with multistandardcapabilities

- Flexibility of terminals, up to configurabilityin real time by the networks


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Future Trends in DSPFuture Trends in DSP Development and optimization

of algorithms for- audio and video compression

-

- adaptive/multimode modulations

- reconfigurable radio interface and adaptiveantenna

- real time software download in terminals

Software Radio


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Software RadioSoftware Radio

Aim

Build a flexible multiservice, multiband,multistandard radio s stem that isreconfigurable and reprogrammable bysoftware

Reconfigurability provided by the DSP

engine reprogrammability



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Two main goals must be met:

- Move the border between the analog anddigital worlds toward radio frequency (RF)

- Adopt analog-to-digital (A/D) and digital-to-analog (D/A) wideband converters as closeas possible to the antenna

- Replace ASICs with DSPs for baseband

signal processing to define as many radiofunctionalities as possible in software (SW)


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Replacement of ASIC technology withDSP technology enables

- W im l m n i n f n f n i n

such as coding, modulation, equalization, andpulse shaping

- reprogrammability of the system to

guarantee multistandard operation


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Software RadioSoftware Radio Hardware platform of a software radio

receiver engineComputeoutputDigital

RF/analog

end-front A/DD/A

(software)

DSP

rsAccelerato

outputAnalog

crystalmasterCommon


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The Digital Compute Engine- Certain DSP algorithms too demanding for-

solution- Such number-crunching functions arerealized by dedicated hardware called

accelerators


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Examples of Accelerators

- The digital down-conversion (DDC) of areceived si nal, erformed directl after theA/D conversion, and thus at a relatively highsample rate

- Other examples include Viterbi equalization,

despreading/spreading, digital filtering (athigh sample rates), digital down/up-conversion, etc.


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Unsolved ProblemsUnsolved Problems

Robust object extraction algorithm

- MPEG-4 core profile encoders ask for objectextraction from video

- Existing algorithms are not robust and workwell only under certain conditions

- Develop simplified and robust algorithm for

object extraction


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Co-channel signal separation forwireless communications

- in m l i l r h m

channel, signal processing algorithms areneeded to separate and demodulate the usersignals, preferably with low complexity andlow noise enhancement

- These techniques needed for both TDMAand CDMA signal formats


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Blind adaptive beamforming or space-time array processing

- A iv n nn r l f n llin

signals (inteferers) without the use of trainingor pilot signals

- They can be used in wireless

communications and for GPS (global positionsystem) applications


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Unsolved ProblemsUnsolved Problems Channel equalization

- Adaptive equalization has been applied towireline and wireless communication systemss nce s

- Current applications include next-generation multimedia wireless networks, aswell as cable and digital subscriber lines

(DSLs)


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Filter banks for source coding

Have been studied extensively in the past

-

especially involving nonstationary signalssuch as video and motion pictures

Compression is used in motion picture

signals in editing systems so that films canbe edited digitally without requiringmassive amounts of data storage


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DSP Chips for the FutureDSP Chips for the Future

Very low power consumption

High speed operation

Customizable processor

DSP chip with multiple integer and

floating-point MACs


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Reconfigurable ProcessorsReconfigurable Processors Reconfigurable MAC array with

embedded memory for high-speedprocessing for vision/video processing

by fairly well structured inner loops, thisapproach has the potential to combinethe flexibility of a conventionalprocessor with the efficiency of customhardware

C i bl PC i bl P


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Customizable ProcessorsCustomizable Processors

These processors are not fieldreconfigurable, but can be customizedb the s stem or SoC desi ner to

better meet the needs of the application Can be very effective for certain DSP

applications

DSP Chip with Multiple IntegerDSP Chip with Multiple Integer

d Fl id Fl i i MACi MAC


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and Floatingand Floating--point MACspoint MACs

Multiple ALUs allow simultaneousdispatch of many operations per clockc cle

Examples - Equator MAP and SunMAJC

These DSP chips are basically fast RISC

processors with DSP instructions added totheir general purpose instruction set

M j B ttl kM j B ttl k


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Major BottlenecksMajor Bottlenecks

High level language

Efficient compiler

Two Decades of DSPTwo Decades of DSP

I t tiI t ti


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IntegrationIntegration

50 mm

Typical

1982 DSP 50 mm

Typical

1992 DSP(99) 50 mm

Typical

2002 DSPDie size

5 MIPS

20 MHz

144 Words

1.5K Words

$150.00

250 mW/MIPS

50K Transistors

3" Wafer(75 mm)

. ....

40 MIPS (150)

80 MHz (300)

1K Words

4K Words

$15.00 ($5.00)

12.5 mW/MIPS (.1)

500K Transistors

6" Wafer(8")(150 mm)

.

2000 MIPS

500 MHz

16K Words

64K Words

$1.50

0.1 mW/MIPS

5M Transistors

12" Wafer(300 mm)

MIPS

MHz

RAM

ROM

Price

Power dissipation

Transistors

Wafer size


DSP Integration Through theDSP Integration Through the

YY


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50

1980

50

1990

50

2000

Die size (mm)

2010

50

Typical Device capabilities

YearsYears

3

520

256

$150.00

25050K

3"

0.8

4080

2K

$15.00

12.5500K

6"

0.1

5,0001,000

32K

$5.00

0.15M

12"

Technology (uM)

MIPSMHz

RAM (bytes)

Price

Power (mW/MIPS)Transistors

Wafer size

0.02

50K10,000

1M

$0.15

0.00150M

12"


Power Dissipation TrendsPower Dissipation Trends


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1,000

100

10

1

IPS

.

0.01

0.001

0.0001

0.00001

m

W/

1982

1984

1986

1988

1990

1992

1994

1996

1998

2000

2002

2004

2006

2008

Year


Mixed AnalogMixed Analog--Digital SignalDigital Signal

P iP i


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ProcessingProcessing

The Ebb and Flow of System Architecture

Analog - Interface to the world

-

Software - Adaptability with fast cycletime




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The most cost effective system

implementation

Analog Digital Software

Mixed Analog-Digital Signal

Processing


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Processing

Possible Future

A/D

Input

D/A

Output

10 to 40 PUs

PU = 1 Pentium = 5 Million Transistors




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Data Converters Key to System

ImplementationWi h nv r r i i l i n l

processing is not possible

12-bit 0.10 Ms/S

19 Rack Mount

1964 1974 1999

12-bit Monolithic 0.01 Ms/S

14-bit Monolithic 52 Ms/S

8-bit 0.7 Ms/S

8-bit Monolithic 0.03 Ms/S

Courtesy: National Semiconductor

HighHigh--Speed A/D ConverterSpeed A/D Converter

DesignDesign


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DesignDesign A possible architecture for a high-speedA/D converter is based on the QMF

bankA/D)(0 zH )(0 zGN N

Synthesis

A/D

A/D

M

)(1 zH

)(1 zGN

)(1 zG

N

N

N

N

Analysisfilters filters

Low-speedADC

Analog Digital

)(txa][ny

)(1 zHN

HighHigh--Speed A/D ConverterSpeed A/D ConverterDesignDesign


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DesignDesign

Analysis stage is an SC discrete-time network Synthesis stage is a digital network

The well-known time-interleaved A/D

converter is a special case whereand

kk zzH =)()1()( kNk zzG =

HighHigh--Speed A/D ConverterSpeed A/D ConverterDesignDesign


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DesignDesign

Due to absence of filtering, it exhibits aliasingunless the sub-converters are well matched

harmonic distortion due to mismatchesamong the sub-converters is substantiallyreduced

HighHigh--Speed A/D ConverterSpeed A/D Converter

DesignDesign


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DesignDesign

Jitter problem:

due to uneven sample timing, anothersource of error in time-interleaved A/Dconverter

reduced by the decimation stage in theQMF bank-based design

similar idea (called a two-rank architecture)used earlier

HighHigh--Speed Data ConverterSpeed Data Converter

DesignDesign


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DesignDesign Quantization noise and reconstruction

error spectrum: can be controlled in each band by

appropriately specifying the resolution oft e su -converters t roug out t e r

respective subbands QMF bank architecture can also be

used for the design of high-speed D/A

converter

DSP is impacting the way weDSP is impacting the way we


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. . .. . . Work: Computers, software, modems, cellular phones,

pagers, palm top computers, video phones Live: Medical electronics, security systems, robots,

Learn: Electronic learning, computers Keep information: HDD, CDs, DVD

Play: Games, internet, optimally designed equipment

Travel: Automatic Cruise Control, GPS, collisionavoidance

Socialize: Internet, personal computers, cellular phones

Future Device TrendsFuture Device Trends


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Future Device TrendsFuture Device Trends

Quantum-Dot Cellular Automata (QCA)

Nanotubes Quantum Computing

Evolvable Hardware (EHW)

QuantumQuantum--Dot CellularDot Cellular

AutomataAutomata


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AutomataAutomata A nano-structure-compatible

computation paradigm- rr f n m- llimplement logic functions

- A three-input majority logic gate based onQCA has been reported

- The majority gate can be programmed to actas an OR gate or an AND gate

Source: Science, 9 April 1999


AutomataAutomata


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AutomataAutomata

Information transfer procedure:- Use of currents, that is, transfer of chargen conven ona g a c rcu s

- By the propagation of a polarization statefrom one cell-like structure to the next inQCA (proposed in 1994)


AutomataAutomata


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AutomataAutomata Advantages:

- Offers a fast switching and low-powercomputing architecture

- , ,

down to the molecular scale Disadvantages:

- Current device only work at 0.1 K

( )- Smaller cells should allow an increase inthe temperature of operation

C15.273 o

Magnetic QuantumMagnetic Quantum--DotDot

Cellular AutomataCellular Automata


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Cellular AutomataCellular Automata A promising approach to quantum

computing

based on magnetic nanostructures Makes use of spintronic built on

classical ferromagnets

Science, 13 January 2006




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Cellular AutomataCellular Automata Magnetic QCA has been built from

simple, identical, bistable units

other solely by electromagnetic forces Thus, the signal processing function is

defined by the physical placement of the

building blocks




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Cellular AutomataCellular Automata The nanomagnets are arranged in two

intersecting lines

produces ferromagnetic ordering alongthe vertical line and antiferromagneticcoupling along the horizontal line




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Cellular AutomataCellular Automata The central nanomagnet is surrounded

by four others Three of the nei hbors can be used as

inputs driven by additional driver

nanomagnets oriented in the horizontaldirection, along the clock-field

The fourth neighbor to the right of thecentral magnet is the output




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Cellular AutomataCellular Automata The gate has been constructed so that

the ferromagnetic and antiferromagneticcoupling to the central dot have thesame s reng

Therefore it switches to the state towhich the majority of the inputs force it

The input logic combinations areobtained by varying driver nanomagnetpositions




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Cellular AutomataCellular Automata Logic state of central nanomagnet is

determined by the logical majority voteof its three nei hbors

Logic state of central nanomagnet iswritten inverted to output nanomagnetby antiferromagnetic coupling




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Ce u a uto ataCe u a uto ata The three-input majority gate can be

viewed as a programmable two-inputNAND or NOR ate de endin on thestate of any one of the three inputnanomagnets and accounting forinversion at the output nanomagnet

NanotubesNanotubes


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Carbon nanotubes discovered in 1991

Roughly one-billionth of a meter in

Five hundred times smaller than todaystransistors

Potential use in nanoelectronic devices

NanotubesNanotubes


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Field-Effect Transistor

- Based on a single carbon naontube- Consists of one single-wall carbon nanotubeconnec e o wo me a e ec ro es

- By applying a voltage to a crossing tube, thenanotube can be switched from a conductingto an insulating state

- Operates at room temperature

1998May7Nature,:Source

NanotubesNanotubes

What is needed?


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- An inexpensive approach for densely

packing nanotubes onto silicon wafers Basic difficulty

- When deposited onto a silicon substrate,

result is a dense tangle of bothsemiconducting nanotubes and metallicnanotubes

- To build devices, the metallic nanotubesneed to be eliminated and manipulate only

the semiconducting nanotubes

NanotubesNanotubes


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Promising approach

- Disperse a tangle of nanotubes on siliconand fabricate electrodes on to

- Using the electrodes switch off allsemiconducting tubes so that they cannotcarry a current

- Selectively shatter the metallic tubes byapplying a voltage

200127,AprilScience,:Source

NanotubesNanotubes

R t i l f t b


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Remove concentric layers of nanotubesthat are rolled up inside one another

By sculpting such rolls of tubes, it may be

possible to build transistors with desiredproperties

NanotubesNanotubes


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Approach used at IBM was to fabricate

a large number of nanotube transistorson a chi

NanotubesNanotubes

Figure below shows a regular array of


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source, gate and drain contacts,

randomly deposited on a siliconsubstrate

2001JuneSpectrum,IEEE:Source

NanotubesNanotubes Electron micrograph enlargement of the

i h h b l


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section at the array center shown below

A branch-like nanotube can be seenrunning from source to drain

2001JuneSpectrum,IEEE:Source

NanotubesNanotubes


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A single electron transistor (SET)

comprises a small island of discreteener levels a uantun dot or amolecular structure) connected tometallic leads by tunnel junctions

A room temperature SET has been

reported20016,JulyScience,:Source

NanotubesNanotubes

A scanning probe was used to form


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A scanning probe was used to formkinks in a metallic carbon nanotube intwo places to create the island

Quantum ComputingQuantum Computing


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Process information at the scale of

individual atoms and photons

information - the bits - into quanta ofenergy and angular momentum

Information processed by transforming

the physical quanta


Quantum systems such as photons and


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y pelectrons can occupy several places at

once Quantum bits ubits can therefore

register 0 and 1 at the same time

Quantum computing exploits thisquantum weirdness to perform manycomputations at the same time

Phenomenon called quantumparallelism



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Usually performed by taking quantum

systems such as atoms or molecules,and addressin them withelectromagnetic waves

Zapping quantum systems with lasersor microwaves is a highly effective way

of performing elementary quantum logicoperations

Evolvable HardwareEvolvable Hardware


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Evolve and learn to improve itself using

trial-and-error experiences

different possibilities Continually crops and refines its search

algorithm

Selects the best each time and tries that

Does all this on its own accord



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Requires reconfigurable hardware

Trick lies in creating a device that

structural adaptation at the correct time Makes use of genetic algorithm

invented about 30 years ago

EHW Design StepsEHW Design Steps

Generate a set of random blueprintshi h d b


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which are used, one by one, to

configure the device

tested to see how well it carries out therequired task

Highest-scoring designs are retained as

guidelines (parents) for newgeneration of designs

EHW Design StepsEHW Design Steps

The offspring designs are created byi i f h


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swapping portions of the parents

blueprints with one another, or makingsome random chan es

The marginally improved population ofdesigns then undergoes further testing

Cycle repeats itself until the device

achieves an optimal level ofperformance


E i i l i h bl i


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Entire genetic algorithm - blueprint

creation, fitness evaluation andreconfi uration - can be containedwithin a single microchip

Run thousands of evolutionary trials in afraction of a second


Genetic algorithms originally have been


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Genetic algorithms originally have beenrun in software placing a large and oftenprohibitive burden on the processors

EHW avoids this problem by running itsgenetic algorithms in hardware

Most notable application of EHW so far

is in the design of analog circuits

AcknowledgmentsAcknowledgments

Dr Jeff Bier Berkeley Design Technology Inc


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Dr. Jeff Bier, Berkeley Design Technology, Inc.

Dr. Giovanni Guidotti, Marconi Corp., ItalyMr. Gene Frantz, Texas Instruments, Houston, TX

r. - uang, eorg a ec ., an a,

Dr. James Kolanek, Fujant Corp., Carpinteria, CADr. Takao Nishitani, Tokyo Metropolitan Univ., Japan

Dr. Rudolf Rabenstein, Univ. of Erlangen-Nuremberg

Dr. Masaru Sakurai, Toshiba Corp., JapanProf. John Shynk, UCSB

Mr. Takao Yamaguchi, Sony Corp., Tokyo, Japan


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