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Modeling, Design, and Demonstration of Ultra-miniaturized and High Efficiency 3D Glass Photonic Modules Bruce C. Chou^, Sandeep Razdan*, Haipeng Zhang*, Jibin Sun*, Terry Bowen*, Vanessa Smet, Gee-Kung Chang, Venky Sundaram, and Rao Tummala 3D Systems Packaging Research Center, 813 Ferst Drive NW, Georgia Institute of Technology, Atlanta, GA, USA *TE Connectivity, Menlo Park, CA, USA ^[email protected] , (352)-359-3182 Abstract This paper presents the modeling, design, and demonstration of an ultra-miniaturized 2.5D optical transceiver module using ultra-thin glass interposers with electrical and optical through vias. The 3D Glass Photonics (3DGP) technology with double sided attach of electrical and photonics ICs can achieve ultra-high bandwidth with improved power efficiency at lower cost than other photonic integration such as silicon photonics and organic boards. Thin glass substrates with 60um diameter through vias were fabricated with copper plated electrical vias and polymer- filled optical vias, formed simultaneously. Re-distribution layers were fabricated on top of these integrated vias for electrical interconnections. The 2.5D optical module produced this way features flip-chip bonded VCSEL and driver chips. Initial measurements of the optical vias showed 1.2 dB of loss. Keywords: 2.5 D glass interposer, optical vias, optical transceiver. I. Introduction Due to intrinsic lower propagation loss and higher channel capacity of photons versus electrons, optical interconnects have gradually replaced electrical interconnects on bandwidth- critical nodes at shorter distances. Since the early 2000s, intense efforts in optical interconnects, beyond board-level, achieved impressive research results, including IBM’s Terabus, Fraunhofer IZM’s EOCB (Electro-Optical Circuit Board), and Intel’s silicon photonics research that spearheaded many groundbreaking accomplishments [1 3]. Silicon photonics, which leverages high density CMOS technology and high index contrast between silicon and silicon dioxide, is no doubt the most suitable for intra-chip optical communications. However, silicon photonics cannot realistically extend beyond a single die due to fabrication cost. Furthermore, the huge refractive index mismatch between silicon-based optical waveguides and glass-based optical fibers introduces high loss and requires costly sub-micron alignment. The fiber-to-waveguide transition happens at board and chip level, as shown in Figure 1. In fact, packaging cost and fiber-to-waveguide loss are two of the biggest factors why optical communications have yet to replace electrical communications at board and chip levels in spite of decades of research efforts [4]. To go beyond board-level optical communications, the three metrics of energy efficiency (Joules per bit), density, and cost of packaging optoelectronics systems must be optimized simultaneously [5]. Figure 1. Evolution of optical communications The 3D Glass Photonics (3DGP) concept aims to provide a simple and low cost photonics packaging solution utilizing ultra-thin glass interposer technology [6,7]. Glass offers several advantages over silicon and organic substrates for photonics packaging: optical transparency, reflective index matching to glass fiber, low-loss electrical signaling capability, good thermal isolation, excellent dimensional stability, and large panel processing. The 3DGP research aims to demonstrate the advantages of glass substrate in the following four research areas, as illustrated in Figure 2: 1. Fine-pitch and low-loss optical vias in glass. 2. Ultra-thin glass interposer with both optical and electrical vias. 3. 3D assembly of dies such as Photonic Integrated Circuit (PIC) on glass interposers. 4. Fiber-to-die transition. Figure 2. The four focus areas of 3D Glass Photonics (3DGP) 978-1-4799-2407-3/14/$31.00 ©2014 IEEE 1054 2014 Electronic Components & Technology Conference

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Page 1: Modeling, Design, and Demonstration of Ultra-Miniaturized ... · Modeling, Design, and Demonstration of Ultra-miniaturized and High Efficiency 3D Glass Photonic Modules . Bruce C

Modeling, Design, and Demonstration of Ultra-miniaturized and High Efficiency 3D

Glass Photonic Modules

Bruce C. Chou^, Sandeep Razdan*, Haipeng Zhang*, Jibin Sun*, Terry Bowen*, Vanessa Smet, Gee-Kung

Chang, Venky Sundaram, and Rao Tummala

3D Systems Packaging Research Center,

813 Ferst Drive NW, Georgia Institute of Technology, Atlanta, GA, USA

*TE Connectivity, Menlo Park, CA, USA

^[email protected], (352)-359-3182

Abstract This paper presents the modeling, design, and

demonstration of an ultra-miniaturized 2.5D optical

transceiver module using ultra-thin glass interposers with

electrical and optical through vias. The 3D Glass Photonics

(3DGP) technology with double sided attach of electrical and

photonics ICs can achieve ultra-high bandwidth with

improved power efficiency at lower cost than other photonic

integration such as silicon photonics and organic boards. Thin

glass substrates with 60um diameter through vias were

fabricated with copper plated electrical vias and polymer-

filled optical vias, formed simultaneously. Re-distribution

layers were fabricated on top of these integrated vias for

electrical interconnections. The 2.5D optical module produced

this way features flip-chip bonded VCSEL and driver chips.

Initial measurements of the optical vias showed 1.2 dB of loss.

Keywords: 2.5 D glass interposer, optical vias, optical

transceiver.

I. Introduction

Due to intrinsic lower propagation loss and higher channel

capacity of photons versus electrons, optical interconnects

have gradually replaced electrical interconnects on bandwidth-

critical nodes at shorter distances. Since the early 2000s,

intense efforts in optical interconnects, beyond board-level,

achieved impressive research results, including IBM’s

Terabus, Fraunhofer IZM’s EOCB (Electro-Optical Circuit

Board), and Intel’s silicon photonics research that spearheaded

many groundbreaking accomplishments [1 – 3]. Silicon

photonics, which leverages high density CMOS technology

and high index contrast between silicon and silicon dioxide, is

no doubt the most suitable for intra-chip optical

communications. However, silicon photonics cannot

realistically extend beyond a single die due to fabrication cost.

Furthermore, the huge refractive index mismatch between

silicon-based optical waveguides and glass-based optical

fibers introduces high loss and requires costly sub-micron

alignment. The fiber-to-waveguide transition happens at board

and chip level, as shown in Figure 1. In fact, packaging cost

and fiber-to-waveguide loss are two of the biggest factors why

optical communications have yet to replace electrical

communications at board and chip levels in spite of decades of

research efforts [4]. To go beyond board-level optical

communications, the three metrics of energy efficiency (Joules

per bit), density, and cost of packaging optoelectronics

systems must be optimized simultaneously [5].

Figure 1. Evolution of optical communications

The 3D Glass Photonics (3DGP) concept aims to provide a

simple and low cost photonics packaging solution utilizing

ultra-thin glass interposer technology [6,7]. Glass offers

several advantages over silicon and organic substrates for

photonics packaging: optical transparency, reflective index

matching to glass fiber, low-loss electrical signaling

capability, good thermal isolation, excellent dimensional

stability, and large panel processing. The 3DGP research aims

to demonstrate the advantages of glass substrate in the

following four research areas, as illustrated in Figure 2:

1. Fine-pitch and low-loss optical vias in glass.

2. Ultra-thin glass interposer with both optical and electrical

vias.

3. 3D assembly of dies such as Photonic Integrated Circuit

(PIC) on glass interposers.

4. Fiber-to-die transition.

Figure 2. The four focus areas of 3D Glass Photonics (3DGP)

978-1-4799-2407-3/14/$31.00 ©2014 IEEE 1054 2014 Electronic Components & Technology Conference

Page 2: Modeling, Design, and Demonstration of Ultra-Miniaturized ... · Modeling, Design, and Demonstration of Ultra-miniaturized and High Efficiency 3D Glass Photonic Modules . Bruce C

Initial modeling and fabrication of passive photonic

devices in a glass interposer, namely polymer-based optical

vias and waveguides, were presented earlier [8]. The current

paper goes beyond this prior work in higher level of module

integration. A VCSEL-based direct modulation optical

transceiver was chosen to showcase the capability of 3DGP

technology. Prior work has demonstrated the feasibility of a

2D optical transceiver module on glass substrate, but the

thickness and dimension of such a module can be further

miniaturized [9]. An ultra-thin 2.5D optical transceiver

module is fabricated, featuring high density optical and

electrical vias using a simplified process that can be modified

for panel level processing. The 2.5D optical transceiver

module is targeted at size reduction, electrical/optical loss

reduction and lower cost enabled by large panel fabrication

processes, precisely as shown on the top side of Figure 2.

The rest of the paper is organized as follows. Section II

covers the design of optical transceiver module and Beam

Propagation Model (BPM) of optical wave propagation

through glass interposer with through package vias (TPV).

Section III describes the simplified fabrication and assembly

steps used to build the 2.5 D transceiver module. Section IV

shows the optical characterization results, with a summary and

conclusion in Section V.

II. Modeling & Design

A typical 40 G short-reach optical transceiver module

consists of a 4-channel laser source made of either VCSELs or

EELs driven by a CMOS driver on the transmit side, and a 4-

channel Photo-Detector (PD) array feeding into an amplifier

such as a Trans-Impedance Amplifier (TIA) on the receiver

side [10]. The optical modulation scheme is the simple On-Off

Keying (OOK) scheme and the lasing wavelength used is

typically 850 nm rather than 1550 nm, which uses multi-mode

fibers (MMF) with 62.5/125 um core/clad diameter rather than

single-mode fibers. The connection from the optoelectronic

devices to MMF is through a 45 degree mirror and then to a

standard MT-connector mounted on the PCB.

The electrical design of the 2.5 D transceiver module is

completed in collaboration with TE Connectivity, and features

impedance matched differential signal lines at minimized

distances between the dies. The optoelectronic dies and

CMOS dies used are provided by TE specifically for 40 G

application. The optimized dimension of the interposer is 5 x 5

mm2, which achieves 4x area reduction comparing to 10x10

mm2 reported in [9]. Shown in Figure 3 is a simplified (to

protect proprietary design details) side-by-side comparison of

the 3DGP transceiver module versus the previously reported

module. The reduction in area is achieved by 1) shorter

electrical signal traces from the CMOS dies to the bumps

through the use of electrical vias and 2) possibility of dies on

top of bumps by utilizing both layers. In addition, thermal vias

are deployed to help heat dissipation on a smaller area. Further

reduction in area is achievable through 3D assembly.

Figure 3. Simplified diagram showing area reduction of the

3DGP module (right) versus previously published module

(left) [9].

One of 3DGP’s research areas is the fabrication of fine-

pitch optical vias. Depending on the thickness of the

interposer, required laser/photo detector pitch, and fiber core

diameter, an optical via might not be necessary.

Beam Propagation Model is used to determine the need for

optical via. BPM is used in favor of the more accurate but

more computationally intensive Finite-Difference Time-

Domain (FDTD) method. BPM is sufficient because the

critical dimensions (>20 um) are much larger than the

wavelength of interest (0.85 um), and the lack of sharp angles

along the path of light ensures paraxial model is reliable. BPM

is implemented using MATLAB. Light propagation is

simulated for three cases: 1) bare glass, 2) bare glass with

polymer lens, 3) bare glass with fully filled polymer vias. In

our model, the light wave travels through VCSEL-underfill-

interposer-gel-fiber interface. The VCSEL is assumed to be 30

um away from the surface of glass, the glass thickness, t,

varies from 100 um to 200 um, and the fiber is assumed to be

30 um from the exit side. The via has an entrance diameter of

60 um and a taper angle of 2.8°. The three cases are illustrated

in Figure 4.

Figure 4. BPM simulation setup for the three cases.

The modeling results for t = 100 um is shown in Figure 5.

The spreading of the light wave within the distance between

VCSEL and fiber is short enough that bare glass is the

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simplest and best approach. In fact, a comparison of the

optical power measured at the fiber core showed the fiber core

will be able to capture close to 100% of the optical power in

the bare glass case. While the addition of via did reduce the

loss in the simulation, the added fabrication steps and optical

loss due to surface and sidewall roughness could rendered the

use of optical via excessive.

On the other hand, the modeling results for t = 200 um

showed that the optical loss in the bare glass case is no longer

negligible due to the dispersion of light, as shown in Figure 6.

As shown in simulation, an optical via can help guide the

beam to the fiber core through a 200 um thick interposer.

Similar simulation had been completed for t = 300 um and

the loss at the fiber end was measured. The optical loss,

calculated in dB as 10*log(Pout/Pin), for the three cases from

100 to 300 um has been plotted in Figure 7. The optical loss is

effectively controlled to less than -0.5 dB at 300 um while the

optical loss for the bare glass and polymer lens case exceeded

-2 dB due to dispersion. The interposer built by GT-PRC

features thin glass between 100 ~ 130 um thick. In this range

via is not needed to guide light into a MMF as the dispersion

has not spread beyond the core region.

However, if a thicker interposer is used or SMF is needed

for higher wavelength, an optical via will be the best choice

with the most consistent dispersion control among the three.

Figure 5. BPM simulation for t = 100 um.

Figure 6. BPM simulation for t = 200 um.

Figure 7. Calculated optical loss from BPM simulation.

III. Fabrication

Two fabrication processes were explored: electroless

plated seed layer on dielectric laminated glass and sputtered

seed layer on bare glass. The detailed process steps are

illustrated in Figure 8. Both processes are implemented to

compare the advantages and disadvantages of each. In the

processed below, steps 1 ~ 5 are panel level processes while

step 6 is done at the coupon level currently. Panel level

processing on a 150 mm x 150 mm glass panel with 5 mm

square coupons can yield 576 coupons per panel; therefore,

potentially reducing the cost per coupon drastically.

Figure 8. The two 3DGP substrate process sequences

explored.

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III.1 Laminated Glass Process

The laminated glass approach has been developed and

optimized by GT-PRC [7]; however, the optically opaque

dielectric laminate restricts optical waveguide formation on

glass. The laminated glass approach nevertheless presents a

viable option when only optical vias are needed. For the

demonstrator, a 6” x 6” 100 um thick glass panel from Asahi

Glass Company (AGC) is laminated on both sides by RXP-4

dielectric from Rogers. RXP-4 is chosen for its higher

temperature tolerance (>350 C), which is important for

assembly. 60 um vias are drilled by AGC at 250 um pitch, to

match typical VCSEL pitch. Electroless process by Atotech is

used to plate the copper seed layer. Electrical vias are exposed

after photoresist patterning and plated to desired thickness,

while optical vias are left bare.

The optical material used is the photo-definable Cyclotene

4024 from Dow Chemical, which is based on

bisbenzocyclobutene (BCB) chemistry [11]. BCB exhibits

higher refractive index comparing to glass and a high Tg;

therefore making it suitable for the assembly process

involving AuSn solder. Processing of optical waveguides and

fully filled optical vias on glass has been reported in our

previous work and will not be discussed in detail [8]. In

current work, an attempt was undertaken to use BCB as

passivation in addition to optical structures. If successful, the

number of process steps can be reduced. Unfortunately, the

process had not been optimized at writing and severe warpage

made assembly unfeasible. On the other hand, the optical vias

were filled completely, while the electrical vias were filled

conformally. Figure 9 shows the panel-view of finished

demonstrator containing 289 interposers, and Figure 10 shows

the cross-sectional view of the electrical and optical vias from

one of the coupons.

Figure 9. 3DGP demonstrator panel using laminated glass

process on 100 um glass provided by AGC.

Figure 10. Cross-section of optical and electrical vias using

laminated glass process.

III.2 Bare Glass Process

The bare glass process utilizes Corning’s bare glass via

formation technology to drill 60 um vias on 130 um thick 6”x

6” glass panel, also provided by Corning [12]. Titanium and

copper seed layers were sputtered on bare glass by Tango

Systems Inc. Based on the results from laminated glass, BCB

was only used for optical via filling to reduce warpage, while

solder resist from Hitachi Chemical was used for the

passivation layer. ENEPIG (Electroless Nickel, Electroless

Palladium, Immersion Gold) process by Atotech was applied

to create gold finish on the surface. The completed panel

featuring 289 interposers is shown in Figure 11. The panel was

diced after surface finish to obtain the singulated interposers

for assembly. VCSEL die with AuSn solder joints was flip-

chip bonded first, followed by flip-chip bonding of driver die

with tin-silver solder joints. The receiver dies were not

assembled in the current demonstrator. Underfill was

dispensed after bonding and cured in oven in air. The cross-

section of the glass interposer with bonded VCSEL and driver

dies is shown in Figure 12.

Figure 11. 3DGP demonstrator panel using bare glass process

on 130 um glass provided by Corning.

Optical via Electrical vias

250 um

250 um

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Figure 12. SEM of cross-sectioned interposer with VCSEL

and driver.

IV. Characterization:

Optical loss characterization had been performed on via

level, where the loss through the optical via was measured

using direct abutment method. The measurement setup is

shown in Figure 13. A standalone 850 nm VCSEL was used to

drive a single mode fiber (SMF), which was fastened to a xyz

micro-positioner. The DUT, which in this case is the glass

interposer, was mounted on a second xyz micro-positioner. A

photodetector, mounted on top of an FR4 board, was attached

to the third xyz micro-positioner. The schematic of the sectup

is shown in Figure 13a), while a picture of the actual setup is

shown in Figure 13b).

Figure 13. a) Schematic of optical loss measurement setup. b)

Picture of setup showing DUT.

Figure 14. BPM of dimpled via showing light dispersion at the

exit side of the via.

Relative optical loss can be measured by normalizing the

receiving power calculated using PD voltage and current

reading with respect to VCSEL power with no DUT (through

air). Measurements performed on the 100 um laminated glass

samples were recorded in Table I. The loss is higher in the

optical vias than BPM simulation predicted, while the loss is

comparable for the bare glass case. The higher loss through

the optical via could be caused by either the surface or

sidewall roughness of the optical via. In the BPM simulation

of the filled via with surface dimples, as shown in Figure 14,

visible optical loss due to dispersion could be observed, while

simulation showed 0.48 dB loss. Since BPM could not capture

the loss due to micron level surface roughness, the lower loss

in simulation was expected.

Table I. Optical loss measurement of optical vias

Interface Measured Loss Simulated loss

Air Normalized to 0 dB 0 dB

Bare Glass 0.25 dB 0.23 dB

Optical via 1.2 dB 0.14 dB / 0.48 dB

V. Conclusion:

A 2.5D short-reach optical transceiver module was

demonstrated using GT-PRC’s 3D glass photonics technology

using both the laminated glass and the bare glass approach.

The bare-glass approach was used for assembly trials due to

lower warpage. The optical transceiver interposer featured

reduction in dimensions in the x, y, and z direction, thus

achieving more than 10x improvements in density compared

to previously- published results. Both optical and electrical

vias were integrated in the interposers. Optical measurements

and simulations confirmed 0.48 to 1.2 dB loss in the optical

via at 100 um thickness which could be reduced with process

improvements.

SMF Tip

PD

DUT

SMD fiber (Φ 125 um)

PD

Glass Interposer

200 um VCSEL

Driver

130 um thick glass interposer

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Acknowledgement:

The authors would like to thank William Vis, Jialing Tong,

Timothy Huang, and Vijay Sukumaran for their generous help

in fabrication. Furthermore, the authors would like to thank

Chris White and Jason Bishop for lab support. The authors

would also like to thank Meg Gerstner and Jim Toth from TE

Connectivity for their leadership and guidance.

REFRENCES [1] F. Doany, “Power-Efficient, High-Bandwidth Optical

Interconnects for High Performance Computing,”

conference presentation, Hot Interconnects, 2012.

[2] H. Schroder et al., “Advanced Thin Glass Based Photonic

PCB Integration,” in Electronic Components and

Technology Conference, 2012.

[3] http://newsroom.intel.com/community/intel_newsroom/blo

g/2013/04/11/chip-shot-intel-silicon-photonics-

demonstrated-at-100-gbps

[4] D. Miller, "Device Requirements for Optical

Interconnects to Silicon Chips", Proc. of the IEEE , Vol.

97, No.7, pp. 1166 - 1185 (2009)

[5] M. Taubenblatt, “Optical Interconnects for High-

Performance Computing,” in IEEE Journal of Lightwave

Technology, Vol. 30, No. 4, 2012.

[6] V. Sukumaran et al., “Low-Cost Thin Glass Interposers

as a Superior Alternative to Silicon and Organic

Interposers for Packaging of 3-D IC, “ in IEEE

Transactions on Components, Packaging, and

Manufacturing Technology, Vol. 2, No. 9, Sept. 2012.

[7] V. Sukumaran et al., “Design, Fabrication and

Characterization of Low-Cost Glass Interposers with

Fine-Pitch Through-Package-Vias,” in Electronic

Components and Technology Conference, 2011.

[8] B. Chou et al., “Modeling, Design, and Fabrication of

Ultra-high Bandwidth 3D Glass Photonics (3DGP) in

Glass Interposers,” in Electronic Components and

Technology Conference, 2013.

[9] L. Brusberg et al., “Glass Carrier Based Packaging

Approach Demonstrated on a Parallel Optoelectronic

Transceiver Module for PCB Assembling,” in Electronic

Components and Technology Conference, 2010.

[10] http://www.optcore.net/html_news/40G-&-100G-Optical-

Transceivers-Basics-12.html

[11] Cyclotene 4000 Series Advanced Electronics Resins

(Photo BCB), Dow Chemical Company, 2012

[12] A. Shorey et al., “Development of Substrates for Through

Glass Vias (TGV) for 3DS-IC Integration,” in Electronic

Components and Technology Conference, 2012.

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