Research ArticleModular Design of RF Front End for a NanosatelliteCommunication Subsystem Tile Using Low-CostCommercial Components

Haider Ali ,1 Anwar Ali ,2 M. Rizwan Mughal ,3,4 Leonardo Reyneri,5 Claudio Sansoe,5

and Jaan Praks4

1Department of Electrical Engineering and Technology, University of Technology, Nowshera 24100, Pakistan2School of Information Science and Technology, Zhejiang Sci-Tech University, Hangzhou 310018, China3Department of Electrical Engineering, Institute of Space Technology, Islamabad 44000, Pakistan4Department of Electronics and Nanoengineering, School of Electrical Engineering, Aalto University, FI-00076 Aalto,02150 Espoo, Finland5Electronics and Telecommunication Department, Politecnico di Torino, Torino 10129, Italy

Correspondence should be addressed to Haider Ali; haider.ali@uotnowshera.edu.pk

Received 16 February 2018; Accepted 28 November 2018; Published 7 April 2019

Academic Editor: Jeremy Straub

Copyright © 2019 Haider Ali et al. This is an open access article distributed under the Creative Commons AttributionLicense, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work isproperly cited.

In recent years, the development market for low-cost nanosatellites has grown considerably. It has been made possible due tothe availability of low-cost launch vectors and the use of “commercial off-the-shelf components” (COTS). The satellite designstandardization has also helped a great deal to encourage subsystem reuse over a number of space missions. This has creatednumerous opportunities for small companies and universities to develop their own nanosatellite or satellite subsystems. MostCOTS components are usually not space qualified. In order to make them work and withstand the harsh space environment,they need extra effort in circuit redesign and implementation. Also, by adopting the modularity concept and the design reusemethod, the overall testing and nonrecurring development cost can be significantly reduced. This can also help minimize thesubsystem testing times. The RF front-end design presented in this paper is also considered one of the better and feasiblechoices based on the above approach. It consists of an S-band transceiver that is fully implemented using COTScomponents. In the transmit chain, it is comprised of the transmitting CC2510 RF matching network and a poweramplifier (PA) with an RF output power of up to 33 dBm which connects to an antenna using two RF switches. Thereceive chain starts from the antenna that is connected through two RF switches to the low-noise amplifier (LNA) thatfurther connects to the receiving CC2510 via the RF matching network. The receiver sensitivity is -100 dBm. This is ahalf-duplex system using the same antenna for transmitting and receiving. The receiver and transmitter chains are isolatedtogether using two RF switches which together provide an isolation of up to 90 dB at 2.4GHz. The concept behind usingtwo RF switches is to provide better isolation from the transmit chain to the LNA. The matching network of CC2510 hasbeen designed in a symmetric fashion to avoid any delays. All the RF COTS used have been selected according to linkbudget requirements. The LNA, PA, and RF switches were tested individually for compliance. The passive componentsused in the overall design of the matching network are chosen on the basis of minimum dimension, least parasiticbehaviour, and guaranteed optimum RF matching. Also, the RF COTS used are non-CMOS which makes them morerobust against space radiations associated with the LEO environment and enables them to provide a radio communicationdata rate of up to 500 kbps in both uplink and downlink. The vacant spaces on the implemented PCB are shielded with apartial ground plane to avoid RF interference.

HindawiInternational Journal of Aerospace EngineeringVolume 2019, Article ID 8174158, 11 pageshttps://doi.org/10.1155/2019/8174158

1. Introduction

In recent years, nanosatellites have gained significant impor-tance in the aerospace market due to their low cost andcomparatively shorter development time. However, this hascreated more demanding requirements for such small mis-sions [1]. One of its key aspects includes the developmentof an efficient communication subsystem which can fulfillall these requirements [2, 3].

A communication subsystem is a vital functional ele-ment for any satellite, and it cannot be overlooked. Theever-increasing bandwidth requirements have driven thedesigners to move from conventional VHF/UHF bands tomore high-frequency bands. This shift is more fluent formedium and large satellites which have abundant resourcesin terms of power budget and available space. In contrast,for micro-/nanosatellites this technological shift is not soconvenient mainly due to the scarcity of available spaceand power budget [4]. For CubeSat standards, this shift iseven more difficult because of hard constraints on space,power budget, and cost [5]. The aim of this work is to imple-ment a feasible design solution that could cater to bandwidthrequirements while satisfying these constraints.

This design approach is based on the novel AraMiS(Italian acronym for Modular Architecture for Satellites)approach. The major aim of the AraMiS Project is to gobeyond the CubeSat concept and develop a truly modulararchitecture. In AraMiS, the modularity is employed at sev-eral levels that include inception, design, mechanical andelectronic implementation and testing levels. Once the mod-ules are developed, they are assembled together as per targetmission requirements. This enables various missions to sharethe cost and human efforts in an effective manner [4].

The AraMiS-C1 (CubeSat standard equivalent of theAraMiS Project) has been realized over a single standardCubeSat module called a tile. In this design, the S-bandtransceiver has been implemented over half of the telecom-munication tile which is not a trivial job. This has beenpossible by using several design techniques employed for areduction in terms of dimensions, weight, and power dis-sipation while still providing desirable performance fortelecommunication [4, 5].

2. Modular Architecture Design Approach

According to the AraMiS Projects, the modular architectureapproach has been adopted on (i) design, (ii) schematic,and (iii) physical levels. All these approaches have createdmore reusable, reconfigurable, and upgradable subsystemsand modules. It has also reduced the overall design anddelivery time of different modules enabling them to meethard mission deadlines. On the financial front, the overallmission cost has also been reduced significantly as module-wise space qualification almost eliminates the retesting ofthe same module over another mission (only system integra-tion testing is required for a newer mission) [4, 6].

2.1. Design Level Modularity. UML (Unified ModelingLanguage) is a modeling language used extensively in high-

level object-oriented designs and has become a standard invarious applications. UML renders quite a few diagrams thatinclude the class diagram, sequence diagram, use casediagram, requirement diagram, and state diagram. Differentdiagrams represent system properties in different perspec-tives. The choice of diagram selection is based upon thesystem characteristics [7].

UML has been employed for the design and documenta-tion of the AraMiS project. All the subsystem blocks and theirfunctionalities have been described using UML. With regardto the hardware/software architecture of AraMiS, a detaileddocumentation of each subsystem has been implementedusing UML [8]. This design method utilizes a UML classdiagram for each module. Under the given approach, eachsubsystem consists of a hardware part (HW) and a corre-sponding software (SW) support.

The 1B9_CubeTCT UML class diagram is given inFigure 1. All the subsystem names follow the nomenclatureused for their classes in UML. The subsystem names for the1B9_CubeTCT (or CubeTCT) follow the nomenclature usedfor them inside UML diagrams [7]. The yellow blocks repre-sent the analog class (or object) that encompasses an inherentsoftware and hardware electronic design. The blue-colouredblock represents a class (or object) at the module level thathas an association (depicted via arrows) with other subclasses(or objects) and with amber-coloured blocks called compo-nent classes (or objects). All these classes have complete char-acteristics which are required for its description (includingoperations, arguments, and outputs).

2.2. Schematic Level Modularity. As in the case of the UMLclass diagram, the schematics were also designed in amodular manner by utilizing Mentor Graphics SchematicCapture and Expedition PCB™ [9]. The main schematicwas bifurcated into several blocks and subblocks. This cre-ated several advantages over conventional schematic design-ing, such as ease of reuse for an identical block, convenientupgrading of the same subsystem’s module by simply replac-ing an instance of the same block with an updated one, andease of schematic troubleshooting and hardware debugging.In a more macro perspective, it helped create a library withseveral schematic blocks and subblocks that could be usedfor other space missions. The same methodology can alsobe followed to design and develop projects in other engineer-ing and technological domains.

In the AraMiS C-1 CubeTCT subsystem, the sameapproach has been adopted for a schematic design. Itincludes several blocks and subblocks that assemble to createthe final CubeTCT schematic. This helps to ease upgrading,replacing of components, and troubleshooting of CubeTCT.

Figure 2 shows the mentor schematic of the 1B31B1W_OBRF_2_4_GHz (CubeTCT) transceiver, where each blockrepresents a separate schematic. Each schematic block hasfurther subblocks that represent nested schematics. Figure 3gives another view of the schematic for the onboard RFfront-end block (1B131B_OBRF_RF_FrontEnd). SimilarlyFigures 4, 5, and 6 depicts subblocks that comprises differentICs and passive components. To give an idea on the ease ofupgrading, consider a scenario for upgrading the transceiver.

2 International Journal of Aerospace Engineering

It will simply require replacing this schematic block with anew one without redoing the whole subsystem. This sche-matic hierarchy and classification is a true implementationof the AraMiS modular architecture at the schematic level.

2.3. Physical Level Modularity. A further extension of themodularity concept is based on a plug-and-play modulararchitecture [6]. This means that a mother board can docka daughter board by using a module connector. Thesemodule connectors are identical in terms of signals (on aschematic level) as depicted in Figure 4 and pin connections(on a hardware level) as shown in Table 1 [9]. Differentdaughter boards can be connected onto a standard motherboard having a number of module connectors. This providesa more instant modular solution with an off-the-shelf choicefrom already developed daughter boards. It renders a

customization level where one simply physically undocks ordisconnects a mother board and replaces it with anotherone as per mission requirements. For the CubeTCT, thisplug-and-play architecture has been provided on a limitedschematic and mapping level which is extendable in thefuture to a physical daughter board level CubeTCT.

3. Aramis C1 and Telecommunication Tile

The AraMiS-C1 is the most recent implementation ofAraMiS architecture that is based on CubeSat standard. Thedesign process of AraMiS is based on tiles. Tiles are printedcircuit boards that also form the outer structure of thesatellite. They have dual functionality: (i) they providemechanical strength and structure to the satellite and(ii) they provide operational functionality (such as power

« A NA » B k1 B 121 D_Lo a d_S w itc h

_ Hig h _ Vo lta g e

«pin» +IN()«pin» +OUT() «pin» +EN(val : bool)

«ANA» «SW»

«Electronic Module» Bk1B132F_Current_Sens

«ANA» «Electronic Module»

Bk1 B133B Temperature Sensor

+T MIN : float const = 0 +T MAX : float const = +130

«ANA» «Electronic Module»

«SW» Bk1B131A_Voltage_Sensor

+SENS VOUT : float const = 0.5

«ANA» «SW»

Bk1B131C Voltage_Sensor+SENS VOUT : float const = 0.1277

attribute22

«ANA» «Electronic Module»

«SW» Bk1B131B_Voltage_Sensor

+SENS VOUT : float const = 0.254

+SENS_CS_VOUT : float = 0.44

<<ANA>>Bk1B31B1W_OBRF_2_4GHz

U1 : Bk1B132C_Current_Sensorattribute22 : Bk1B131B_Voltage_SensorBk1B31B_OBRF_Fr2 : Bk1B31B1_OBRF_FrontEnd Bk1B31131_OBRF_RX : Bk1B31B1W_OBRF_CC2510 Bk1B31131_OBRF_TX : Bk1B31B1W_OBRF_CC2510

-1B121D_Ld_Sw_PA2 : Bk1B121D_Load_Switch_High_Voltage -1B121D_Load_Sw1 : Bk1B121D_Load_Switch_High_Voltage attribute : Bk1B133B_Temperature_Sensor

-1B131C_Voltage_4 : Bk1B131C_Voltage_Sensor-1B132F_Current_4 : Bk1B132F_Current_Sensor -1B131A_Voltage11 : Bk1B131A_Voltage_Sensor

+MODULE_A() +MODULE_B() +MODULE_C()+MODULE_D() +ANTENNA() +DEBUG_TX() +DEBUG_RX()

«ANA» 1B127 Anti-Latchup

«ANA» 1B1255A_S witching

_Regulator_6V

«ANA»1B1252A_Reference

_Regulator_3VO

«ANA» 1B1254A_Mixed_Regulator_3V3

«ANA» Bk1B31B1_OBRF_FrontEnd

-1B131B Voltage_1 : Bk1B131B Voltage_Sensor

+Switch_V10 +Switch V2() +VAL_3V3() +EN_PA_SUPPLY() +RF_TX()+RF_RX0 +PA_DET() +ANTENNA() +PDB()+GND() +PA_V_Sense()

«ANA» Bk1B31B1W OBRF CC2510

+DEBUG() +MODULE_A() +MODULE_B() +RF()+VCC_CPU() +GND()

«Antenna» 1B3211 – Single Patch Rodgers

1B9_CubeTCT

-SHF_modem : Bk1B31B1W_OBRF_2_4GHz-SHF_antenna : 1B3211 - Single Patch Rodgers -Debug_2_4GHz_TX : MOLEX - 6 pins PicoBlade header-Debug_2_4GHz_RX : MOLEX - 6 pins PicoBlade header -SPI_2_4_GHz : MOLEX - 8 pins PicoBlade header-PDB : MOLEX - 4 pins PicoBlade header-SPI_437MHz : MOLEX - 8 pins PicoBlade header

«Component» MOLEX - 8 pins PicoBlade header

«Component» MOLEX – 6 pins PicoBlade header

«Component» Screw M2.5x12 steel

«Component» Spacer 3.2x2.54 nylon

«Component» MC306 – 32768 Crystal

«Component» D75F –

25_MHz_Oscillator

«Component» CC2510

-Pins: int const =4-Digikey: String Const = WM7608CT-ND

-Pins: int const =8-Digikey: String Const = WM7612CT-ND

«Component» MOLEX - 4 pins PicoBlade header

-Pins: int const =6-Digikey: String Const = WM7610CT-ND

«Component»SZM-2166Z–2.4GHz PA

«Component»MAX 2644–2.4GHz LNA

-OUTPUT_POWER: float=2

-NOISE_FIGURE:float=2.2

Bk1B31B1_OBRF_RX

Bk1B31B1_OBRF_TX

«pin» +IN()«pin» +OUT() «pin» +EN(val : bool)

1B9_CubeTCT

1

1

1

1

1

4

4

1

11

11

1

1

1

1 1

1

1

Figure 1: UML class diagram for 1B9_CubeTCT showing association with all other subclasses and modules.

3International Journal of Aerospace Engineering

management, telemetry, and telecommunications). Insidethe satellite, there is room for batteries and payloadboards. AraMiS-C1 consists of 4 power management tiles

(CubePMT), a telecommunication tile (CubeTCT) with anS-band patch antenna (one side), and a commercialdeployable UHF antenna (the other side) mounted on

1B131B1W_OBRF_2_4GHz (CubeTCT)1B131B_OBRF_SPI

S_SE

L

VCC_

3V3

SIM

O

SOM

I

S_CK

GN

D

1B13

1B_O

BRF_

CC25

10

A_D0_SOMIA_D1_SIMOA_D2_SOMIA_D3_SIMOA_D4_CLKA_D5_PWMA_D6_A0A_D7_A1A_D8A_D9

RF OUT

VCC_3V3

B_D0_SOMIB_D1_SIMOB_D2_SOMIB_D3_SIMO

B_D4_CLKB_D5_PWM

B_D6_A0B_D7_A1

B_D8B_D9

RESET_NDEBUG_VCCDEBUG_DATADEBUG_CK

1B13

1B_O

BRF_

CC25

10

A_D0_SOMIA_D1_SIMOA_D2_SOMIA_D3_SIMOA_D4_CLKA_D5_PWMA_D6_A0A_D7_A1A_D8A_D9

RF OUT

VCC_3V3

B_D0_SOMIB_D1_SIMOB_D2_SOMIB_D3_SIMO

B_D4_CLKB_D5_PWM

B_D6_A0B_D7_A1

B_D8B_D9

RESET_NDEBUG_VCCDEBUG_DATADEBUG_CK

1B13

1B_V

_SEN

SE

PDB_IN PDB_SENSE

PA_IN PA_SENSE

3VREF_SENSE

VAL_3V3_SENSEVAL_3V3_IN

3VREF_IN

1B133B_T_SENSE3VREF_IN TMP_SENSE

1B131B_REG

VAL_PA_OUT

3VREF_OUT

VAL_3V3_OUT

PDB_3V3_I N

PDB_PA_IN

PDB_3VREF_IN

1B131B_PDB

GN

D

PDB_

EN

PDB

VAL_

3V3_

EN

1B131B_Load_SWPDB_IN

PDB_OU T

VAL_PA_IN

PA_OU TPDB_EN

3VREF_OU T

VAL_3V3_OUTVAL_3V3_IN

3VREF_IN

VAL_3V3_EN

VAL_PA_EN

3VREF_EN

1B131B_DEBUG_OBRF_CC2510

RESE

T_N

DEB

UG

_3V

3

DEB

UG

_CK

DEB

UG

_DAT

A

GN

D

1B131B_DEBUG_OBRF_CC2510

RESE

T_N

DEB

UG

_3V

3

DEB

UG

_CK

DEB

UG

_DAT

A

GN

D

VAL_3V3_CPU

1B13

1B_O

BRF_

RF F

ront

endVAL_3V3

VAL_P

PA_DET

GNDANTENNA

Switch_V1

Switch_V2

RF_T

X_IN

RF_R

X_O

UT

1B131B_I_SENSEPDB_IN

VAL_PA_OUTVAL_PA_IN

PDB_OUT

VAL_PA_SENSE PDB_SENSE

VAL_PA

VAL_PA

VAL_

3VRE

F_EN

VAL_PA_EN

VAL_

PA_E

N

VAL_3VREF_EN

VAL_3V3VAL_3V3_CPU

1B127_ANTI_LATCHUPVAL_3V3VCC_CPU

NCNC

NCNC

NCNCNC

NCNC

NC

NCNC

NCNC

NC

NCNC

NC

RFVAL_3V3_SENSE

3VREF_SENSE

3VREF_SENSE

VAL_3V3_SENSE

1B131_OBRF_CC2510_Tx

1B131_OBRF_CC2510_Rx1B131_OBRF_DEBUG_Tx

1B131_OBRF_DEBUG_Rx

Figure 2: Mentor schematic of 1B31B1W_OBRF_2_4_GHz (CubeTCT) transceiver.

1B131B_OBRF_RF_FrontEnd

1B317B_RF_SW

VCC_3V3RF 1

RFCVC

RF 2

RF_SW_V1

1B317B_RF_SW

VCC_3V3 RF1

RFC VC

RF2

RF_SW_V2

1B316B_LNA

VAL_3V3

RF_OUT

RF_IN

1B315B_PA

VAL_PARF_OUT

RF_IN PA_DET

EXT CON

SWITCH_V1

EXT CON

VAL_PA

EXT CON

RF_TX_IN

EXT CON

ANTENNA

EXT CON

SWITCH_V2

EXT CON O

PA_DET

EXT CON O

RF_RX_OUT

Figure 3: Mentor schematic of 1B31B_OBRF_RF_front end.

4 International Journal of Aerospace Engineering

the external face. A photograph of 1U AraMiS-C1 is shownin Figure 7.

The main approach for designing CubeTCT is to realize ahigh-bandwidth communication link using low-cost COTScomponents which are available in the market. This modulardesign approach of AraMiS-C1 makes the redesign conve-nient by the reuse of similar modules [10, 11].

The current version of CubeTCT consists of an S-bandsubsystem. In the future, the CubeTCT design will alsoincorporate a UHF subsystem. The regulator/sensor moduleand interface components required by CubeTCT have beenimplemented on the same communication tile as shown inFigure 8. From here onwards, CubeTCT will refer to thecurrent version which only contains an S-band subsystem.

C220

p

DEB

UG

MO

DU

LE_

MO

DU

LE_A

REST

_N3V

3_SU

PLY_

OBG

Cl00

nCl

00n

Cl00

n

CDU

1

CDU

1

C220

p C1u

R10K

DEBUG_DATA

A_D2_SCL_SOMI

A_D5_PWM

A_D6_A0

B_D6_A0A_D4_CLK

R10K

VCC_CPU_1

RESET_NRESET_N

B_D7_A1

A_D8_ID

A_D7_A1

B_D5_PWM

B_D9_EN_PWM2

B_D8_ID

B_D4_CLKB_D1_TX_SIMOB_D0_RX_SOMI

A_D0_RX_SOMIA_D1_TX_SIMO

A_D9_EN_PWM2

DEBUG_CLOCK

C100p

2810

15

P2_0

P1_0P1_1P1_2P1_3P1_4P1_5P1_6P1_7

P0_0P2_3 17

18

2120

27

37

P2_4

XOSC_Q1XOSC_Q2

RBIAS

GROUND

P0_1P0_2P0_3P0_4P0_5P0_6P0_7

14

4

3635343332

56789

1112

31

13

16

3029

DVDD1 AVDD1

R2R1

19222526

AVDD2AVDD3AVDD4

RF_N

RF_PZ = 95

C100p

Z = 80

Z = 80 Z = 8031_RO

R1

Z = 80

L1n2

L1n2

Z = 95 Z = 80

Z = 95

C1p

C18p

X_26MHz

X_32MHz

C56kC18p

C15p C15p

C1p5

RFZ = 50Z = 50L1n2Z = 50

C1p8

3V3_SUPPLY_DBG

VCC_CPU

RF_MMZ1005Y241C

Z = 95

23

23

DVDD2

GUARDAVDD_DGREG

DCOUPL

DEBUG_DATA

DEBUG_CLOCK

CC2510

VCC_CPU_1

DK_CC2510F32RSPR

Figure 4: Mentor schematic of 1B31B CC2510 transceiver.

!

U25MAX2644

RF_IN

C60C33p

L16L3n3

3

RFin

2 5

Gnd1 Gnd

RFout 6RF_OUT

C33pC2p2

C62

VCCBias

R28

R1k21 4 C61

3.3 V

Length = 10.16 mm

Figure 5: LNA schematic of RF front end.

5International Journal of Aerospace Engineering

CubeTCT is a four-layered PCB with dimensions of98 0mm × 98 0mm × 1 55mm. All of these componentsare mounted on the bottom layer (layer 4), while the top layer(layer 1) contains a feed point for mounting a detachableS-band patch antenna (2.4GHz). The routing for RF, power,and other analog traces are performed on the bottom surface.All the digital traces are routed on the third layer. The secondand fourth layers are ground planes which help in shieldingRF, power, and analog traces from digital signals. Therefor-e,this ensures having a considerably better signal integrity.The 1B9_CubeTCT communicates with an onboard com-puter (OBC) through a 6-pin SPI connector. A PowerDistribution Bus (PDB) is made available using a separate4-pin connector. Two 8-pin connectors are available for

separate programming and debugging of the Texas Instru-ments CC2510 transmitter Tx and receiver Rx. The dataprocessing, monitoring, and various control operations for1B9_CubeTCT is also performed by these commerciallyavailable transceivers which has an internal 8051 coremicrocontroller [12].

The main focus for the CubeTCT design is to realize ahigh-bandwidth communication link using low-cost COTScomponents which are available in the market. This hasmade it feasible for the universities and small industries toenter the field of satellite design. Moreover, a modulararchitecture approach has been employed for completenanosatellite design. This modular approach makes theredesign convenient by the reuse of the identical modules.

To ensure a consistent communication radio link,CubeTCT has been designed as a separate subsystem froma satellite standpoint. It can communicate with other subsys-tems and the “On Board Computer” (OBC) via an SPIinterface. CubeTCT draws power from an onboard PowerManagement System (EMS) via a Power Distribution Bus(PDB). Power regulation is performed by the CubeTCTPower Regulation module. There are three power regulatorsthat provide voltage levels of 6V, 3.3V, and 3V Ref onCubeTCT. An antilatchup protection system is there toprotect CMOS circuitry against radiation hazards. Real-time monitoring of voltage, current, and temperature is alsoperformed by voltage, current, and temperature sensors onCubeTCT to ensure proper functionality and housekeeping.

1B9_CubeTCT communicates with OBC and othermodules using the SPI interface of the Rx. The Rx is alwaysperiodically sniffing for a radio packet from the ground

NC

NC

C35

RFin

R44 R45

VDET

EL = 7.7

C106 C58

L12L12n

C1p8C1p

EL = 3.5 EL = 15.2 EL = 14.9 EL = 12.3

Zo = 15.8C59

RFoutC10pZo = 24.8Zo = 15.8Zo = 15.8Zo = 15.8

R220KR43

R5k76

VPC2VPC3

R1k37R41R3k92

VPC1R42

R2k87

C100n

R36 L15 L14 C41C42 C1u

Val

C98C40

C57C34C5p6

C100nC100nC100n

C100n

R35RORL4n7L10nROR

32335163813217151412

34

29

28

27

26

25

24

23

22

20

C2B

RFIN1

RFIN2

GN

D1

GN

D2

GN

D3

GN

D4

GN

D5

GN

D6

GN

D7

GN

D8

GN

D9

GN

D10

VBI

AS3

VBI

AS1

2

VB3

B

VB3

A

VC2B

VC2A

VC1

C3A

C2A

C1A

NC3

NC2

VDET

RFOUT8

RFOUT6

RFOUT4

RFOUT1

RFOUT2

RFOUT3

RFOUT5

RFOUT7

NC1

SZM-2166Z

C1B37

39

5

6

VPC1

VPC3VPC29

1 4 10 11 18 21 30 33 40 41 31 7

19

36

U7

RFMD_SZM-2166Z

Figure 6: Schematic of power amplifier (SZM-2166Z).

Table 1: Mapping of CC2510 pins onto the AraMiS module.

Connector Pin A B

D0/RX/SOMI 11 P0.2 P1.7

D1/TX/SIMO 9 P0.3 P1.6

D2/SCL/SOMI 7 P2.0 P2.0

D3/SDA/SIMO 5 — —

D4/CLK 3 P0.5 P1.5

D5/PWM 1 P1.2 P1.1

D6/A0 12 P0.0 P0.6

D7/A1 10 P0.1 P0.7

D8/ID/INT 4 P0.4 P1.0

D9/EN/PWM2/INT 2 P1.3 P1.4

6 International Journal of Aerospace Engineering

station. In this case, when a packet is received by Rx, itperforms a CRC check and FEC. The received packet is dec-apsulated and sent to OBC. For transmission, OBC forwardsdata to Tx which is encapsulated and transmitted to theground station. Besides performing radio communication,the CubeTCT transceiver also performs various status mon-itoring and control tasks. Different sensors (temperature,voltage, and current sensors), PA, and antilatchup circuitsare monitored by these transceivers via analog and digitalI/O ports. The PA load switch, regulators (3V Ref, 3.3V,and 6V), PA, and RF switches are also controlled by Txand Rx as shown in Figure 9.

Most efforts to use COTS components in the spaceenvironment are aimed to protect the CMOS circuitsagainst fatal events such as a latchup due to radiationhazards. To protect against such events, a commercialantilatchup circuit component is being used on CubeTCT

which isolates power to the load for a finite time toensure that a latchup is extinguished [13].

The main subsystems of CubeTCT include:

(i) CubeTCT transceiver

(ii) CubeTCT power regulator and load switch

(iii) Housekeeping sensors

(iv) 1B9_CubeTCT antilatchup protection

(v) CubeTCT RF front end

3.1. RF Front End. The RF front end is the most importantsubsystem of the CubeTCT tile. In the transmit chain, it iscomposed of the transmitting CC2510 RF matching network

(a) (b)

Figure 7: Photograph of AraMiS-C1 with 4 CubePMT and 2 CubeTCT tiles.

Debugconnector

SPIconnector

CC2510Rx

CC2510Tx

PDBconnector

6 V PAREG

Debugconnector

UHF Tx Rx

LNA RF switches PA

3.3 VREG

Latchupprotection

chip

Figure 8: Photograph of CubeTCT.

Tempsensor

8-pin debugconnector RX

8-pin debugconnector TX

6-pin SPIconnector4-pin PDBconnector

Latchupprotection 3.3V mixed

regulator

PDB

6 V3.3

V

3.0 V refregulator

6 V PAregulator

PA loadswitch

TCT transceiver

SwRF

RF front endTX

CC2510

RXCC2510

LNA

PA

5 Vvoltagesensor

10 Vvoltagesensor

20 Vvoltagesensor

Currentsensor

Figure 9: Block view of the S-band 1B9_CubeTCT system.

7International Journal of Aerospace Engineering

and a power amplifier that connects to the (external) patchantenna using two RF switches. The receive chain starts fromthe antenna that is connected through two RF switches to theLNA that further connects to the receiving CC2510 via theRF matching network as depicted in Figure 10. This is ahalf-duplex system using the same antenna for transmittingand receiving. The receiver and transmitter chains are iso-lated together using two RF switches. The concept behindusing two RF switches is to provide a better isolation tothe LNA.

The matching network of CC2510 has been designed in asymmetric fashion to avoid any delays and lags. The RF frontend consists of COTS components which have been selectedaccording to certain design requirements. The LNA, PA, andRF switches were tested individually for compliance. Thepassive components used in the overall design of the match-ing network are chosen on the basis of the least parasiticbehaviour and to ensure optimum matching (according tothe manufacturer’s specifications).

3.1.1. RF Front-End Design. This section provides a moredetailed designed description of the major modules consti-tuting the RF front end which includes LNA, PA, and RFswitches and the RF matching network. The RF front end isdesigned with focus on low cost and use of commerciallyavailable components which make them comparable to othersuch subsytem approaches [14].

3.1.2. LNA Design. The communication data rate attained byusing CC2510 is 500 kbps. The corresponding sensitivity wasobserved to be -85 dBm for the given data rate. Therefore, itwas necessary to use a low-noise amplifier (LNA) to mitigate

the noise power from the received signal. The purpose ofusing LNA was to provide a high gain and the least possiblenoise figure (NF). For LNA design, different COTS compo-nents were analysed on the basis of gain and NF.

Among them, the Maxim MAX2644 was selected as thebest suitable option because it provides a maximum gain ofup to 17dB and a NF of 2.2 dB (at 2.43GHz). It can be usedin two different configurations. First, it can be used as a high-gain option, one that is not very linear, so it has a value ofIIP3 equal to -3 dBm. The second allows for a gain of 16 dBand an IIP3 of 1 dBm which has been chosen for our design,as shown in Figure 5. A length of 10.16mm has been addedbetween the bypass capacitors C62 and C61 to mitigate 3.3Vsupply noises to the LNA [15].

3.1.3. PA Design. The power amplifier (RFMD SZM-2166Z)selected is a COTS component. It is a high-linearity classAB power amplifier that is designed using HBT (Heterojunc-tion Bipolar Transistor) technology with both InGaP andGaAs semiconductor devices which are used in high-frequency RF design (suitable for the space environment).The power amplifier provides an output RF power of33 dBm and a gain of 36 dB. This power amplifier incorpo-rates an active bias circuit which provides designers theflexibility to optimize performance in specific applicationsas shown in Figure 6. There is a power detector and apower-enabling signal available for its control and monitor-ing. In our case, a power of 2W is consumed by PA. A voltageregulator downconverts the Power Distribution Bus into 6Vwhich then drives this PA.

The PA separate module was also tested for actual outputpower by connecting CC2510 at the input power which

CC2510Tx

CC2510Rx

LNA

PA

RF SWRx

RF SWTx

6 V

RF matching network

RF_N

RF_N

RF_P

RF_P

Figure 10: RF front-end block diagram.

8 International Journal of Aerospace Engineering

provided a maximum power of 36 dBm at 2.43GHz. Theinput power was varied and the correspondent output powervalues are reported as in Table 2.

Using these measured values, the gain (GdB) andefficiency (η) were calculated as follows:

GdB = PoutdBm − PindBm, 1

η = PoutPal

, 2

where

Pal = VI 3

Figure 11 describes the measured gain of the PA which isacceptable for 1B9_CubeTCT. The efficiency is also reportedin Figure 12, which seems to agree with the manufacturer’svalues reported in [16].

3.1.4. RF Switch Design. The RF switches designed for theRF front end uses two COTS components from TriQuint(TQP4M0010). These are high-absorption GaAs SPDTswitches that provide the most suitable results among theother contenders. Each switch can sustain a maximuminput power of 36 dBm and provides an isolation of45 dB between each RF port with an insertion loss of0.9 dB at 2.43GHz [17].

The RF switch operates on 3.3V and both of them arecontrolled by the enabling control signalsVc from thetransceiver core as shown in Figure 13(a). When Vc is low,RFC and RF1 are connected, whereas RFC and RF2 areisolated, or in other words, the receive chain is enabled. Onthe contrary, if Vc is high, RFC and RF2 are connected whileRFC and RF1 are isolated; therefore, the transmit chain isenabled as shown in Figure 13(b). Here, a precautionarymeasure is mandatory to ensure that the power amplifier isonly enabled once the transmit chain is enabled to avoid highpower dissipation within the RF switch which can causephysical damage.

3.1.5. RF Matching Network Design. The telecommunicationtile has been realized on a 4-layer PCB. The RF traces havebeen placed on the topmost layer. The RF front-end net-work has been designed on an enhanced FR-4 substratewith a dielectric constant (εr) of 4.7 and height (h) of0.36mm with an operating frequency of 2.43GHz as shownin Figure 14. This increases the need for a proper RFmatching network to yield acceptable results. Thus, all theselected RF COTS components were closely analyzed anda matching network was designed for each of them in closecompliance with the manufacturer’s specifications anddesign requirements. The matching impedances for CC2510chips’ RF front end, PA, LNA, and switches were transformedinto equivalent trace widths along with electrical lengths intophysical lengths using the AWR microwave office Tx-linetool [18].

The matching impedances used in the given designare tabulated with their equivalent trace width (W) inTable 3.

4. Conclusion

The paper presents a modular approach for a RF front-enddesign by using COTS components that are low priced andreadily available for development. This makes the design

34.5

34

33.5

33

Gai

n (d

B)

32.5

32

31.524 26 28 30

POUT (dBm)32 34 36

Figure 11: Measured gain of PA (SZM-2166Z).

Emei

ency

0.40.35

0.30.25

0.20.15

0.10.05

0.5 1 1.5 2 2.5 3 3.5 4 4.5POUT (W)

Figure 12: Efficiency of PA (SZM-2166Z).

Table 2: PA, input vs. output power, and output current.

Pin (dBm) Pout (dBm) Iout (A)

-10.0 24.1 0.606

-9.0 25.1 0.63

-8.0 26.05 0.66

-7.0 27.0 0.70

-6.0 27.9 0.75

-5.3 28.5 0.79

-4.2 29.38 0.855

-3.2 30.25 0.931

-2.1 31.14 1.01

-1.1 32.0 1.11

0.0 32.9 1.2

1.0 33.74 1.33

2.1 34.6 1.46

3.0 35.3 1.6

4.0 36.0 1.75

5.0 36.55 1.9

9International Journal of Aerospace Engineering

10 nF

10 nF

10 nF

RF SW Tx

RF SW Rx

10 nFZ = 50Ω

ANT

Z = 50ΩZ = 50Ω

Z =

50Ω

Z = 50ΩZ = 50Ω

Z =

50Ω

Z = 50Ω Z = 50Ω

RF Tx PA

RF Rx LNA

Vc 3.3 V

Vc

3.3 V

RFC

RF1

RF2

RF1

RF2

RFC

(a)

10 nF

10 nF

10 nF

RF SW Tx

RF SW Rx

10 nF

Z = 50Ω

ANT

Z = 50ΩZ = 50Ω

Z =

50Ω

Z = 50Ω

Z =

50Ω

Z = 50Ω Z = 50Ω

RF Tx PA

RF Rx LNA

Vc 3.3 V

Vc

3.3 V

RFC

RF1

RF2

RF1

RF2

RFC

(b)

Figure 13: RF switches: (a) transmit mode with Vc = low and (b) receiving mode with Vc = high.

10 International Journal of Aerospace Engineering

more feasible for small industries and academia to developtheir own satellite subsystems. Moreover, there is a degreeof modularity at the design, schematic, and physical levelswhich can significantly reduce the subsystem manufacturingand design cost and development time.

Data Availability

The abovementioned work is the authors’ intellectualproperty and research work. All the data needed to supportthe research work is available.

Disclosure

An earlier version of this study was presented as an abstractat the 65th International Astronautical Congress 2014.

Conflicts of Interest

The authors declare that they have no conflicts of interest.

References

[1] J. Bouwmeester and J. Guo, “Survey of worldwide pico- andnanosatellite missions, distributions and subsystem technol-ogy,” Acta Astronautica, vol. 67, no. 7-8, pp. 854–862, 2010.

[2] O. Popescu, J. S. Harris, and D. C. Popescu, “Designingthe communication sub-system for nanosatellite CubeSatmissions: operational and implementation perspectives,” inSoutheastCon 2016, pp. 1–5, Norfolk, VA, USA, 2016.

[3] “Guest editorial. Satellite communications and antennas,” IETCommunications, vol. 12, no. 1, pp. 1–1, 2018.

[4] S. Speretta, L. M. Reyneri, C. Sanso’e, M. Tranchero,C. Passerone, and D. D. Corso, “Modular architecture for

satellites,” in 58th International Astronautical Congress,pp. 24–28, Hyderabad, India, September 2007.

[5] D. Wood and A. Weigel, “Architectures of small satellite pro-grams in developing countries,” Acta Astronautica, vol. 97,pp. 109–121, 2014.

[6] M. R. Mughal, A. Ali, and L. M. Reyneri, “Plug-and-playdesign approach to smart harness for modular small satellites,”Acta Astronautica, vol. 94, no. 2, pp. 754–764, 2014.

[7] “UML tutorial,” http://www.tutorialspoint.com/uml/index.htm.

[8] M. R. Mughal, L. M. Reyneri, and A. Ali, “UML based designmethodology for serial data handling system of nanosatellites,”in 2012 IEEE First AESS European Conference on SatelliteTelecommunications (ESTEL), pp. 1–6, Rome, Italy, 2012.

[9] M. R. Mughal, A. Ali, H. Ali, and L. M. Reyneri, “Smarthoneycomb tile for small satellites,” in 2014 IEEE AerospaceConference, pp. 1–8, Big Sky, MT, USA, 2014.

[10] A. Ali, L. M. Reyneri, H. Ali, and M. Rizwan Mughal,“Components selection for a simple boost converter on thebasis of power loss analysis,” in 63rd International Astronauti-cal Congress, pp. 1–5, Naples, Italy, October 2012.

[11] A. Ali, M. R. Mughal, H. Ali, and L. Reyneri, “Innovativepower management, attitude determination and control tilefor CubeSat standard nano-satellites,” Acta Astronautica,vol. 96, pp. 116–127, 2014.

[12] “CC2510, datasheet,”http://www.ti.com/lit/ds/symlink/cc2510.pdf.

[13] “1B127, datasheet,” http://ptc.partcommunity.com/3d-cad-models/FileService/File/tpa/neohm/pdf/1b127.pdf.

[14] Y. Wang and R. Shi, “Low cost and convenient design forreceiver front-end,” in 2016 CIE International Conference onRadar (RADAR), pp. 1–4, Guangzhou, China, 2016.

[15] “Maxim-2644, datasheet,” http://datasheets.maximintegrated.com/en/ds/MAX2644.pdf.

[16] “RFMD SZM-2166Z datasheet,” https://www.qorvo.com/products/d/da001999.

[17] “TriQuint TQP4M0010 datasheet,” http://www.triquint.com/products/p/TQP4M0010.

[18] “Tx-line tool AWR microwave Office,” https://www.awrcorp.com/products/additional-products/tx-line-transmission-line-calculator.

Metal ground plane

Top layer partial ground plane Microstripelement

Dielectricsubstrate

h

G

W

G

L

Figure 14: Telecom tile PCB layout; top 2 layers.

Table 3: Computed trace widths with AWR Tx-line tool for RFfront-end matching.

Impedance, Z0 (Ω) Trace width, W (mm)

15.8 3.17

24.8 1.71

50 0.6

80 0.12

95 0.10

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